<s>
The	O
Jazz	B-General_Concept
DSP	I-General_Concept
,	O
by	O
,	O
is	O
a	O
VLIW	B-General_Concept
embedded	O
digital	B-Architecture
signal	I-Architecture
processor	I-Architecture
architecture	O
with	O
a	O
2-stage	O
instruction	O
pipeline	O
,	O
and	O
single-cycle	O
execution	B-General_Concept
units	I-General_Concept
.	O
</s>
<s>
The	O
baseline	O
DSP	B-Architecture
includes	O
one	O
arithmetic	B-General_Concept
logic	I-General_Concept
unit	I-General_Concept
(	O
ALU	O
)	O
,	O
dual	O
memory	O
interfaces	O
,	O
and	O
the	O
control	B-General_Concept
unit	I-General_Concept
(	O
instruction	O
decoder	O
,	O
branch	O
control	O
,	O
task	O
control	O
)	O
.	O
</s>
<s>
Most	O
aspects	O
of	O
the	O
architecture	O
,	O
such	O
as	O
the	O
number	O
and	O
sizes	O
of	O
Memory	O
Interface	O
Units	O
(	O
MIU	O
)	O
or	O
the	O
types	O
and	O
number	O
of	O
Computation	O
Units	O
(	O
CU	O
)	O
,	O
datapath	O
width	O
(	O
16	O
or	O
32-bit	O
)	O
,	O
the	O
number	O
of	O
interrupts	O
and	O
priority	O
levels	O
,	O
and	O
debugging	O
support	O
may	O
be	O
independently	O
configured	O
using	O
a	O
proprietary	O
graphical	B-Application
user	I-Application
interface	I-Application
(	O
GUI	B-Application
)	O
tool	O
.	O
</s>
<s>
A	O
key	O
feature	O
of	O
the	O
architecture	O
allows	O
the	O
user	O
to	O
add	O
custom	O
instructions	O
and/or	O
custom	O
execution	B-General_Concept
units	I-General_Concept
to	O
enhance	O
the	O
performance	O
of	O
their	O
application	O
.	O
</s>
<s>
Typical	O
Jazz	B-General_Concept
DSP	I-General_Concept
performance	O
can	O
exceed	O
1000	O
million	O
operations	O
per	O
second	O
(	O
MOPS	O
)	O
at	O
a	O
modest	O
100	O
MHz	O
clock	O
frequency	O
.	O
</s>
<s>
Please	O
refer	O
to	O
the	O
site	O
for	O
more	O
details	O
on	O
Jazz	B-General_Concept
DSP	I-General_Concept
performance	O
as	O
compared	O
to	O
other	O
benchmarked	O
processors	O
.	O
</s>
