<s>
The	O
Irish	B-Device
Centre	I-Device
for	I-Device
High-End	I-Device
Computing	I-Device
(	O
ICHEC	O
)	O
is	O
the	O
national	O
high-performance	B-Architecture
computing	I-Architecture
centre	O
in	O
Ireland	O
.	O
</s>
<s>
It	O
was	O
established	O
in	O
2005	O
and	O
provides	O
supercomputing	B-Architecture
resources	O
,	O
support	O
,	O
training	O
and	O
related	O
services	O
.	O
</s>
<s>
ICHEC	O
's	O
newest	O
supercomputer	B-Architecture
,	O
Kay	O
,	O
was	O
commissioned	O
in	O
August	O
2018	O
and	O
was	O
named	O
after	O
Irish-American	O
ENIAC	B-Device
programmer	O
Kathleen	O
Antonelli	O
following	O
a	O
public	O
poll	O
,	O
in	O
which	O
the	O
other	O
shortlist	O
candidates	O
were	O
botanist	O
Ellen	O
Hutchins	O
,	O
scientist	O
and	O
inventor	O
Nicholas	O
Callan	O
,	O
geologist	O
Richard	O
Kirwan	O
,	O
chemist	O
Eva	O
Philbin	O
,	O
and	O
hydrographer	O
Francis	O
Beaufort	O
.	O
</s>
<s>
A	O
cluster	O
of	O
336	O
nodes	O
,	O
each	O
node	O
having	O
2x	O
20-core	O
2.4GHz	O
Intel	O
Xeon	O
Gold	O
6148	O
(	O
Skylake	B-Architecture
)	O
processors	O
,	O
192	O
GiB	O
of	O
RAM	O
,	O
a	O
400	O
GiB	O
local	O
SSD	O
for	O
scratch	O
space	O
and	O
a	O
100Gbit	O
OmniPath	O
network	O
adaptor	O
.	O
</s>
<s>
A	O
GPU	B-Architecture
partition	O
of	O
16	O
nodes	O
with	O
the	O
same	O
specification	O
as	O
above	O
,	O
plus	O
2x	O
Nvidia	B-Device
Tesla	I-Device
V100	O
16GB	O
PCIe	O
(	O
Volta	B-General_Concept
architecture	I-General_Concept
)	O
GPUs	B-Architecture
on	O
each	O
node	O
.	O
</s>
<s>
Each	O
GPU	B-Architecture
has	O
5,120	O
CUDA	B-Architecture
cores	O
and	O
640	O
Tensor	O
Cores	O
.	O
</s>
<s>
A	O
"	O
Phi	O
"	O
partition	O
of	O
16	O
nodes	O
,	O
each	O
containing	O
1x	O
self-hosted	O
Intel	B-General_Concept
Xeon	I-General_Concept
Phi	I-General_Concept
Processor	O
7210	O
(	O
Knights	O
Landing	O
or	O
KNL	O
architecture	O
)	O
with	O
64	O
cores	O
@	O
1.3GHz	O
,	O
192	O
GiB	O
RAM	O
and	O
a	O
400	O
GiB	O
local	O
SSD	O
for	O
scratch	O
space	O
.	O
</s>
<s>
A	O
"	O
high	O
memory	O
"	O
set	O
of	O
6	O
nodes	O
each	O
containing	O
1.5	O
TiB	O
of	O
RAM	O
,	O
2x	O
20-core	O
2.4GHz	O
Intel	O
Xeon	O
Gold	O
6148	O
(	O
Skylake	B-Architecture
)	O
processors	O
and	O
1	O
TiB	O
of	O
dedicated	O
local	O
SSD	O
for	O
scratch	O
storage	O
.	O
</s>
<s>
Storage	O
is	O
provided	O
via	O
Lustre	B-Application
filesystems	I-Application
on	O
a	O
high-performance	O
DDN	O
SFA14k	O
system	O
with	O
1	O
PiB	O
of	O
capacity	O
.	O
</s>
<s>
Between	O
2014	O
and	O
August	O
2018	O
,	O
ICHEC	O
managed	O
the	O
Fionn	O
supercomputer	B-Architecture
,	O
a	O
heterogeneous	O
system	O
composed	O
of	O
:	O
</s>
<s>
an	O
SGI	O
ICE	O
X	O
cluster	O
with	O
320	O
nodes	O
or	O
7,680	O
Intel	B-Device
Ivy	I-Device
Bridge	I-Device
processor	O
cores	O
with	O
a	O
combined	O
20TB	O
of	O
memory	O
(	O
24	O
cores	O
and	O
64GB	O
memory	O
per	O
node	O
)	O
.	O
</s>
<s>
Each	O
node	O
has	O
20	O
Intel	B-Device
Ivy	I-Device
Bridge	I-Device
processor	O
cores	O
,	O
64GB	O
of	O
memory	O
along	O
with	O
many-core	O
hardware	O
from	O
Intel	O
(	O
2x	O
Xeon	B-General_Concept
Phi	I-General_Concept
5110P	O
coprocessors	O
on	O
16	O
nodes	O
)	O
and	O
Nvidia	O
(	O
2x	O
Tesla	B-Device
K20X	O
GPGPU	B-Architecture
cards	O
on	O
16	O
nodes	O
)	O
.	O
</s>
<s>
a	O
shared	O
memory	O
compute	O
node	O
(	O
14	O
internal	O
NUMA	B-Operating_System
nodes	O
)	O
with	O
112	O
Intel	B-Device
Sandy	I-Device
Bridge	I-Device
processor	O
cores	O
,	O
2	O
Intel	B-General_Concept
Xeon	I-General_Concept
Phi	I-General_Concept
5110P	O
coprocessors	O
and	O
1.7TB	O
of	O
memory	O
.	O
</s>
<s>
Storage	O
is	O
provided	O
via	O
a	O
SFA12k-20	O
platform	O
with	O
560TB	O
of	O
capacity	O
to	O
all	O
components	O
of	O
the	O
machine	O
via	O
a	O
Lustre	B-Application
filesystem	I-Application
.	O
</s>
<s>
ICHEC	O
was	O
designated	O
a	O
Nvidia	B-Architecture
CUDA	I-Architecture
Research	O
Center	O
in	O
2010	O
Its	O
work	O
in	O
this	O
area	O
has	O
included	O
the	O
porting	O
to	O
CUDA	B-Architecture
of	O
the	O
Quantum	B-Application
ESPRESSO	I-Application
and	O
DL_POLY	O
molecular	O
dynamics	O
packages	O
as	O
well	O
as	O
various	O
industrial	O
benchmarking	O
studies	O
.	O
</s>
<s>
ICHEC	O
became	O
an	O
Intel	O
Parallel	O
Computing	O
Center	O
(	O
IPCC	O
)	O
in	O
2014	O
to	O
conduct	O
research	O
on	O
many-core	O
technology	O
in	O
high	B-Architecture
performance	I-Architecture
computing	I-Architecture
and	O
big	O
data	O
analytics	O
.	O
</s>
<s>
Enterprise	O
Ireland	O
,	O
IDA	O
Ireland	O
)	O
to	O
provide	O
consultancy	O
services	O
to	O
Irish	O
companies	O
in	O
various	O
areas	O
including	O
data	B-Application
mining	I-Application
,	O
visualisation	B-Application
,	O
data	B-General_Concept
management	I-General_Concept
and	O
software	O
development/optimization	O
.	O
</s>
