<s>
In	O
computing	O
,	O
interrupt	B-General_Concept
latency	I-General_Concept
refers	O
to	O
the	O
delay	O
between	O
the	O
start	O
of	O
an	O
Interrupt	B-Application
Request	O
(	O
IRQ	O
)	O
and	O
the	O
start	O
of	O
the	O
respective	O
Interrupt	B-General_Concept
Service	I-General_Concept
Routine	I-General_Concept
(	O
ISR	O
)	O
.	O
</s>
<s>
For	O
many	O
operating	B-General_Concept
systems	I-General_Concept
,	O
devices	O
are	O
serviced	O
as	O
soon	O
as	O
the	O
device	O
's	O
interrupt	B-General_Concept
handler	I-General_Concept
is	O
executed	O
.	O
</s>
<s>
Interrupt	B-General_Concept
latency	I-General_Concept
may	O
be	O
affected	O
by	O
microprocessor	B-Architecture
design	O
,	O
interrupt	B-Architecture
controllers	I-Architecture
,	O
interrupt	B-Application
masking	O
,	O
and	O
the	O
operating	B-General_Concept
system	I-General_Concept
's	O
(	O
OS	B-General_Concept
)	O
interrupt	B-Application
handling	I-Application
methods	O
.	O
</s>
<s>
There	O
is	O
usually	O
a	O
trade-off	O
between	O
interrupt	B-General_Concept
latency	I-General_Concept
,	O
throughput	O
,	O
and	O
processor	O
utilization	O
.	O
</s>
<s>
Many	O
of	O
the	O
techniques	O
of	O
CPU	B-Architecture
and	O
OS	B-General_Concept
design	O
that	O
improve	O
interrupt	B-General_Concept
latency	I-General_Concept
will	O
decrease	O
throughput	O
and	O
increase	O
processor	O
utilization	O
.	O
</s>
<s>
Techniques	O
that	O
increase	O
throughput	O
may	O
increase	O
interrupt	B-General_Concept
latency	I-General_Concept
and	O
increase	O
processor	O
utilization	O
.	O
</s>
<s>
Lastly	O
,	O
trying	O
to	O
reduce	O
processor	O
utilization	O
may	O
increase	O
interrupt	B-General_Concept
latency	I-General_Concept
and	O
decrease	O
throughput	O
.	O
</s>
<s>
Minimum	O
interrupt	B-General_Concept
latency	I-General_Concept
is	O
largely	O
determined	O
by	O
the	O
interrupt	B-Architecture
controller	I-Architecture
circuit	O
and	O
its	O
configuration	O
.	O
</s>
<s>
They	O
can	O
also	O
affect	O
the	O
jitter	O
in	O
the	O
interrupt	B-General_Concept
latency	I-General_Concept
,	O
which	O
can	O
drastically	O
affect	O
the	O
real-time	B-General_Concept
schedulability	O
of	O
the	O
system	O
.	O
</s>
<s>
The	O
Intel	B-Device
APIC	I-Device
architecture	I-Device
is	O
well	O
known	O
for	O
producing	O
a	O
huge	O
amount	O
of	O
interrupt	B-General_Concept
latency	I-General_Concept
jitter	O
.	O
</s>
<s>
Maximum	O
interrupt	B-General_Concept
latency	I-General_Concept
is	O
largely	O
determined	O
by	O
the	O
methods	O
an	O
OS	B-General_Concept
uses	O
for	O
interrupt	B-Application
handling	I-Application
.	O
</s>
<s>
For	O
example	O
,	O
most	O
processors	O
allow	O
programs	O
to	O
disable	O
interrupts	B-Application
,	O
putting	O
off	O
the	O
execution	O
of	O
interrupt	B-General_Concept
handlers	I-General_Concept
,	O
in	O
order	O
to	O
protect	O
critical	B-Operating_System
sections	I-Operating_System
of	O
code	O
.	O
</s>
<s>
During	O
the	O
execution	O
of	O
such	O
a	O
critical	B-Operating_System
section	I-Operating_System
,	O
all	O
interrupt	B-General_Concept
handlers	I-General_Concept
that	O
cannot	O
execute	O
safely	O
within	O
a	O
critical	B-Operating_System
section	I-Operating_System
are	O
blocked	O
(	O
they	O
save	O
the	O
minimum	O
amount	O
of	O
information	O
required	O
to	O
restart	O
the	O
interrupt	B-General_Concept
handler	I-General_Concept
after	O
all	O
critical	B-Operating_System
sections	I-Operating_System
have	O
exited	O
)	O
.	O
</s>
<s>
So	O
the	O
interrupt	B-General_Concept
latency	I-General_Concept
for	O
a	O
blocked	O
interrupt	B-Application
is	O
extended	O
to	O
the	O
end	O
of	O
the	O
critical	B-Operating_System
section	I-Operating_System
,	O
plus	O
any	O
interrupts	B-Application
with	O
equal	O
and	O
higher	O
priority	O
that	O
arrived	O
while	O
the	O
block	O
was	O
in	O
place	O
.	O
</s>
<s>
Many	O
computer	O
systems	O
require	O
low	O
interrupt	B-General_Concept
latencies	I-General_Concept
,	O
especially	O
embedded	B-Architecture
systems	I-Architecture
that	O
need	O
to	O
control	O
machinery	O
in	O
real-time	B-General_Concept
.	O
</s>
<s>
Sometimes	O
these	O
systems	O
use	O
a	O
real-time	B-Operating_System
operating	I-Operating_System
system	I-Operating_System
(	O
RTOS	B-Operating_System
)	O
.	O
</s>
<s>
An	O
RTOS	B-Operating_System
makes	O
the	O
promise	O
that	O
no	O
more	O
than	O
a	O
specified	O
maximum	O
amount	O
of	O
time	O
will	O
pass	O
between	O
executions	O
of	O
subroutines	O
.	O
</s>
<s>
In	O
order	O
to	O
do	O
this	O
,	O
the	O
RTOS	B-Operating_System
must	O
also	O
guarantee	O
that	O
interrupt	B-General_Concept
latency	I-General_Concept
will	O
never	O
exceed	O
a	O
predefined	O
maximum	O
.	O
</s>
<s>
Advanced	O
interrupt	B-Architecture
controllers	I-Architecture
implement	O
a	O
multitude	O
of	O
hardware	O
features	O
in	O
order	O
to	O
minimize	O
the	O
overhead	O
during	O
context	B-Operating_System
switches	I-Operating_System
and	O
the	O
effective	O
interrupt	B-General_Concept
latency	I-General_Concept
.	O
</s>
<s>
Also	O
,	O
there	O
are	O
many	O
other	O
methods	O
hardware	O
may	O
use	O
to	O
help	O
lower	O
the	O
requirements	O
for	O
shorter	O
interrupt	B-General_Concept
latency	I-General_Concept
in	O
order	O
to	O
make	O
a	O
given	O
interrupt	B-General_Concept
latency	I-General_Concept
tolerable	O
in	O
a	O
situation	O
.	O
</s>
<s>
For	O
example	O
,	O
most	O
network	O
cards	O
implement	O
transmit	O
and	O
receive	O
ring	B-Data_Structure
buffers	I-Data_Structure
,	O
interrupt	B-Application
rate	O
limiting	O
,	O
and	O
hardware	O
flow	O
control	O
.	O
</s>
<s>
Modern	O
hardware	O
also	O
implements	O
interrupt	B-Application
rate	O
limiting	O
.	O
</s>
<s>
This	O
helps	O
prevent	O
interrupt	B-General_Concept
storms	I-General_Concept
or	O
live-locks	O
by	O
having	O
the	O
hardware	O
wait	O
a	O
programmable	O
minimum	O
amount	O
of	O
time	O
between	O
each	O
interrupt	B-Application
it	O
generates	O
.	O
</s>
<s>
Interrupt	B-Application
rate	O
limiting	O
reduces	O
the	O
amount	O
of	O
time	O
spent	O
servicing	O
interrupts	B-Application
,	O
allowing	O
the	O
processor	O
to	O
spend	O
more	O
time	O
doing	O
useful	O
work	O
.	O
</s>
