<s>
In	O
digital	O
computers	O
,	O
an	O
interrupt	B-Application
(	O
sometimes	O
referred	O
to	O
as	O
a	O
trap	B-Application
)	O
is	O
a	O
request	O
for	O
the	O
processor	B-General_Concept
to	O
interrupt	B-Application
currently	O
executing	O
code	O
(	O
when	O
permitted	O
)	O
,	O
so	O
that	O
the	O
event	O
can	O
be	O
processed	O
in	O
a	O
timely	O
manner	O
.	O
</s>
<s>
If	O
the	O
request	O
is	O
accepted	O
,	O
the	O
processor	B-General_Concept
will	O
suspend	O
its	O
current	O
activities	O
,	O
save	O
its	O
state	B-Application
,	O
and	O
execute	O
a	O
function	O
called	O
an	O
interrupt	B-General_Concept
handler	I-General_Concept
(	O
or	O
an	O
interrupt	B-General_Concept
service	I-General_Concept
routine	I-General_Concept
,	O
ISR	O
)	O
to	O
deal	O
with	O
the	O
event	O
.	O
</s>
<s>
This	O
interruption	O
is	O
often	O
temporary	O
,	O
allowing	O
the	O
software	O
to	O
resume	O
normal	O
activities	O
after	O
the	O
interrupt	B-General_Concept
handler	I-General_Concept
finishes	O
,	O
although	O
the	O
interrupt	B-Application
could	O
instead	O
indicate	O
a	O
fatal	O
error	O
.	O
</s>
<s>
Interrupts	B-Application
are	O
commonly	O
used	O
by	O
hardware	B-Architecture
devices	O
to	O
indicate	O
electronic	O
or	O
physical	O
state	B-Application
changes	O
that	O
require	O
time-sensitive	O
attention	O
.	O
</s>
<s>
Interrupts	B-Application
are	O
also	O
commonly	O
used	O
to	O
implement	O
computer	B-Operating_System
multitasking	I-Operating_System
,	O
especially	O
in	O
real-time	B-General_Concept
computing	I-General_Concept
.	O
</s>
<s>
Systems	O
that	O
use	O
interrupts	B-Application
in	O
these	O
ways	O
are	O
said	O
to	O
be	O
interrupt-driven	O
.	O
</s>
<s>
Interrupt	B-Application
signals	B-Operating_System
may	O
be	O
issued	O
in	O
response	O
to	O
hardware	B-Architecture
or	O
software	O
events	O
.	O
</s>
<s>
These	O
are	O
classified	O
as	O
hardware	B-Architecture
interrupts	B-Application
or	O
software	O
interrupts	B-Application
,	O
respectively	O
.	O
</s>
<s>
For	O
any	O
particular	O
processor	B-General_Concept
,	O
the	O
number	O
of	O
interrupt	B-Application
types	O
is	O
limited	O
by	O
the	O
architecture	O
.	O
</s>
<s>
A	O
hardware	B-Architecture
interrupt	B-Application
is	O
a	O
condition	O
related	O
to	O
the	O
state	B-Application
of	O
the	O
hardware	B-Architecture
that	O
may	O
be	O
signaled	O
by	O
an	O
external	O
hardware	B-Architecture
device	O
,	O
e.g.	O
,	O
an	O
interrupt	B-General_Concept
request	I-General_Concept
(	O
IRQ	B-General_Concept
)	O
line	O
on	O
a	O
PC	O
,	O
or	O
detected	O
by	O
devices	O
embedded	O
in	O
processor	B-General_Concept
logic	O
(	O
e.g.	O
,	O
the	O
CPU	B-Device
timer	O
in	O
IBM	O
System/370	O
)	O
,	O
to	O
communicate	O
that	O
the	O
device	O
needs	O
attention	O
from	O
the	O
operating	B-General_Concept
system	I-General_Concept
(	O
OS	O
)	O
or	O
,	O
if	O
there	O
is	O
no	O
OS	O
,	O
from	O
the	O
bare	O
metal	O
program	O
running	O
on	O
the	O
CPU	B-Device
.	O
</s>
<s>
Such	O
external	O
devices	O
may	O
be	O
part	O
of	O
the	O
computer	O
(	O
e.g.	O
,	O
disk	B-General_Concept
controller	I-General_Concept
)	O
or	O
they	O
may	O
be	O
external	O
peripherals	O
.	O
</s>
<s>
For	O
example	O
,	O
pressing	O
a	O
keyboard	B-Device
key	O
or	O
moving	O
a	O
mouse	B-Device
plugged	O
into	O
a	O
PS/2	B-Device
port	O
triggers	O
hardware	B-Architecture
interrupts	B-Application
that	O
cause	O
the	O
processor	B-General_Concept
to	O
read	O
the	O
keystroke	O
or	O
mouse	B-Device
position	O
.	O
</s>
<s>
Hardware	B-Architecture
interrupts	B-Application
can	O
arrive	O
asynchronously	O
with	O
respect	O
to	O
the	O
processor	B-General_Concept
clock	O
,	O
and	O
at	O
any	O
time	O
during	O
instruction	O
execution	O
.	O
</s>
<s>
Consequently	O
,	O
all	O
incoming	O
hardware	B-Architecture
interrupt	B-Application
signals	B-Operating_System
are	O
conditioned	O
by	O
synchronizing	O
them	O
to	O
the	O
processor	B-General_Concept
clock	O
,	O
and	O
acted	O
upon	O
only	O
at	O
instruction	O
execution	O
boundaries	O
.	O
</s>
<s>
In	O
many	O
systems	O
,	O
each	O
device	O
is	O
associated	O
with	O
a	O
particular	O
IRQ	B-General_Concept
signal	B-Operating_System
.	O
</s>
<s>
This	O
makes	O
it	O
possible	O
to	O
quickly	O
determine	O
which	O
hardware	B-Architecture
device	O
is	O
requesting	O
service	O
,	O
and	O
to	O
expedite	O
servicing	O
of	O
that	O
device	O
.	O
</s>
<s>
On	O
some	O
older	O
systems	O
,	O
such	O
as	O
the	O
1964	O
CDC	O
3600	O
,	O
all	O
interrupts	B-Application
went	O
to	O
the	O
same	O
location	O
,	O
and	O
the	O
OS	O
used	O
a	O
specialized	O
instruction	O
to	O
determine	O
the	O
highest-priority	O
outstanding	O
unmasked	O
interrupt	B-Application
.	O
</s>
<s>
On	O
contemporary	O
systems	O
,	O
there	O
is	O
generally	O
a	O
distinct	O
interrupt	B-Application
routine	O
for	O
each	O
type	O
of	O
interrupt	B-Application
(	O
or	O
for	O
each	O
interrupt	B-Application
source	O
)	O
,	O
often	O
implemented	O
as	O
one	O
or	O
more	O
interrupt	B-General_Concept
vector	I-General_Concept
tables	I-General_Concept
.	O
</s>
<s>
To	O
mask	O
an	O
interrupt	B-Application
is	O
to	O
disable	O
it	O
,	O
so	O
it	O
is	O
deferred	O
or	O
ignored	O
by	O
the	O
processor	B-General_Concept
,	O
while	O
to	O
unmask	O
an	O
interrupt	B-Application
is	O
to	O
enable	O
it	O
.	O
</s>
<s>
Processors	O
typically	O
have	O
an	O
internal	O
interrupt	B-Architecture
mask	I-Architecture
register	I-Architecture
,	O
which	O
allows	O
selective	O
enabling	O
(	O
and	O
disabling	O
)	O
of	O
hardware	B-Architecture
interrupts	B-Application
.	O
</s>
<s>
Each	O
interrupt	B-Application
signal	B-Operating_System
is	O
associated	O
with	O
a	O
bit	O
in	O
the	O
mask	O
register	O
.	O
</s>
<s>
On	O
some	O
systems	O
,	O
the	O
interrupt	B-Application
is	O
enabled	O
when	O
the	O
bit	O
is	O
set	O
,	O
and	O
disabled	O
when	O
the	O
bit	O
is	O
clear	O
.	O
</s>
<s>
On	O
others	O
,	O
the	O
reverse	O
is	O
true	O
,	O
and	O
a	O
set	O
bit	O
disables	O
the	O
interrupt	B-Application
.	O
</s>
<s>
When	O
the	O
interrupt	B-Application
is	O
disabled	O
,	O
the	O
associated	O
interrupt	B-Application
signal	B-Operating_System
may	O
be	O
ignored	O
by	O
the	O
processor	B-General_Concept
,	O
or	O
it	O
may	O
remain	O
pending	O
.	O
</s>
<s>
Signals	B-Operating_System
which	O
are	O
affected	O
by	O
the	O
mask	O
are	O
called	O
maskable	B-Application
interrupts	I-Application
.	O
</s>
<s>
Some	O
interrupt	B-Application
signals	B-Operating_System
are	O
not	O
affected	O
by	O
the	O
interrupt	B-Application
mask	I-Application
and	O
therefore	O
cannot	O
be	O
disabled	O
;	O
these	O
are	O
called	O
non-maskable	O
interrupts	O
(	O
NMIs	O
)	O
.	O
</s>
<s>
These	O
indicate	O
high-priority	O
events	O
which	O
cannot	O
be	O
ignored	O
under	O
any	O
circumstances	O
,	O
such	O
as	O
the	O
timeout	O
signal	B-Operating_System
from	O
a	O
watchdog	B-Application
timer	I-Application
.	O
</s>
<s>
One	O
failure	O
mode	O
is	O
when	O
the	O
hardware	B-Architecture
does	O
not	O
generate	O
the	O
expected	O
interrupt	B-Application
for	O
a	O
change	O
in	O
state	B-Application
,	O
causing	O
the	O
operating	B-General_Concept
system	I-General_Concept
to	O
wait	O
indefinitely	O
.	O
</s>
<s>
Depending	O
on	O
the	O
details	O
,	O
the	O
failure	O
might	O
affect	O
only	O
a	O
single	O
process	B-Operating_System
or	O
might	O
have	O
global	O
impact	O
.	O
</s>
<s>
Some	O
operating	B-General_Concept
systems	I-General_Concept
have	O
code	O
specically	O
to	O
deal	O
with	O
this	O
.	O
</s>
<s>
As	O
an	O
example	O
,	O
IBM	O
Operating	B-Application
System/360	I-Application
(	O
OS/360	B-Application
)	O
relies	O
on	O
a	O
not-ready	O
to	O
ready	O
device-end	O
interrupt	B-Application
when	O
a	O
tape	O
has	O
been	O
mounted	O
on	O
a	O
tape	O
drive	O
,	O
and	O
will	O
not	O
read	O
the	O
tape	O
label	O
until	O
that	O
interrupt	B-Application
occurs	O
or	O
is	O
simulated	O
.	O
</s>
<s>
IBM	O
added	O
code	O
in	O
OS/360	B-Application
so	O
that	O
the	O
VARY	O
ONLINE	O
command	O
will	O
simulate	O
a	O
device	O
end	O
interrupt	B-Application
on	O
the	O
target	O
device	O
.	O
</s>
<s>
A	O
spurious	B-Application
interrupt	I-Application
is	O
a	O
hardware	B-Architecture
interrupt	B-Application
for	O
which	O
no	O
source	O
can	O
be	O
found	O
.	O
</s>
<s>
The	O
term	O
"	O
phantom	O
interrupt	B-Application
"	O
or	O
"	O
ghost	O
interrupt	B-Application
"	O
may	O
also	O
be	O
used	O
to	O
describe	O
this	O
phenomenon	O
.	O
</s>
<s>
Spurious	B-Application
interrupts	I-Application
tend	O
to	O
be	O
a	O
problem	O
with	O
a	O
wired-OR	O
interrupt	B-Application
circuit	O
attached	O
to	O
a	O
level-sensitive	O
processor	B-General_Concept
input	O
.	O
</s>
<s>
Such	O
interrupts	B-Application
may	O
be	O
difficult	O
to	O
identify	O
when	O
a	O
system	O
misbehaves	O
.	O
</s>
<s>
In	O
a	O
wired-OR	O
circuit	O
,	O
parasitic	O
capacitance	O
charging/discharging	O
through	O
the	O
interrupt	B-Application
line	I-Application
's	O
bias	O
resistor	O
will	O
cause	O
a	O
small	O
delay	O
before	O
the	O
processor	B-General_Concept
recognizes	O
that	O
the	O
interrupt	B-Application
source	O
has	O
been	O
cleared	O
.	O
</s>
<s>
If	O
the	O
interrupting	B-Application
device	O
is	O
cleared	O
too	O
late	O
in	O
the	O
interrupt	B-General_Concept
service	I-General_Concept
routine	I-General_Concept
(	O
ISR	O
)	O
,	O
there	O
wo	O
n't	O
be	O
enough	O
time	O
for	O
the	O
interrupt	B-Application
circuit	O
to	O
return	O
to	O
the	O
quiescent	O
state	B-Application
before	O
the	O
current	O
instance	O
of	O
the	O
ISR	O
terminates	O
.	O
</s>
<s>
The	O
result	O
is	O
the	O
processor	B-General_Concept
will	O
think	O
another	O
interrupt	B-Application
is	O
pending	O
,	O
since	O
the	O
voltage	O
at	O
its	O
interrupt	B-General_Concept
request	I-General_Concept
input	O
will	O
be	O
not	O
high	O
or	O
low	O
enough	O
to	O
establish	O
an	O
unambiguous	O
internal	O
logic	O
1	O
or	O
logic	O
0	O
.	O
</s>
<s>
The	O
apparent	O
interrupt	B-Application
will	O
have	O
no	O
identifiable	O
source	O
,	O
hence	O
the	O
"	O
spurious	O
"	O
moniker	O
.	O
</s>
<s>
A	O
spurious	B-Application
interrupt	I-Application
may	O
also	O
be	O
the	O
result	O
of	O
electrical	O
anomalies	B-Error_Name
due	O
to	O
faulty	O
circuit	O
design	O
,	O
high	O
noise	O
levels	O
,	O
crosstalk	O
,	O
timing	O
issues	O
,	O
or	O
more	O
rarely	O
,	O
device	O
errata	O
.	O
</s>
<s>
A	O
spurious	B-Application
interrupt	I-Application
may	O
result	O
in	O
system	O
deadlock	O
or	O
other	O
undefined	O
operation	O
if	O
the	O
ISR	O
does	O
n't	O
account	O
for	O
the	O
possibility	O
of	O
such	O
an	O
interrupt	B-Application
occurring	O
.	O
</s>
<s>
As	O
spurious	B-Application
interrupts	I-Application
are	O
mostly	O
a	O
problem	O
with	O
wired-OR	O
interrupt	B-Application
circuits	O
,	O
good	O
programming	O
practice	O
in	O
such	O
systems	O
is	O
for	O
the	O
ISR	O
to	O
check	O
all	O
interrupt	B-Application
sources	O
for	O
activity	O
and	O
take	O
no	O
action	O
(	O
other	O
than	O
possibly	O
logging	O
the	O
event	O
)	O
if	O
none	O
of	O
the	O
sources	O
is	O
interrupting	B-Application
.	O
</s>
<s>
A	O
software	O
interrupt	B-Application
is	O
requested	O
by	O
the	O
processor	B-General_Concept
itself	O
upon	O
executing	O
particular	O
instructions	O
or	O
when	O
certain	O
conditions	O
are	O
met	O
.	O
</s>
<s>
Every	O
software	O
interrupt	B-Application
signal	B-Operating_System
is	O
associated	O
with	O
a	O
particular	O
interrupt	B-General_Concept
handler	I-General_Concept
.	O
</s>
<s>
A	O
software	O
interrupt	B-Application
may	O
be	O
intentionally	O
caused	O
by	O
executing	O
a	O
special	O
instruction	O
which	O
,	O
by	O
design	O
,	O
invokes	O
an	O
interrupt	B-Application
when	O
executed	O
.	O
</s>
<s>
Such	O
instructions	O
function	O
similarly	O
to	O
subroutine	O
calls	O
and	O
are	O
used	O
for	O
a	O
variety	O
of	O
purposes	O
,	O
such	O
as	O
requesting	O
operating	B-General_Concept
system	I-General_Concept
services	O
and	O
interacting	O
with	O
device	B-Application
drivers	I-Application
(	O
e.g.	O
,	O
to	O
read	O
or	O
write	O
storage	O
media	O
)	O
.	O
</s>
<s>
Software	O
interrupts	B-Application
may	O
also	O
be	O
triggered	O
by	O
program	O
execution	O
errors	O
or	O
by	O
the	O
virtual	B-Architecture
memory	I-Architecture
system	O
.	O
</s>
<s>
Typically	O
,	O
the	O
operating	B-Operating_System
system	I-Operating_System
kernel	I-Operating_System
will	O
catch	O
and	O
handle	O
such	O
interrupts	B-Application
.	O
</s>
<s>
Some	O
interrupts	B-Application
are	O
handled	O
transparently	O
to	O
the	O
program	O
-	O
for	O
example	O
,	O
the	O
normal	O
resolution	O
of	O
a	O
page	B-General_Concept
fault	I-General_Concept
is	O
to	O
make	O
the	O
required	O
page	O
accessible	O
in	O
physical	O
memory	O
.	O
</s>
<s>
But	O
in	O
other	O
cases	O
such	O
as	O
a	O
segmentation	B-Error_Name
fault	I-Error_Name
the	O
operating	B-General_Concept
system	I-General_Concept
executes	O
a	O
process	B-Operating_System
callback	O
.	O
</s>
<s>
On	O
Unix-like	B-Operating_System
operating	I-Operating_System
systems	I-Operating_System
this	O
involves	O
sending	O
a	O
signal	B-Operating_System
such	O
as	O
SIGSEGV	B-Error_Name
,	O
SIGBUS	B-General_Concept
,	O
SIGILL	B-General_Concept
or	O
SIGFPE	B-General_Concept
,	O
which	O
may	O
either	O
call	O
a	O
signal	B-Operating_System
handler	I-Operating_System
or	O
execute	O
a	O
default	O
action	O
(	O
terminating	O
the	O
program	O
)	O
.	O
</s>
<s>
On	O
Windows	O
the	O
callback	O
is	O
made	O
using	O
Structured	B-Library
Exception	I-Library
Handling	I-Library
with	O
an	O
exception	O
code	O
such	O
as	O
STATUS_ACCESS_VIOLATION	O
or	O
STATUS_INTEGER_DIVIDE_BY_ZERO	O
.	O
</s>
<s>
In	O
a	O
kernel	B-Operating_System
process	B-Operating_System
,	O
it	O
is	O
often	O
the	O
case	O
that	O
some	O
types	O
of	O
software	O
interrupts	B-Application
are	O
not	O
supposed	O
to	O
happen	O
.	O
</s>
<s>
If	O
they	O
occur	O
nonetheless	O
,	O
an	O
operating	B-General_Concept
system	I-General_Concept
crash	O
may	O
result	O
.	O
</s>
<s>
The	O
terms	O
interrupt	B-Application
,	O
trap	B-Application
,	O
exception	O
,	O
fault	O
,	O
and	O
abort	O
are	O
used	O
to	O
distinguish	O
types	O
of	O
interrupts	B-Application
,	O
although	O
"	O
there	O
is	O
no	O
clear	O
consensus	O
as	O
to	O
the	O
exact	O
meaning	O
of	O
these	O
terms	O
"	O
.	O
</s>
<s>
The	O
term	O
trap	B-Application
may	O
refer	O
to	O
any	O
interrupt	B-Application
,	O
to	O
any	O
software	O
interrupt	B-Application
,	O
to	O
any	O
synchronous	O
software	O
interrupt	B-Application
,	O
or	O
only	O
to	O
interrupts	B-Application
caused	O
by	O
instructions	O
with	O
trap	B-Application
in	O
their	O
names	O
.	O
</s>
<s>
In	O
some	O
usages	O
,	O
the	O
term	O
trap	B-Application
refers	O
specifically	O
to	O
a	O
breakpoint	O
intended	O
to	O
initiate	O
a	O
context	B-Operating_System
switch	I-Operating_System
to	O
a	O
monitor	O
program	O
or	O
debugger	B-Application
.	O
</s>
<s>
It	O
may	O
also	O
refer	O
to	O
a	O
synchronous	O
interrupt	B-Application
caused	O
by	O
an	O
exceptional	O
condition	O
(	O
e.g.	O
,	O
division	B-Algorithm
by	I-Algorithm
zero	I-Algorithm
,	O
invalid	B-Error_Name
memory	I-Error_Name
access	I-Error_Name
,	O
illegal	B-Language
opcode	I-Language
)	O
,	O
although	O
the	O
term	O
exception	O
is	O
more	O
common	O
for	O
this	O
.	O
</s>
<s>
x86	B-Operating_System
divides	O
interrupts	B-Application
into	O
(	O
hardware	B-Architecture
)	O
interrupts	B-Application
and	O
software	O
exceptions	O
,	O
and	O
identifies	O
three	O
types	O
of	O
exceptions	O
:	O
faults	O
,	O
traps	B-Application
,	O
and	O
aborts	O
.	O
</s>
<s>
(	O
Hardware	B-Architecture
)	O
interrupts	B-Application
are	O
interrupts	B-Application
triggered	O
asynchronously	O
by	O
an	O
I/O	O
device	O
,	O
and	O
allow	O
the	O
program	O
to	O
be	O
restarted	O
with	O
no	O
loss	O
of	O
continuity	O
.	O
</s>
<s>
A	O
trap	B-Application
is	O
similar	O
to	O
a	O
fault	O
except	O
that	O
the	O
return	O
address	O
points	O
to	O
the	O
instruction	O
to	O
be	O
executed	O
after	O
the	O
trapping	O
instruction	O
;	O
one	O
prominent	O
use	O
is	O
to	O
implement	O
system	B-Operating_System
calls	I-Operating_System
.	O
</s>
<s>
An	O
abort	O
is	O
used	O
for	O
severe	O
errors	O
,	O
such	O
as	O
hardware	B-Architecture
errors	O
and	O
illegal	O
values	O
in	O
system	O
tables	O
,	O
and	O
often	O
does	O
not	O
allow	O
a	O
restart	O
of	O
the	O
program	O
.	O
</s>
<s>
ARM	B-Architecture
uses	O
the	O
term	O
exception	O
to	O
refer	O
to	O
all	O
types	O
of	O
interrupts	B-Application
,	O
and	O
divides	O
exceptions	O
into	O
(	O
hardware	B-Architecture
)	O
interrupts	B-Application
,	O
aborts	O
,	O
reset	O
,	O
and	O
exception-generating	O
instructions	O
.	O
</s>
<s>
Aborts	O
correspond	O
to	O
x86	B-Operating_System
exceptions	O
and	O
may	O
be	O
prefetch	O
aborts	O
(	O
failed	O
instruction	O
fetches	O
)	O
or	O
data	O
aborts	O
(	O
failed	O
data	O
accesses	O
)	O
,	O
and	O
may	O
be	O
synchronous	O
or	O
asynchronous	O
.	O
</s>
<s>
MMU	O
aborts	O
(	O
page	B-General_Concept
faults	I-General_Concept
)	O
are	O
synchronous	O
.	O
</s>
<s>
Each	O
interrupt	B-Application
signal	B-Operating_System
input	O
is	O
designed	O
to	O
be	O
triggered	O
by	O
either	O
a	O
logic	O
signal	B-Operating_System
level	O
or	O
a	O
particular	O
signal	B-Operating_System
edge	O
(	O
level	O
transition	O
)	O
.	O
</s>
<s>
Level-sensitive	O
inputs	O
continuously	O
request	O
processor	B-General_Concept
service	O
so	O
long	O
as	O
a	O
particular	O
(	O
high	O
or	O
low	O
)	O
logic	O
level	O
is	O
applied	O
to	O
the	O
input	O
.	O
</s>
<s>
Edge-sensitive	O
inputs	O
react	O
to	O
signal	B-Operating_System
edges	O
:	O
a	O
particular	O
(	O
rising	O
or	O
falling	O
)	O
edge	O
will	O
cause	O
a	O
service	O
request	O
to	O
be	O
latched	O
;	O
the	O
processor	B-General_Concept
resets	O
the	O
latch	O
when	O
the	O
interrupt	B-General_Concept
handler	I-General_Concept
executes	O
.	O
</s>
<s>
A	O
level-triggered	O
interrupt	B-Application
is	O
requested	O
by	O
holding	O
the	O
interrupt	B-Application
signal	B-Operating_System
at	O
its	O
particular	O
(	O
high	O
or	O
low	O
)	O
active	O
logic	O
level	O
.	O
</s>
<s>
A	O
device	O
invokes	O
a	O
level-triggered	O
interrupt	B-Application
by	O
driving	O
the	O
signal	B-Operating_System
to	O
and	O
holding	O
it	O
at	O
the	O
active	O
level	O
.	O
</s>
<s>
It	O
negates	O
the	O
signal	B-Operating_System
when	O
the	O
processor	B-General_Concept
commands	O
it	O
to	O
do	O
so	O
,	O
typically	O
after	O
the	O
device	O
has	O
been	O
serviced	O
.	O
</s>
<s>
The	O
processor	B-General_Concept
samples	O
the	O
interrupt	B-Application
input	O
signal	B-Operating_System
during	O
each	O
instruction	O
cycle	O
.	O
</s>
<s>
The	O
processor	B-General_Concept
will	O
recognize	O
the	O
interrupt	B-General_Concept
request	I-General_Concept
if	O
the	O
signal	B-Operating_System
is	O
asserted	O
when	O
sampling	O
occurs	O
.	O
</s>
<s>
Level-triggered	O
inputs	O
allow	O
multiple	O
devices	O
to	O
share	O
a	O
common	O
interrupt	B-Application
signal	B-Operating_System
via	O
wired-OR	O
connections	O
.	O
</s>
<s>
The	O
processor	B-General_Concept
polls	O
to	O
determine	O
which	O
devices	O
are	O
requesting	O
service	O
.	O
</s>
<s>
After	O
servicing	O
a	O
device	O
,	O
the	O
processor	B-General_Concept
may	O
again	O
poll	O
and	O
,	O
if	O
necessary	O
,	O
service	O
other	O
devices	O
before	O
exiting	O
the	O
ISR	O
.	O
</s>
<s>
An	O
edge-triggered	O
interrupt	B-Application
is	O
an	O
interrupt	B-Application
signaled	O
by	O
a	O
level	O
transition	O
on	O
the	O
interrupt	B-Application
line	I-Application
,	O
either	O
a	O
falling	O
edge	O
(	O
high	O
to	O
low	O
)	O
or	O
a	O
rising	O
edge	O
(	O
low	O
to	O
high	O
)	O
.	O
</s>
<s>
A	O
device	O
wishing	O
to	O
signal	B-Operating_System
an	O
interrupt	B-Application
drives	O
a	O
pulse	O
onto	O
the	O
line	O
and	O
then	O
releases	O
the	O
line	O
to	O
its	O
inactive	O
state	B-Application
.	O
</s>
<s>
If	O
the	O
pulse	O
is	O
too	O
short	O
to	O
be	O
detected	O
by	O
polled	B-General_Concept
I/O	I-General_Concept
then	O
special	O
hardware	B-Architecture
may	O
be	O
required	O
to	O
detect	O
it	O
.	O
</s>
<s>
The	O
important	O
part	O
of	O
edge	O
triggering	O
is	O
that	O
the	O
signal	B-Operating_System
must	O
transition	O
to	O
trigger	O
the	O
interrupt	B-Application
;	O
for	O
example	O
,	O
if	O
the	O
signal	B-Operating_System
was	O
high-low-low	O
,	O
there	O
would	O
only	O
be	O
one	O
falling	O
edge	O
interrupt	B-Application
triggered	O
,	O
and	O
the	O
continued	O
low	O
level	O
would	O
not	O
trigger	O
a	O
further	O
interrupt	B-Application
.	O
</s>
<s>
The	O
signal	B-Operating_System
must	O
return	O
to	O
the	O
high	O
level	O
and	O
fall	O
again	O
in	O
order	O
to	O
trigger	O
a	O
further	O
interrupt	B-Application
.	O
</s>
<s>
This	O
contrasts	O
with	O
a	O
level	O
trigger	O
where	O
the	O
low	O
level	O
would	O
continue	O
to	O
create	O
interrupts	B-Application
(	O
if	O
they	O
are	O
enabled	O
)	O
until	O
the	O
signal	B-Operating_System
returns	O
to	O
its	O
high	O
level	O
.	O
</s>
<s>
Computers	O
with	O
edge-triggered	O
interrupts	B-Application
may	O
include	O
an	O
interrupt	B-Application
register	O
that	O
retains	O
the	O
status	O
of	O
pending	O
interrupts	B-Application
.	O
</s>
<s>
Systems	O
with	O
interrupt	B-Application
registers	B-General_Concept
generally	O
have	O
interrupt	B-Architecture
mask	I-Architecture
registers	I-Architecture
as	O
well	O
.	O
</s>
<s>
The	O
processor	B-General_Concept
samples	O
the	O
interrupt	B-Application
trigger	O
signals	B-Operating_System
or	O
interrupt	B-Application
register	O
during	O
each	O
instruction	O
cycle	O
,	O
and	O
will	O
process	B-Operating_System
the	O
highest	O
priority	O
enabled	O
interrupt	B-Application
found	O
.	O
</s>
<s>
Regardless	O
of	O
the	O
triggering	O
method	O
,	O
the	O
processor	B-General_Concept
will	O
begin	O
interrupt	B-Application
processing	O
at	O
the	O
next	B-General_Concept
instruction	I-General_Concept
boundary	O
following	O
a	O
detected	O
trigger	O
,	O
thus	O
ensuring	O
:	O
</s>
<s>
The	O
processor	B-General_Concept
status	O
is	O
saved	O
in	O
a	O
known	O
manner	O
.	O
</s>
<s>
No	O
instruction	O
beyond	O
the	O
one	O
pointed	O
to	O
by	O
the	O
PC	O
has	O
been	O
executed	O
,	O
or	O
any	O
such	O
instructions	O
are	O
undone	O
before	O
handling	O
the	O
interrupt	B-Application
.	O
</s>
<s>
The	O
execution	O
state	B-Application
of	O
the	O
instruction	O
pointed	O
to	O
by	O
the	O
PC	O
is	O
known	O
.	O
</s>
<s>
Interrupts	B-Application
may	O
be	O
implemented	O
in	O
hardware	B-Architecture
as	O
a	O
distinct	O
component	O
with	O
control	O
lines	O
,	O
or	O
they	O
may	O
be	O
integrated	O
into	O
the	O
.	O
</s>
<s>
If	O
implemented	O
in	O
hardware	B-Architecture
as	O
a	O
distinct	O
component	O
,	O
an	O
interrupt	B-Architecture
controller	I-Architecture
circuit	O
such	O
as	O
the	O
IBM	O
PC	O
's	O
Programmable	B-Architecture
Interrupt	I-Architecture
Controller	I-Architecture
(	O
PIC	O
)	O
may	O
be	O
connected	O
between	O
the	O
interrupting	B-Application
device	O
and	O
the	O
processor	B-General_Concept
's	O
interrupt	B-Application
pin	O
to	O
multiplex	B-Architecture
several	O
sources	O
of	O
interrupt	B-Application
onto	O
the	O
one	O
or	O
two	O
CPU	B-Device
lines	O
typically	O
available	O
.	O
</s>
<s>
If	O
implemented	O
as	O
part	O
of	O
the	O
memory	B-General_Concept
controller	I-General_Concept
,	O
interrupts	B-Application
are	O
mapped	O
into	O
the	O
system	O
's	O
memory	O
address	B-General_Concept
space	I-General_Concept
.	O
</s>
<s>
Multiple	O
devices	O
may	O
share	O
an	O
edge-triggered	O
interrupt	B-Application
line	I-Application
if	O
they	O
are	O
designed	O
to	O
.	O
</s>
<s>
The	O
interrupt	B-Application
line	I-Application
must	O
have	O
a	O
pull-down	O
or	O
pull-up	O
resistor	O
so	O
that	O
when	O
not	O
actively	O
driven	O
it	O
settles	O
to	O
its	O
inactive	O
state	B-Application
,	O
which	O
is	O
the	O
default	O
state	B-Application
of	O
it	O
.	O
</s>
<s>
Devices	O
signal	B-Operating_System
an	O
interrupt	B-Application
by	O
briefly	O
driving	O
the	O
line	O
to	O
its	O
non-default	O
state	B-Application
,	O
and	O
let	O
the	O
line	O
float	B-Algorithm
(	O
do	O
not	O
actively	O
drive	O
it	O
)	O
when	O
not	O
signaling	O
an	O
interrupt	B-Application
.	O
</s>
<s>
(	O
This	O
is	O
analogous	O
to	O
the	O
pull	O
cord	O
on	O
some	O
buses	O
and	O
trolleys	O
that	O
any	O
passenger	O
can	O
pull	O
to	O
signal	B-Operating_System
the	O
driver	O
that	O
they	O
are	O
requesting	O
a	O
stop	O
.	O
)	O
</s>
<s>
However	O
,	O
interrupt	B-Application
pulses	O
from	O
different	O
devices	O
may	O
merge	O
if	O
they	O
occur	O
close	O
in	O
time	O
.	O
</s>
<s>
To	O
avoid	O
losing	O
interrupts	B-Application
the	O
CPU	B-Device
must	O
trigger	O
on	O
the	O
trailing	O
edge	O
of	O
the	O
pulse	O
(	O
e.g.	O
</s>
<s>
After	O
detecting	O
an	O
interrupt	B-Application
the	O
CPU	B-Device
must	O
check	O
all	O
the	O
devices	O
for	O
service	O
requirements	O
.	O
</s>
<s>
Edge-triggered	O
interrupts	B-Application
do	O
not	O
suffer	O
the	O
problems	O
that	O
level-triggered	O
interrupts	B-Application
have	O
with	O
sharing	O
.	O
</s>
<s>
Service	O
of	O
a	O
low-priority	O
device	O
can	O
be	O
postponed	O
arbitrarily	O
,	O
while	O
interrupts	B-Application
from	O
high-priority	O
devices	O
continue	O
to	O
be	O
received	O
and	O
get	O
serviced	O
.	O
</s>
<s>
If	O
there	O
is	O
a	O
device	O
that	O
the	O
CPU	B-Device
does	O
not	O
know	O
how	O
to	O
service	O
,	O
which	O
may	O
raise	O
spurious	B-Application
interrupts	I-Application
,	O
it	O
wo	O
n't	O
interfere	O
with	O
interrupt	B-Application
signaling	O
of	O
other	O
devices	O
.	O
</s>
<s>
However	O
,	O
it	O
is	O
easy	O
for	O
an	O
edge-triggered	O
interrupt	B-Application
to	O
be	O
missed	O
-	O
for	O
example	O
,	O
when	O
interrupts	B-Application
are	O
masked	O
for	O
a	O
period	O
-	O
and	O
unless	O
there	O
is	O
some	O
type	O
of	O
hardware	B-Architecture
latch	O
that	O
records	O
the	O
event	O
it	O
is	O
impossible	O
to	O
recover	O
.	O
</s>
<s>
This	O
problem	O
caused	O
many	O
"	O
lockups	O
"	O
in	O
early	O
computer	B-Architecture
hardware	I-Architecture
because	O
the	O
processor	B-General_Concept
did	O
not	O
know	O
it	O
was	O
expected	O
to	O
do	O
something	O
.	O
</s>
<s>
More	O
modern	O
hardware	B-Architecture
often	O
has	O
one	O
or	O
more	O
interrupt	B-Application
status	O
registers	B-General_Concept
that	O
latch	O
interrupts	B-Application
requests	O
;	O
well-written	O
edge-driven	O
interrupt	B-Application
handling	I-Application
code	O
can	O
check	O
these	O
registers	B-General_Concept
to	O
ensure	O
no	O
events	O
are	O
missed	O
.	O
</s>
<s>
The	O
elderly	O
Industry	B-Architecture
Standard	I-Architecture
Architecture	I-Architecture
(	O
ISA	B-Architecture
)	O
bus	O
uses	O
edge-triggered	O
interrupts	B-Application
,	O
without	O
mandating	O
that	O
devices	O
be	O
able	O
to	O
share	O
IRQ	B-General_Concept
lines	O
,	O
but	O
all	O
mainstream	O
ISA	B-Architecture
motherboards	O
include	O
pull-up	O
resistors	O
on	O
their	O
IRQ	B-General_Concept
lines	O
,	O
so	O
well-behaved	O
ISA	B-Architecture
devices	O
sharing	O
IRQ	B-General_Concept
lines	O
should	O
just	O
work	O
fine	O
.	O
</s>
<s>
The	O
parallel	B-Device
port	I-Device
also	O
uses	O
edge-triggered	O
interrupts	B-Application
.	O
</s>
<s>
Many	O
older	O
devices	O
assume	O
that	O
they	O
have	O
exclusive	O
use	O
of	O
IRQ	B-General_Concept
lines	O
,	O
making	O
it	O
electrically	O
unsafe	O
to	O
share	O
them	O
.	O
</s>
<s>
Next	O
is	O
by	O
bus	O
(	O
all	O
connected	O
to	O
the	O
same	O
line	O
listening	O
)	O
:	O
cards	O
on	O
a	O
bus	O
must	O
know	O
when	O
they	O
are	O
to	O
talk	O
and	O
not	O
talk	O
(	O
i.e.	O
,	O
the	O
ISA	B-Architecture
bus	I-Architecture
)	O
.	O
</s>
<s>
Logic	O
gates	O
expect	O
a	O
continual	O
data	O
flow	O
that	O
is	O
monitored	O
for	O
key	O
signals	B-Operating_System
.	O
</s>
<s>
Triggering	O
for	O
software	O
interrupts	B-Application
must	O
be	O
built	O
into	O
the	O
software	O
(	O
both	O
in	O
OS	O
and	O
app	O
)	O
.	O
</s>
<s>
A	O
'	O
C	O
 '	O
app	O
has	O
a	O
trigger	O
table	O
(	O
a	O
table	O
of	O
functions	O
)	O
in	O
its	O
header	O
,	O
which	O
both	O
the	O
app	O
and	O
OS	O
know	O
of	O
and	O
use	O
appropriately	O
that	O
is	O
not	O
related	O
to	O
hardware	B-Architecture
.	O
</s>
<s>
However	O
do	O
not	O
confuse	O
this	O
with	O
hardware	B-Architecture
interrupts	B-Application
which	O
signal	B-Operating_System
the	O
CPU	B-Device
(	O
the	O
CPU	B-Device
enacts	O
software	O
from	O
a	O
table	O
of	O
functions	O
,	O
similarly	O
to	O
software	O
interrupts	B-Application
)	O
.	O
</s>
<s>
Multiple	O
devices	O
sharing	O
an	O
interrupt	B-Application
line	I-Application
(	O
of	O
any	O
triggering	O
style	O
)	O
all	O
act	O
as	O
spurious	B-Application
interrupt	I-Application
sources	O
with	O
respect	O
to	O
each	O
other	O
.	O
</s>
<s>
With	O
many	O
devices	O
on	O
one	O
line	O
,	O
the	O
workload	O
in	O
servicing	O
interrupts	B-Application
grows	O
in	O
proportion	O
to	O
the	O
square	O
of	O
the	O
number	O
of	O
devices	O
.	O
</s>
<s>
It	O
is	O
therefore	O
preferred	O
to	O
spread	O
devices	O
evenly	O
across	O
the	O
available	O
interrupt	B-Application
lines	I-Application
.	O
</s>
<s>
Shortage	O
of	O
interrupt	B-Application
lines	I-Application
is	O
a	O
problem	O
in	O
older	O
system	O
designs	O
where	O
the	O
interrupt	B-Application
lines	I-Application
are	O
distinct	O
physical	O
conductors	O
.	O
</s>
<s>
Message-signaled	B-Architecture
interrupts	I-Architecture
,	O
where	O
the	O
interrupt	B-Application
line	I-Application
is	O
virtual	O
,	O
are	O
favored	O
in	O
new	O
system	O
architectures	O
(	O
such	O
as	O
PCI	O
Express	O
)	O
and	O
relieve	O
this	O
problem	O
to	O
a	O
considerable	O
extent	O
.	O
</s>
<s>
Such	O
devices	O
cannot	O
tolerate	O
spurious	B-Application
interrupts	I-Application
,	O
and	O
so	O
also	O
cannot	O
tolerate	O
sharing	O
an	O
interrupt	B-Application
line	I-Application
.	O
</s>
<s>
ISA	B-Architecture
cards	I-Architecture
,	O
due	O
to	O
often	O
cheap	O
design	O
and	O
construction	O
,	O
are	O
notorious	O
for	O
this	O
problem	O
.	O
</s>
<s>
Such	O
devices	O
are	O
becoming	O
much	O
rarer	O
,	O
as	O
hardware	B-Architecture
logic	O
becomes	O
cheaper	O
and	O
new	O
system	O
architectures	O
mandate	O
shareable	O
interrupts	B-Application
.	O
</s>
<s>
The	O
hardware	B-Architecture
not	O
only	O
looks	O
for	O
an	O
edge	O
,	O
but	O
it	O
also	O
verifies	O
that	O
the	O
interrupt	B-Application
signal	B-Operating_System
stays	O
active	O
for	O
a	O
certain	O
period	O
of	O
time	O
.	O
</s>
<s>
A	O
common	O
use	O
of	O
a	O
hybrid	O
interrupt	B-Application
is	O
for	O
the	O
NMI	O
(	O
non-maskable	O
interrupt	B-Application
)	O
input	O
.	O
</s>
<s>
Because	O
NMIs	O
generally	O
signal	B-Operating_System
major	O
–	O
or	O
even	O
catastrophic	O
–	O
system	O
events	O
,	O
a	O
good	O
implementation	O
of	O
this	O
signal	B-Operating_System
tries	O
to	O
ensure	O
that	O
the	O
interrupt	B-Application
is	O
valid	O
by	O
verifying	O
that	O
it	O
remains	O
active	O
for	O
a	O
period	O
of	O
time	O
.	O
</s>
<s>
This	O
2-step	O
approach	O
helps	O
to	O
eliminate	O
false	O
interrupts	B-Application
from	O
affecting	O
the	O
system	O
.	O
</s>
<s>
A	O
message-signaled	O
interrupt	B-Application
does	O
not	O
use	O
a	O
physical	O
interrupt	B-Application
line	I-Application
.	O
</s>
<s>
Instead	O
,	O
a	O
device	O
signals	B-Operating_System
its	O
request	O
for	O
service	O
by	O
sending	O
a	O
short	O
message	O
over	O
some	O
communications	O
medium	O
,	O
typically	O
a	O
computer	B-General_Concept
bus	I-General_Concept
.	O
</s>
<s>
The	O
message	O
might	O
be	O
of	O
a	O
type	O
reserved	O
for	O
interrupts	B-Application
,	O
or	O
it	O
might	O
be	O
of	O
some	O
pre-existing	O
type	O
such	O
as	O
a	O
memory	O
write	O
.	O
</s>
<s>
Message-signalled	O
interrupts	B-Application
behave	O
very	O
much	O
like	O
edge-triggered	O
interrupts	B-Application
,	O
in	O
that	O
the	O
interrupt	B-Application
is	O
a	O
momentary	O
signal	B-Operating_System
rather	O
than	O
a	O
continuous	O
condition	O
.	O
</s>
<s>
Interrupt-handling	O
software	O
treats	O
the	O
two	O
in	O
much	O
the	O
same	O
manner	O
.	O
</s>
<s>
Typically	O
,	O
multiple	O
pending	O
message-signaled	B-Architecture
interrupts	I-Architecture
with	O
the	O
same	O
message	O
(	O
the	O
same	O
virtual	O
interrupt	B-Application
line	I-Application
)	O
are	O
allowed	O
to	O
merge	O
,	O
just	O
as	O
closely	O
spaced	O
edge-triggered	O
interrupts	B-Application
can	O
merge	O
.	O
</s>
<s>
Message-signalled	O
interrupt	B-General_Concept
vectors	I-General_Concept
can	O
be	O
shared	O
,	O
to	O
the	O
extent	O
that	O
the	O
underlying	O
communication	O
medium	O
can	O
be	O
shared	O
.	O
</s>
<s>
Because	O
the	O
identity	O
of	O
the	O
interrupt	B-Application
is	O
indicated	O
by	O
a	O
pattern	O
of	O
data	O
bits	O
,	O
not	O
requiring	O
a	O
separate	O
physical	O
conductor	O
,	O
many	O
more	O
distinct	O
interrupts	B-Application
can	O
be	O
efficiently	O
handled	O
.	O
</s>
<s>
Interrupt	B-Application
messages	O
can	O
also	O
be	O
passed	O
over	O
a	O
serial	O
bus	O
,	O
not	O
requiring	O
any	O
additional	O
lines	O
.	O
</s>
<s>
PCI	O
Express	O
,	O
a	O
serial	O
computer	B-General_Concept
bus	I-General_Concept
,	O
uses	O
message-signaled	B-Architecture
interrupts	I-Architecture
exclusively	O
.	O
</s>
<s>
In	O
a	O
push	O
button	O
analogy	O
applied	O
to	O
computer	B-General_Concept
systems	I-General_Concept
,	O
the	O
term	O
doorbell	O
or	O
doorbell	O
interrupt	B-Application
is	O
often	O
used	O
to	O
describe	O
a	O
mechanism	O
whereby	O
a	O
software	O
system	O
can	O
signal	B-Operating_System
or	O
notify	O
a	O
computer	B-Architecture
hardware	I-Architecture
device	O
that	O
there	O
is	O
some	O
work	O
to	O
be	O
done	O
.	O
</s>
<s>
It	O
is	O
this	O
act	O
of	O
writing	O
to	O
the	O
doorbell	O
region	O
of	O
memory	O
that	O
"	O
rings	O
the	O
bell	O
"	O
and	O
notifies	O
the	O
hardware	B-Architecture
device	O
that	O
the	O
data	O
are	O
ready	O
and	O
waiting	O
.	O
</s>
<s>
The	O
hardware	B-Architecture
device	O
would	O
now	O
know	O
that	O
the	O
data	O
are	O
valid	O
and	O
can	O
be	O
acted	O
upon	O
.	O
</s>
<s>
It	O
would	O
typically	O
write	O
the	O
data	O
to	O
a	O
hard	B-Device
disk	I-Device
drive	I-Device
,	O
or	O
send	O
them	O
over	O
a	O
network	B-Architecture
,	O
or	O
encrypt	O
them	O
,	O
etc	O
.	O
</s>
<s>
The	O
term	O
doorbell	O
interrupt	B-Application
is	O
usually	O
a	O
misnomer	O
.	O
</s>
<s>
It	O
is	O
similar	O
to	O
an	O
interrupt	B-Application
,	O
because	O
it	O
causes	O
some	O
work	O
to	O
be	O
done	O
by	O
the	O
device	O
;	O
however	O
,	O
the	O
doorbell	O
region	O
is	O
sometimes	O
implemented	O
as	O
a	O
polled	B-General_Concept
region	O
,	O
sometimes	O
the	O
doorbell	O
region	O
writes	O
through	O
to	O
physical	O
device	O
registers	B-General_Concept
,	O
and	O
sometimes	O
the	O
doorbell	O
region	O
is	O
hardwired	O
directly	O
to	O
physical	O
device	O
registers	B-General_Concept
.	O
</s>
<s>
When	O
either	O
writing	O
through	O
or	O
directly	O
to	O
physical	O
device	O
registers	B-General_Concept
,	O
this	O
may	O
cause	O
a	O
real	O
interrupt	B-Application
to	O
occur	O
at	O
the	O
device	O
's	O
central	O
processor	B-General_Concept
unit	O
(	O
CPU	B-Device
)	O
,	O
if	O
it	O
has	O
one	O
.	O
</s>
<s>
Doorbell	O
interrupts	B-Application
can	O
be	O
compared	O
to	O
Message	B-Architecture
Signaled	I-Architecture
Interrupts	I-Architecture
,	O
as	O
they	O
have	O
some	O
similarities	O
.	O
</s>
<s>
In	O
multiprocessor	B-Operating_System
systems	O
,	O
a	O
processor	B-General_Concept
may	O
send	O
an	O
interrupt	B-General_Concept
request	I-General_Concept
to	O
another	O
processor	B-General_Concept
via	O
inter-processor	B-Device
interrupts	I-Device
(	O
IPI	O
)	O
.	O
</s>
<s>
Interrupts	B-Application
provide	O
low	O
overhead	O
and	O
good	O
latency	B-General_Concept
at	O
low	O
load	O
,	O
but	O
degrade	O
significantly	O
at	O
high	O
interrupt	B-Application
rate	O
unless	O
care	O
is	O
taken	O
to	O
prevent	O
several	O
pathologies	O
.	O
</s>
<s>
The	O
phenomenon	O
where	O
the	O
overall	O
system	O
performance	O
is	O
severely	O
hindered	O
by	O
excessive	O
amounts	O
of	O
processing	O
time	O
spent	O
handling	O
interrupts	B-Application
is	O
called	O
an	O
interrupt	B-General_Concept
storm	I-General_Concept
.	O
</s>
<s>
There	O
are	O
various	O
forms	O
of	O
livelocks	B-Application
,	O
when	O
the	O
system	O
spends	O
all	O
of	O
its	O
time	O
processing	O
interrupts	B-Application
to	O
the	O
exclusion	O
of	O
other	O
required	O
tasks	O
.	O
</s>
<s>
Under	O
extreme	O
conditions	O
,	O
a	O
large	O
number	O
of	O
interrupts	B-Application
(	O
like	O
very	O
high	O
network	B-Architecture
traffic	O
)	O
may	O
completely	O
stall	O
the	O
system	O
.	O
</s>
<s>
To	O
avoid	O
such	O
problems	O
,	O
an	O
operating	B-General_Concept
system	I-General_Concept
must	O
schedule	O
network	B-Architecture
interrupt	B-Application
handling	I-Application
as	O
carefully	O
as	O
it	O
schedules	O
process	B-Operating_System
execution	O
.	O
</s>
<s>
With	O
multi-core	O
processors	O
,	O
additional	O
performance	O
improvements	O
in	O
interrupt	B-Application
handling	I-Application
can	O
be	O
achieved	O
through	O
receive-side	O
scaling	O
(	O
RSS	O
)	O
when	O
multiqueue	O
NICs	O
are	O
used	O
.	O
</s>
<s>
Such	O
NICs	O
provide	O
multiple	O
receive	O
queues	B-Application
associated	O
to	O
separate	O
interrupts	B-Application
;	O
by	O
routing	O
each	O
of	O
those	O
interrupts	B-Application
to	O
different	O
cores	O
,	O
processing	O
of	O
the	O
interrupt	B-General_Concept
requests	I-General_Concept
triggered	O
by	O
the	O
network	B-Architecture
traffic	O
received	O
by	O
a	O
single	O
NIC	O
can	O
be	O
distributed	O
among	O
multiple	O
cores	O
.	O
</s>
<s>
Distribution	O
of	O
the	O
interrupts	B-Application
among	O
cores	O
can	O
be	O
performed	O
automatically	O
by	O
the	O
operating	B-General_Concept
system	I-General_Concept
,	O
or	O
the	O
routing	O
of	O
interrupts	B-Application
(	O
usually	O
referred	O
to	O
as	O
IRQ	B-General_Concept
affinity	O
)	O
can	O
be	O
manually	O
configured	O
.	O
</s>
<s>
A	O
purely	O
software-based	O
implementation	O
of	O
the	O
receiving	O
traffic	O
distribution	O
,	O
known	O
as	O
receive	O
packet	O
steering	O
(	O
RPS	O
)	O
,	O
distributes	O
received	O
traffic	O
among	O
cores	O
later	O
in	O
the	O
data	O
path	O
,	O
as	O
part	O
of	O
the	O
interrupt	B-General_Concept
handler	I-General_Concept
functionality	O
.	O
</s>
<s>
Advantages	O
of	O
RPS	O
over	O
RSS	O
include	O
no	O
requirements	O
for	O
specific	O
hardware	B-Architecture
,	O
more	O
advanced	O
traffic	O
distribution	O
filters	O
,	O
and	O
reduced	O
rate	O
of	O
interrupts	B-Application
produced	O
by	O
a	O
NIC	O
.	O
</s>
<s>
As	O
a	O
downside	O
,	O
RPS	O
increases	O
the	O
rate	O
of	O
inter-processor	B-Device
interrupts	I-Device
(	O
IPIs	O
)	O
.	O
</s>
<s>
Receive	O
flow	O
steering	O
(	O
RFS	O
)	O
takes	O
the	O
software-based	O
approach	O
further	O
by	O
accounting	O
for	O
application	B-General_Concept
locality	I-General_Concept
;	O
further	O
performance	O
improvements	O
are	O
achieved	O
by	O
processing	O
interrupt	B-General_Concept
requests	I-General_Concept
by	O
the	O
same	O
cores	O
on	O
which	O
particular	O
network	B-Architecture
packets	O
will	O
be	O
consumed	O
by	O
the	O
targeted	O
application	O
.	O
</s>
<s>
Interrupts	B-Application
are	O
commonly	O
used	O
to	O
service	O
hardware	B-Architecture
timers	O
,	O
transfer	O
data	O
to	O
and	O
from	O
storage	O
(	O
e.g.	O
,	O
disk	O
I/O	O
)	O
and	O
communication	O
interfaces	O
(	O
e.g.	O
,	O
UART	O
,	O
Ethernet	O
)	O
,	O
handle	O
keyboard	B-Device
and	O
mouse	B-Device
events	O
,	O
and	O
to	O
respond	O
to	O
any	O
other	O
time-sensitive	O
events	O
as	O
required	O
by	O
the	O
application	O
system	O
.	O
</s>
<s>
Non-maskable	O
interrupts	O
are	O
typically	O
used	O
to	O
respond	O
to	O
high-priority	O
requests	O
such	O
as	O
watchdog	B-Application
timer	I-Application
timeouts	O
,	O
power-down	O
signals	B-Operating_System
and	O
traps	B-Application
.	O
</s>
<s>
Hardware	B-Architecture
timers	O
are	O
often	O
used	O
to	O
generate	O
periodic	O
interrupts	B-Application
.	O
</s>
<s>
In	O
some	O
applications	O
,	O
such	O
interrupts	B-Application
are	O
counted	O
by	O
the	O
interrupt	B-General_Concept
handler	I-General_Concept
to	O
keep	O
track	O
of	O
absolute	O
or	O
elapsed	O
time	O
,	O
or	O
used	O
by	O
the	O
OS	O
task	O
scheduler	O
to	O
manage	O
execution	O
of	O
running	O
processes	B-Operating_System
,	O
or	O
both	O
.	O
</s>
<s>
Periodic	O
interrupts	B-Application
are	O
also	O
commonly	O
used	O
to	O
invoke	O
sampling	O
from	O
input	O
devices	O
such	O
as	O
analog-to-digital	O
converters	O
,	O
incremental	O
encoder	O
interfaces	O
,	O
and	O
GPIO	B-Architecture
inputs	O
,	O
and	O
to	O
program	O
output	O
devices	O
such	O
as	O
digital-to-analog	O
converters	O
,	O
motor	O
controllers	O
,	O
and	O
GPIO	B-Architecture
outputs	O
.	O
</s>
<s>
A	O
disk	O
interrupt	B-Application
signals	B-Operating_System
the	O
completion	O
of	O
a	O
data	O
transfer	O
from	O
or	O
to	O
the	O
disk	O
peripheral	O
;	O
this	O
may	O
cause	O
a	O
process	B-Operating_System
to	O
run	O
which	O
is	O
waiting	O
to	O
read	O
or	O
write	O
.	O
</s>
<s>
A	O
power-off	O
interrupt	B-Application
predicts	O
imminent	O
loss	O
of	O
power	O
,	O
allowing	O
the	O
computer	O
to	O
perform	O
an	O
orderly	O
shut-down	O
while	O
there	O
still	O
remains	O
enough	O
power	O
to	O
do	O
so	O
.	O
</s>
<s>
Keyboard	B-Device
interrupts	B-Application
typically	O
cause	O
keystrokes	O
to	O
be	O
buffered	O
so	O
as	O
to	O
implement	O
typeahead	B-Device
.	O
</s>
<s>
Interrupts	B-Application
are	O
sometimes	O
used	O
to	O
emulate	O
instructions	O
which	O
are	O
unimplemented	O
on	O
some	O
computers	O
in	O
a	O
product	O
family	O
.	O
</s>
<s>
For	O
example	O
floating	B-Algorithm
point	I-Algorithm
instructions	O
may	O
be	O
implemented	O
in	O
hardware	B-Architecture
on	O
some	O
systems	O
and	O
emulated	O
on	O
lower-cost	O
systems	O
.	O
</s>
<s>
In	O
the	O
latter	O
case	O
,	O
execution	O
of	O
an	O
unimplemented	O
floating	B-Algorithm
point	I-Algorithm
instruction	O
will	O
cause	O
an	O
"	O
illegal	B-Language
instruction	I-Language
"	O
exception	O
interrupt	B-Application
.	O
</s>
<s>
The	O
interrupt	B-General_Concept
handler	I-General_Concept
will	O
implement	O
the	O
floating	B-Algorithm
point	I-Algorithm
function	O
in	O
software	O
and	O
then	O
return	O
to	O
the	O
interrupted	O
program	O
as	O
if	O
the	O
hardware-implemented	O
instruction	O
had	O
been	O
executed	O
.	O
</s>
<s>
Interrupts	B-Application
are	O
similar	O
to	O
signals	B-Operating_System
,	O
the	O
difference	O
being	O
that	O
signals	B-Operating_System
are	O
used	O
for	O
inter-process	B-Operating_System
communication	I-Operating_System
(	O
IPC	O
)	O
,	O
mediated	O
by	O
the	O
kernel	B-Operating_System
(	O
possibly	O
via	O
system	B-Operating_System
calls	I-Operating_System
)	O
and	O
handled	O
by	O
processes	B-Operating_System
,	O
while	O
interrupts	B-Application
are	O
mediated	O
by	O
the	O
processor	B-General_Concept
and	O
handled	O
by	O
the	O
kernel	B-Operating_System
.	O
</s>
<s>
The	O
kernel	B-Operating_System
may	O
pass	O
an	O
interrupt	B-Application
as	O
a	O
signal	B-Operating_System
to	O
the	O
process	B-Operating_System
that	O
caused	O
it	O
(	O
typical	O
examples	O
are	O
SIGSEGV	B-Error_Name
,	O
SIGBUS	B-General_Concept
,	O
SIGILL	B-General_Concept
and	O
SIGFPE	B-General_Concept
)	O
.	O
</s>
<s>
Hardware	B-Architecture
interrupts	B-Application
were	O
introduced	O
as	O
an	O
optimization	O
,	O
eliminating	O
unproductive	O
waiting	O
time	O
in	O
polling	B-General_Concept
loops	I-General_Concept
,	O
waiting	O
for	O
external	O
events	O
.	O
</s>
<s>
The	O
first	O
system	O
to	O
use	O
this	O
approach	O
was	O
the	O
DYSEAC	B-Device
,	O
completed	O
in	O
1954	O
,	O
although	O
earlier	O
systems	O
provided	O
error	B-Application
trap	I-Application
functions	O
.	O
</s>
<s>
The	B-Operating_System
UNIVAC	I-Operating_System
1103A	O
computer	O
is	O
generally	O
credited	O
with	O
the	O
earliest	O
use	O
of	O
interrupts	B-Application
in	O
1953	O
.	O
</s>
<s>
Earlier	O
,	O
on	O
the	B-Operating_System
UNIVAC	I-Operating_System
I	O
(	O
1951	O
)	O
"	O
Arithmetic	O
overflow	O
either	O
triggered	O
the	O
execution	O
of	O
a	O
two-instruction	O
fix-up	O
routine	O
at	O
address	O
0	O
,	O
or	O
,	O
at	O
the	O
programmer	O
's	O
option	O
,	O
caused	O
the	O
computer	O
to	O
stop.	O
"	O
</s>
<s>
The	O
IBM	B-Device
650	I-Device
(	O
1954	O
)	O
incorporated	O
the	O
first	O
occurrence	O
of	O
interrupt	B-Application
masking	O
.	O
</s>
<s>
The	O
National	O
Bureau	O
of	O
Standards	O
DYSEAC	B-Device
(	O
1954	O
)	O
was	O
the	O
first	O
to	O
use	O
interrupts	B-Application
for	O
I/O	O
.	O
</s>
<s>
The	O
IBM	B-Device
704	I-Device
was	O
the	O
first	O
to	O
use	O
interrupts	B-Application
for	O
debugging	O
,	O
with	O
a	O
"	O
transfer	O
trap	B-Application
"	O
,	O
which	O
could	O
invoke	O
a	O
special	O
routine	O
when	O
a	O
branch	O
instruction	O
was	O
encountered	O
.	O
</s>
<s>
The	O
MIT	O
Lincoln	O
Laboratory	O
TX-2	B-Device
system	O
(	O
1957	O
)	O
was	O
the	O
first	O
to	O
provide	O
multiple	O
levels	O
of	O
priority	O
interrupts	B-Application
.	O
</s>
