<s>
The	O
iAPX	B-Device
432	I-Device
(	O
Intel	B-Device
Advanced	I-Device
Performance	I-Device
Architecture	I-Device
)	O
is	O
a	O
discontinued	O
computer	B-General_Concept
architecture	I-General_Concept
introduced	O
in	O
1981	O
.	O
</s>
<s>
It	O
was	O
Intel	O
's	O
first	O
32-bit	O
processor	B-Architecture
design	O
.	O
</s>
<s>
The	O
main	O
processor	B-Architecture
of	O
the	O
architecture	O
,	O
the	O
general	O
data	O
processor	B-Architecture
,	O
is	O
implemented	O
as	O
a	O
set	O
of	O
two	O
separate	O
integrated	O
circuits	O
,	O
due	O
to	O
technical	O
limitations	O
at	O
the	O
time	O
.	O
</s>
<s>
Although	O
some	O
early	O
8086	B-General_Concept
,	O
80186	O
and	O
80286-based	O
systems	O
and	O
manuals	O
also	O
used	O
the	O
iAPX	B-Device
prefix	O
for	O
marketing	O
reasons	O
,	O
the	O
iAPX	B-Device
432	I-Device
and	O
the	O
8086	B-General_Concept
processor	B-Architecture
lines	O
are	O
completely	O
separate	O
designs	O
with	O
completely	O
different	O
instruction	B-General_Concept
sets	I-General_Concept
.	O
</s>
<s>
The	O
project	O
started	O
in	O
1975	O
as	O
the	O
8800	O
(	O
after	O
the	O
8008	B-General_Concept
and	O
the	O
8080	B-General_Concept
)	O
and	O
was	O
intended	O
to	O
be	O
Intel	O
's	O
major	O
design	O
for	O
the	O
1980s	O
.	O
</s>
<s>
Unlike	O
the	O
8086	B-General_Concept
,	O
which	O
was	O
designed	O
the	O
following	O
year	O
as	O
a	O
successor	O
to	O
the	O
8080	B-General_Concept
,	O
the	O
iAPX	B-Device
432	I-Device
was	O
a	O
radical	O
departure	O
from	O
Intel	O
's	O
previous	O
designs	O
meant	O
for	O
a	O
different	O
market	O
niche	O
,	O
and	O
completely	O
unrelated	O
to	O
the	O
8080	B-General_Concept
or	O
x86	B-Operating_System
product	O
lines	O
.	O
</s>
<s>
The	O
iAPX	B-Device
432	I-Device
project	O
is	O
considered	O
a	O
commercial	O
failure	O
for	O
Intel	O
,	O
and	O
was	O
discontinued	O
in	O
1986	O
.	O
</s>
<s>
The	O
iAPX	B-Device
432	I-Device
was	O
referred	O
to	O
as	O
a	O
"	O
micromainframe	O
"	O
,	O
designed	O
to	O
be	O
programmed	O
entirely	O
in	O
high-level	O
languages	O
.	O
</s>
<s>
The	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
was	O
also	O
entirely	O
new	O
and	O
a	O
significant	O
departure	O
from	O
Intel	O
's	O
previous	O
8008	B-General_Concept
and	O
8080	B-General_Concept
processors	O
as	O
the	O
iAPX	B-Device
432	I-Device
programming	O
model	O
is	O
a	O
stack	B-Application
machine	I-Application
with	O
no	O
visible	O
general-purpose	O
registers	O
.	O
</s>
<s>
It	O
supports	O
object-oriented	B-Language
programming	I-Language
,	O
garbage	B-General_Concept
collection	I-General_Concept
and	O
multitasking	B-Operating_System
as	O
well	O
as	O
more	O
conventional	O
memory	B-General_Concept
management	I-General_Concept
directly	O
in	O
hardware	O
and	O
microcode	B-Device
.	O
</s>
<s>
Direct	O
support	O
for	O
various	O
data	B-General_Concept
structures	I-General_Concept
is	O
also	O
intended	O
to	O
allow	O
modern	O
operating	B-General_Concept
systems	I-General_Concept
to	O
be	O
implemented	O
using	O
far	O
less	O
program	O
code	B-Language
than	O
for	O
ordinary	O
processors	O
.	O
</s>
<s>
Intel	O
iMAX	B-Operating_System
432	I-Operating_System
is	O
a	O
discontinued	O
operating	B-General_Concept
system	I-General_Concept
for	O
the	O
432	O
,	O
written	O
entirely	O
in	O
Ada	B-Language
,	O
and	O
Ada	B-Language
was	O
also	O
the	O
intended	O
primary	O
language	O
for	O
application	O
programming	O
.	O
</s>
<s>
In	O
some	O
aspects	O
,	O
it	O
may	O
be	O
seen	O
as	O
a	O
high-level	B-Architecture
language	I-Architecture
computer	I-Architecture
architecture	I-Architecture
.	O
</s>
<s>
These	O
properties	O
and	O
features	O
resulted	O
in	O
a	O
hardware	O
and	O
microcode	B-Device
design	O
that	O
was	O
more	O
complex	O
than	O
most	O
processors	O
of	O
the	O
era	O
,	O
especially	O
microprocessors	B-Architecture
.	O
</s>
<s>
However	O
,	O
internal	O
and	O
external	O
buses	O
are	O
(	O
mostly	O
)	O
not	O
wider	O
than	O
16-bit	B-Device
,	O
and	O
,	O
just	O
like	O
in	O
other	O
32-bit	O
microprocessors	B-Architecture
of	O
the	O
era	O
(	O
such	O
as	O
the	O
68000	B-Device
or	O
the	O
32016	B-Device
)	O
,	O
32-bit	O
arithmetical	O
instructions	O
are	O
implemented	O
by	O
a	O
16-bit	B-Device
ALU	O
,	O
via	O
random	B-General_Concept
logic	I-General_Concept
and	O
microcode	B-Device
or	O
other	O
kinds	O
of	O
sequential	O
logic	O
.	O
</s>
<s>
The	O
iAPX	B-Device
432	I-Device
enlarged	O
address	O
space	O
over	O
the	O
8080	B-General_Concept
was	O
also	O
limited	O
by	O
the	O
fact	O
that	O
linear	B-General_Concept
addressing	I-General_Concept
of	O
data	O
could	O
still	O
only	O
use	O
16-bit	B-Device
offsets	O
,	O
somewhat	O
akin	O
to	O
Intel	O
's	O
first	O
8086-based	O
designs	O
,	O
including	O
the	O
contemporary	O
80286	B-General_Concept
(	O
the	O
new	O
32-bit	O
segment	O
offsets	O
of	O
the	O
80386	B-General_Concept
architecture	O
was	O
described	O
publicly	O
in	O
detail	O
in	O
1984	O
)	O
.	O
</s>
<s>
Along	O
with	O
the	O
lack	O
of	O
optimization	O
in	O
a	O
premature	O
Ada	B-Language
compiler	B-Language
,	O
this	O
contributed	O
to	O
rather	O
slow	O
but	O
expensive	O
computer	O
systems	O
,	O
performing	O
typical	O
benchmarks	O
at	O
roughly	O
1/4	O
the	O
speed	O
of	O
the	O
new	O
80286	B-General_Concept
chip	O
at	O
the	O
same	O
clock	O
frequency	O
(	O
in	O
early	O
1982	O
)	O
.	O
</s>
<s>
This	O
initial	O
performance	O
gap	O
to	O
the	O
rather	O
low-profile	O
and	O
low-priced	O
8086	B-General_Concept
line	O
was	O
probably	O
the	O
main	O
reason	O
why	O
Intel	O
's	O
plan	O
to	O
replace	O
the	O
latter	O
(	O
later	O
known	O
as	O
x86	B-Operating_System
)	O
with	O
the	O
iAPX	B-Device
432	I-Device
failed	O
.	O
</s>
<s>
Although	O
engineers	O
saw	O
ways	O
to	O
improve	O
a	O
next	O
generation	O
design	O
,	O
the	O
iAPX	B-Device
432	I-Device
capability	O
architecture	O
had	O
now	O
started	O
to	O
be	O
regarded	O
more	O
as	O
an	O
implementation	O
overhead	O
rather	O
than	O
as	O
the	O
simplifying	O
support	O
it	O
was	O
intended	O
to	O
be	O
.	O
</s>
<s>
Intel	O
's	O
432	O
project	O
started	O
in	O
1976	O
,	O
a	O
year	O
after	O
the	O
8-bit	O
Intel	B-General_Concept
8080	I-General_Concept
was	O
completed	O
and	O
a	O
year	O
before	O
their	O
16-bit	B-Device
8086	B-General_Concept
project	O
began	O
.	O
</s>
<s>
The	O
432	O
project	O
was	O
initially	O
named	O
the	O
8800	O
,	O
as	O
their	O
next	O
step	O
beyond	O
the	O
existing	O
Intel	B-General_Concept
8008	I-General_Concept
and	O
8080	B-General_Concept
microprocessors	I-General_Concept
.	O
</s>
<s>
The	O
instruction	B-General_Concept
sets	I-General_Concept
of	O
these	O
8-bit	O
processors	O
were	O
not	O
very	O
well	O
fitted	O
for	O
typical	O
Algol-like	B-Language
compiled	B-Language
languages	I-Language
.	O
</s>
<s>
However	O
,	O
the	O
major	O
problem	O
was	O
their	O
small	O
native	O
addressing	O
ranges	O
,	O
just	O
16	O
KB	O
for	O
8008	B-General_Concept
and	O
64	O
KB	O
for	O
8080	B-General_Concept
,	O
far	O
too	O
small	O
for	O
many	O
complex	O
software	O
systems	O
without	O
using	O
some	O
kind	O
of	O
bank	B-General_Concept
switching	I-General_Concept
,	O
memory	B-General_Concept
segmentation	I-General_Concept
,	O
or	O
similar	O
mechanism	O
(	O
which	O
was	O
built	O
into	O
the	O
8086	B-General_Concept
,	O
a	O
few	O
years	O
later	O
on	O
)	O
.	O
</s>
<s>
This	O
system	O
would	O
support	O
multiprocessors	O
,	O
modular	O
expansion	O
,	O
fault	O
tolerance	O
,	O
advanced	O
operating	B-General_Concept
systems	I-General_Concept
,	O
advanced	O
programming	O
languages	O
,	O
very	O
large	O
applications	O
,	O
ultra	O
reliability	O
,	O
and	O
ultra	O
security	O
.	O
</s>
<s>
The	O
iAPX	B-Device
432	I-Device
development	O
team	O
was	O
managed	O
by	O
Bill	O
Lattin	O
,	O
with	O
Justin	O
Rattner	O
as	O
the	O
lead	O
engineer	O
(	O
although	O
one	O
source	O
states	O
that	O
Fred	O
Pollack	O
was	O
the	O
lead	O
engineer	O
)	O
.	O
</s>
<s>
Pollack	O
later	O
specialized	O
in	O
superscalarity	O
and	O
became	O
the	O
lead	O
architect	O
of	O
the	O
i686	O
chip	O
Intel	B-Device
Pentium	I-Device
Pro	I-Device
.	O
</s>
<s>
And	O
it	O
would	O
similarly	O
take	O
several	O
years	O
of	O
further	O
progress	O
in	O
Moore	O
's	O
Law	O
,	O
before	O
improved	O
chip	B-Architecture
manufacturing	I-Architecture
could	O
fit	O
all	O
this	O
into	O
a	O
few	O
dense	O
chips	O
.	O
</s>
<s>
So	O
Intel	O
began	O
a	O
rushed	O
project	O
to	O
design	O
the	O
8086	B-General_Concept
as	O
a	O
low-risk	O
incremental	O
evolution	O
from	O
the	O
8080	B-General_Concept
,	O
using	O
a	O
separate	O
design	O
team	O
.	O
</s>
<s>
The	O
mass-market	O
8086	B-General_Concept
shipped	O
in	O
1978	O
.	O
</s>
<s>
The	O
8086	B-General_Concept
was	O
designed	O
to	O
be	O
backward-compatible	O
with	O
the	O
8080	B-General_Concept
in	O
the	O
sense	O
that	O
8080	B-General_Concept
assembly	B-Language
language	I-Language
could	O
be	O
mapped	O
on	O
to	O
the	O
8086	B-General_Concept
architecture	O
using	O
a	O
special	O
assembler	B-Application
.	O
</s>
<s>
Existing	O
8080	B-General_Concept
assembly	O
source	O
code	B-Language
(	O
albeit	O
no	O
executable	B-Application
code	I-Application
)	O
was	O
thereby	O
made	O
upward	B-General_Concept
compatible	I-General_Concept
with	O
the	O
new	O
8086	B-General_Concept
to	O
a	O
degree	O
.	O
</s>
<s>
They	O
applied	O
fashionable	O
computer	O
science	O
concepts	O
from	O
universities	O
,	O
particularly	O
capability	B-General_Concept
machines	I-General_Concept
,	O
object-oriented	B-Language
programming	I-Language
,	O
high-level	O
CISC	O
machines	O
,	O
Ada	B-Language
,	O
and	O
densely	O
encoded	O
instructions	O
.	O
</s>
<s>
The	O
core	O
of	O
the	O
design	O
—	O
the	O
main	O
processor	B-Architecture
—	O
was	O
termed	O
the	O
General	O
Data	O
Processor	B-Architecture
(	O
GDP	O
)	O
and	O
built	O
as	O
two	O
integrated	O
circuits	O
:	O
one	O
(	O
the	O
43201	O
)	O
to	O
fetch	B-General_Concept
and	I-General_Concept
decode	I-General_Concept
instructions	O
,	O
the	O
other	O
(	O
the	O
43202	O
)	O
to	O
execute	O
them	O
.	O
</s>
<s>
Most	O
systems	O
would	O
also	O
include	O
the	O
43203	O
Interface	O
Processor	B-Architecture
(	O
IP	O
)	O
which	O
operated	O
as	O
a	O
channel	B-Device
controller	I-Device
for	O
I/O	B-General_Concept
,	O
and	O
an	O
Attached	O
Processor	B-Architecture
(	O
AP	O
)	O
,	O
a	O
conventional	O
Intel	B-General_Concept
8086	I-General_Concept
which	O
provided	O
"	O
processing	O
power	O
in	O
the	O
I/O	B-General_Concept
subsystem	O
"	O
.	O
</s>
<s>
By	O
comparison	O
,	O
the	O
Motorola	B-Device
68000	I-Device
(	O
introduced	O
in	O
1979	O
)	O
had	O
approximately	O
40,000	O
transistors	O
.	O
</s>
<s>
In	O
1983	O
,	O
Intel	O
released	O
two	O
additional	O
integrated	O
circuits	O
for	O
the	O
iAPX	B-Device
432	I-Device
Interconnect	O
Architecture	O
:	O
the	O
43204	O
Bus	O
Interface	O
Unit	O
(	O
BIU	O
)	O
and	O
43205	O
Memory	O
Control	O
Unit	O
(	O
MCU	O
)	O
.	O
</s>
<s>
Some	O
of	O
the	O
innovative	O
features	O
of	O
the	O
iAPX	B-Device
432	I-Device
were	O
detrimental	O
to	O
good	O
performance	O
.	O
</s>
<s>
In	O
many	O
cases	O
,	O
the	O
iAPX	B-Device
432	I-Device
had	O
a	O
significantly	O
slower	O
instruction	O
throughput	O
than	O
conventional	O
microprocessors	B-Architecture
of	O
the	O
era	O
,	O
such	O
as	O
the	O
National	B-Device
Semiconductor	I-Device
32016	I-Device
,	O
Motorola	B-Device
68010	I-Device
and	O
Intel	B-General_Concept
80286	I-General_Concept
.	O
</s>
<s>
The	O
instruction	B-General_Concept
set	I-General_Concept
also	O
used	O
bit-aligned	O
variable-length	O
instructions	O
instead	O
of	O
the	O
usual	O
semi-fixed	O
byte	O
or	O
word-aligned	O
formats	O
used	O
in	O
the	O
majority	O
of	O
computer	B-General_Concept
designs	I-General_Concept
.	O
</s>
<s>
Although	O
this	O
did	O
not	O
hamper	O
performance	O
in	O
itself	O
,	O
it	O
used	O
additional	O
transistors	B-Application
(	O
mainly	O
for	O
a	O
large	O
barrel	O
shifter	O
)	O
in	O
a	O
design	O
that	O
was	O
already	O
lacking	O
space	O
and	O
transistors	B-Application
for	O
caches	O
,	O
wider	O
buses	O
and	O
other	O
performance	O
oriented	O
features	O
.	O
</s>
<s>
In	O
addition	O
,	O
the	O
BIU	O
was	O
designed	O
to	O
support	O
fault-tolerant	O
systems	O
,	O
and	O
in	O
doing	O
so	O
up	O
to	O
40%	O
of	O
the	O
bus	O
time	O
was	O
held	O
up	O
in	O
wait	B-Device
states	I-Device
.	O
</s>
<s>
Another	O
major	O
problem	O
was	O
its	O
immature	O
and	O
untuned	O
Ada	B-Language
compiler	B-Language
.	O
</s>
<s>
It	O
used	O
high-cost	O
object-oriented	B-Language
instructions	O
in	O
every	O
case	O
,	O
instead	O
of	O
the	O
faster	O
scalar	O
instructions	O
where	O
it	O
would	O
have	O
made	O
sense	O
to	O
do	O
so	O
.	O
</s>
<s>
For	O
instance	O
the	O
iAPX	B-Device
432	I-Device
included	O
a	O
very	O
expensive	O
inter-module	O
procedure	O
call	O
instruction	O
,	O
which	O
the	O
compiler	B-Language
used	O
for	O
all	O
calls	O
,	O
despite	O
the	O
existence	O
of	O
much	O
faster	O
branch	O
and	O
link	O
instructions	O
.	O
</s>
<s>
The	O
compiler	B-Language
ran	O
this	O
for	O
every	O
single	O
variable	O
in	O
the	O
system	O
,	O
even	O
when	O
variables	O
were	O
used	O
inside	O
an	O
existing	O
environment	O
and	O
did	O
not	O
have	O
to	O
be	O
checked	O
.	O
</s>
<s>
According	O
to	O
the	O
New	O
York	O
Times	O
,	O
"	O
the	O
i432	B-Device
ran	O
5	O
to	O
10	O
times	O
more	O
slowly	O
than	O
its	O
competitor	O
,	O
the	O
Motorola	B-Device
68000	I-Device
"	O
.	O
</s>
<s>
The	O
iAPX	B-Device
432	I-Device
was	O
one	O
of	O
the	O
first	O
systems	O
to	O
implement	O
the	O
new	O
IEEE-754	O
Standard	O
for	O
Floating-Point	O
Arithmetic	O
.	O
</s>
<s>
An	O
outcome	O
of	O
the	O
failure	O
of	O
the	O
432	O
was	O
that	O
microprocessor	B-Architecture
designers	O
concluded	O
that	O
object	O
support	O
in	O
the	O
chip	O
leads	O
to	O
a	O
complex	O
design	O
that	O
will	O
invariably	O
run	O
slowly	O
,	O
and	O
the	O
432	O
was	O
often	O
cited	O
as	O
a	O
counter-example	O
by	O
proponents	O
of	O
RISC	B-Architecture
designs	O
.	O
</s>
<s>
However	O
,	O
some	O
hold	O
that	O
the	O
OO	O
support	O
was	O
not	O
the	O
primary	O
problem	O
with	O
the	O
432	O
,	O
and	O
that	O
the	O
implementation	O
shortcomings	O
(	O
especially	O
in	O
the	O
compiler	B-Language
)	O
mentioned	O
above	O
would	O
have	O
made	O
any	O
CPU	O
design	O
slow	O
.	O
</s>
<s>
Since	O
the	O
iAPX	B-Device
432	I-Device
there	O
has	O
been	O
only	O
one	O
other	O
attempt	O
at	O
a	O
similar	O
design	O
,	O
the	O
Rekursiv	B-General_Concept
processor	B-Architecture
,	O
although	O
the	O
INMOS	B-General_Concept
Transputer	I-General_Concept
's	O
process	O
support	O
was	O
similar	O
—	O
and	O
very	O
fast	O
.	O
</s>
<s>
A	O
new	O
architect	O
—	O
Glenford	O
Myers	O
—	O
was	O
brought	O
in	O
to	O
produce	O
an	O
entirely	O
new	O
architecture	O
and	O
implementation	O
for	O
the	O
core	O
processor	B-Architecture
,	O
which	O
would	O
be	O
built	O
in	O
a	O
joint	O
Intel/Siemens	O
project	O
(	O
later	O
BiiN	O
)	O
,	O
resulting	O
in	O
the	O
i960-series	O
processors	O
.	O
</s>
<s>
The	O
i960	B-General_Concept
RISC	B-Architecture
subset	O
became	O
popular	O
for	O
a	O
time	O
in	O
the	O
embedded	O
processor	B-Architecture
market	O
,	O
but	O
the	O
high-end	O
960MC	O
and	O
the	O
tagged-memory	O
960MX	O
were	O
marketed	O
only	O
for	O
military	O
applications	O
.	O
</s>
<s>
According	O
to	O
the	O
New	O
York	O
Times	O
,	O
Intel	O
's	O
collaboration	O
with	O
HP	O
on	O
the	O
Merced	O
processor	B-Architecture
(	O
later	O
known	O
as	O
Itanium	B-General_Concept
)	O
was	O
the	O
company	O
's	O
comeback	O
attempt	O
for	O
the	O
very	O
high-end	O
market	O
.	O
</s>
<s>
The	O
iAPX	B-Device
432	I-Device
instructions	O
have	O
variable	O
length	O
,	O
between	O
6	O
and	O
321	O
bits	O
.	O
</s>
<s>
The	O
iAPX	B-Device
432	I-Device
has	O
hardware	O
and	O
microcode	B-Device
support	O
for	O
object-oriented	B-Language
programming	I-Language
and	O
capability-based	B-General_Concept
addressing	I-General_Concept
.	O
</s>
<s>
The	O
system	O
uses	O
segmented	B-General_Concept
memory	I-General_Concept
,	O
with	O
up	O
to	O
224	O
segments	O
of	O
up	O
to	O
64KB	O
each	O
,	O
providing	O
a	O
total	O
virtual	O
address	O
space	O
of	O
240	O
bytes	O
.	O
</s>
<s>
The	O
hardware	O
and	O
microcode	B-Device
rigidly	O
enforce	O
the	O
distinction	O
between	O
data	O
and	O
access	O
segments	O
,	O
and	O
will	O
not	O
allow	O
software	O
to	O
treat	O
data	O
as	O
access	O
descriptors	O
,	O
or	O
vice	O
versa	O
.	O
</s>
<s>
System-defined	O
segments	O
contain	O
data	O
or	O
access	O
descriptors	O
for	O
system-defined	O
data	O
at	O
designated	O
offsets	O
,	O
though	O
the	O
operating	B-General_Concept
system	I-General_Concept
or	O
user	O
software	O
may	O
extend	O
these	O
with	O
additional	O
data	O
.	O
</s>
<s>
Each	O
system	O
object	O
has	O
a	O
type	O
field	O
which	O
is	O
checked	O
by	O
microcode	B-Device
,	O
such	O
that	O
a	O
Port	O
Object	O
cannot	O
be	O
used	O
where	O
a	O
Carrier	O
Object	O
is	O
needed	O
.	O
</s>
<s>
In	O
Release	O
1	O
of	O
the	O
iAPX	B-Device
432	I-Device
architecture	O
,	O
a	O
system-defined	O
object	O
typically	O
consisted	O
of	O
an	O
access	O
segment	O
,	O
and	O
optionally	O
(	O
depending	O
on	O
the	O
object	O
type	O
)	O
a	O
data	O
segment	O
specified	O
by	O
an	O
access	O
descriptor	O
at	O
a	O
fixed	O
offset	O
within	O
the	O
access	O
segment	O
.	O
</s>
<s>
The	O
iAPX432	B-Device
recognizes	O
fourteen	O
types	O
of	O
predefined	O
system	O
objects	O
:	O
</s>
<s>
Instead	O
,	O
the	O
microcode	B-Device
implements	O
part	O
of	O
the	O
marking	O
portion	O
of	O
Edsger	O
Dijkstra	O
's	O
on-the-fly	O
parallel	O
garbage	B-General_Concept
collection	I-General_Concept
algorithm	O
(	O
a	O
mark-and-sweep	O
style	O
collector	O
)	O
.	O
</s>
<s>
The	O
iMAX	B-Operating_System
432	I-Operating_System
operating	B-General_Concept
system	I-General_Concept
includes	O
the	O
software	O
portion	O
of	O
the	O
garbage	B-General_Concept
collector	I-General_Concept
.	O
</s>
<s>
Executable	B-Application
instructions	O
are	O
contained	O
within	O
a	O
system	O
"	O
instruction	O
object	O
"	O
.	O
</s>
<s>
Due	O
to	O
instructions	O
being	O
bit-aligned	O
,	O
a	O
16-bit	B-Device
bit	O
displacement	O
into	O
the	O
instruction	O
object	O
allows	O
the	O
object	O
to	O
contain	O
up	O
to	O
65,536	O
bits	O
(	O
8,192	O
bytes	O
)	O
of	O
instructions	O
.	O
</s>
<s>
"	O
The	O
fields	O
are	O
organized	O
to	O
present	O
information	O
to	O
the	O
processor	B-Architecture
in	O
the	O
sequence	O
required	O
for	O
decoding	O
"	O
.	O
</s>
