<s>
Intel	B-Language
Quartus	I-Language
Prime	I-Language
is	O
programmable	O
logic	O
device	O
design	O
software	O
produced	O
by	O
Intel	O
;	O
prior	O
to	O
Intel	O
's	O
acquisition	O
of	O
Altera	O
the	O
tool	O
was	O
called	O
Altera	B-Language
Quartus	I-Language
Prime	O
,	O
earlier	O
Altera	B-Language
Quartus	I-Language
II	O
.	O
</s>
<s>
Quartus	O
Prime	O
includes	O
an	O
implementation	O
of	O
VHDL	B-Language
and	O
Verilog	B-Language
for	O
hardware	O
description	O
,	O
visual	O
editing	O
of	O
logic	O
circuits	O
,	O
and	O
vector	O
waveform	O
simulation	O
.	O
</s>
<s>
SoCEDS	O
,	O
a	O
set	O
of	O
development	O
tools	O
,	O
utility	O
programs	O
,	O
run-time	O
software	O
,	O
and	O
application	O
examples	O
to	O
help	O
you	O
develop	O
software	O
for	O
SoC	B-Architecture
FPGA	B-Architecture
embedded	O
systems	O
.	O
</s>
<s>
This	O
edition	O
provided	O
compilation	O
and	O
programming	O
for	O
a	O
limited	O
number	O
of	O
Intel	O
FPGA	B-Architecture
devices	O
.	O
</s>
<s>
The	O
low-cost	O
Cyclone	O
family	O
of	O
FPGAs	B-Architecture
is	O
fully	O
supported	O
by	O
this	O
edition	O
,	O
as	O
well	O
as	O
the	O
MAX	O
family	O
of	O
CPLDs	B-General_Concept
,	O
meaning	O
small	O
developers	O
and	O
educational	O
institutions	O
have	O
no	O
overheads	O
from	O
the	O
cost	O
of	O
development	O
software	O
.	O
</s>
<s>
The	O
Standard	O
Edition	O
supports	O
an	O
extensive	O
number	O
of	O
FPGA	B-Architecture
devices	O
but	O
requires	O
a	O
license	O
.	O
</s>
<s>
The	O
Pro	O
Edition	O
supports	O
only	O
the	O
latest	O
FPGA	B-Architecture
devices	O
.	O
</s>
