<s>
IntelDX4	O
is	O
a	O
clock-tripled	O
i486	B-General_Concept
microprocessor	B-Architecture
with	O
16KB	O
level1	O
cache	O
.	O
</s>
<s>
Intel	O
named	O
it	O
DX4	B-Device
(	O
rather	O
than	O
DX3	O
)	O
as	O
a	O
consequence	O
of	O
litigation	O
with	O
AMD	O
over	O
trademarks	O
.	O
</s>
<s>
The	O
product	O
was	O
officially	O
named	O
IntelDX4	O
,	O
but	O
OEMs	O
continued	O
using	O
the	O
i486	B-General_Concept
naming	O
convention	O
.	O
</s>
<s>
The	O
original	O
write-through	O
versions	O
of	O
the	O
chip	O
are	O
marked	O
with	O
a	O
laser-embossed	O
“	O
&	O
E	O
,	O
”	O
while	O
the	O
write-back-enabled	O
versions	O
are	O
marked	O
“	O
&	O
EW.	O
”	O
i486	B-Device
OverDrive	I-Device
editions	O
of	O
IntelDX4	O
had	O
locked	O
multipliers	O
,	O
and	O
therefore	O
can	O
only	O
run	O
at	O
3×	O
the	O
external	O
clock	O
speed	O
.	O
</s>
<s>
The	O
100-MHz	O
model	O
of	O
the	O
processor	O
had	O
an	O
iCOMP	B-Device
rating	O
of	O
435	O
,	O
while	O
the	O
75-MHz	O
processor	O
had	O
a	O
rating	O
of	O
319	O
.	O
</s>
<s>
IntelDX4	O
was	O
an	O
OEM-only	O
product	O
,	O
but	O
the	O
DX4	B-Device
Overdrive	O
could	O
be	O
purchased	O
at	O
a	O
retail	O
store	O
.	O
</s>
<s>
The	O
IntelDX4	O
microprocessor	B-Architecture
is	O
mostly	O
pin-compatible	O
with	O
the	O
80486	B-General_Concept
,	O
but	O
requires	O
a	O
lower	O
3.3-V	O
supply	O
.	O
</s>
<s>
Normal	O
80486	B-General_Concept
and	O
DX2	O
processors	O
use	O
a	O
5-V	O
supply	O
;	O
plugging	O
a	O
DX4	B-Device
into	O
an	O
unmodified	O
socket	O
will	O
destroy	O
the	O
processor	O
.	O
</s>
<s>
The	O
DX4	B-Device
OverDrive	O
CPUs	O
have	O
VRMs	O
built	O
in	O
.	O
</s>
