<s>
Intel	B-General_Concept
Core	I-General_Concept
is	I-General_Concept
a	O
line	O
of	O
streamlined	O
midrange	O
consumer	O
,	O
workstation	B-Device
and	O
enthusiast	O
computer	O
central	B-General_Concept
processing	I-General_Concept
units	I-General_Concept
(	O
CPUs	B-Device
)	O
marketed	O
by	O
Intel	O
Corporation	O
.	O
</s>
<s>
These	O
processors	O
displaced	O
the	O
existing	O
mid	O
-	O
to	O
high-end	O
Pentium	B-Device
processors	I-Device
at	O
the	O
time	O
of	O
their	O
introduction	O
,	O
moving	O
the	O
Pentium	B-General_Concept
to	O
the	O
entry	O
level	O
.	O
</s>
<s>
Identical	O
or	O
more	O
capable	O
versions	O
of	O
Core	B-Device
processors	O
are	O
also	O
sold	O
as	O
Xeon	B-Device
processors	O
for	O
the	O
server	B-Application
and	O
workstation	B-Device
markets	O
.	O
</s>
<s>
The	O
lineup	O
of	O
Core	B-Device
processors	O
includes	O
the	O
Intel	B-Device
Core	I-Device
i3	I-Device
,	O
Intel	B-Device
Core	I-Device
i5	I-Device
,	O
Intel	B-Device
Core	I-Device
i7	I-Device
,	O
and	O
Intel	B-Device
Core	I-Device
i9	I-Device
,	O
along	O
with	O
the	O
X-series	O
of	O
Intel	B-Device
Core	I-Device
CPUs	B-Device
.	O
</s>
<s>
Although	O
Intel	B-General_Concept
Core	I-General_Concept
is	I-General_Concept
a	O
brand	O
that	O
promises	O
no	O
internal	O
consistency	O
or	O
continuity	O
,	O
the	O
processors	O
within	O
this	O
family	O
have	O
been	O
,	O
for	O
the	O
most	O
part	O
,	O
broadly	O
similar	O
.	O
</s>
<s>
The	O
first	O
products	O
receiving	O
this	O
designation	O
were	O
the	O
Core	B-Device
Solo	O
and	O
Core	B-Device
Duo	O
Yonah	B-Device
processors	O
for	O
mobile	B-Device
from	O
the	O
Pentium	B-Architecture
M	I-Architecture
design	O
tree	O
,	O
fabricated	B-Architecture
at	O
65	O
nm	O
and	O
brought	O
to	O
market	O
in	O
January	O
2006	O
.	O
</s>
<s>
These	O
are	O
substantially	O
different	O
in	O
design	O
than	O
the	O
rest	O
of	O
the	O
Intel	B-Device
Core	I-Device
product	O
group	O
,	O
having	O
derived	O
from	O
the	O
Pentium	B-Device
Pro	I-Device
lineage	O
that	O
predated	O
Pentium	B-General_Concept
4	I-General_Concept
.	O
</s>
<s>
The	O
first	O
Intel	B-Device
Core	I-Device
desktop	B-Device
processor	O
—	O
and	O
typical	O
family	O
member	O
—	O
came	O
from	O
the	O
Conroe	O
iteration	O
,	O
a	O
65nm	B-Algorithm
dual-core	B-Architecture
design	O
brought	O
to	O
market	O
in	O
July	O
2006	O
,	O
based	O
on	O
the	O
Intel	B-Device
Core	I-Device
microarchitecture	I-Device
with	O
substantial	O
enhancements	O
in	O
micro-architectural	O
efficiency	O
and	O
performance	O
,	O
outperforming	O
Pentium	B-General_Concept
4	I-General_Concept
across	O
the	O
board	O
(	O
or	O
near	O
to	O
it	O
)	O
,	O
while	O
operating	O
at	O
drastically	O
lower	O
clock	O
rates	O
.	O
</s>
<s>
Maintaining	O
high	O
instructions	O
per	O
cycle	O
(	O
IPC	O
)	O
on	O
a	O
deeply	O
pipelined	B-General_Concept
and	O
resourced	O
out-of-order	B-General_Concept
execution	I-General_Concept
engine	O
has	O
remained	O
a	O
constant	O
fixture	O
of	O
the	O
Intel	B-Device
Core	I-Device
product	O
group	O
ever	O
since	O
.	O
</s>
<s>
The	O
new	O
substantial	O
bump	O
in	O
microarchitecture	B-General_Concept
came	O
with	O
the	O
introduction	O
of	O
the	O
45nm	O
Bloomfield	B-Device
desktop	B-Device
processor	O
in	O
November	O
2008	O
on	O
the	O
Nehalem	B-Device
architecture	I-Device
,	O
whose	O
main	O
advantage	O
came	O
from	O
redesigned	O
I/O	O
and	O
memory	B-Architecture
systems	O
featuring	O
the	O
new	O
Intel	B-Architecture
QuickPath	I-Architecture
Interconnect	I-Architecture
and	O
an	O
integrated	B-General_Concept
memory	I-General_Concept
controller	I-General_Concept
supporting	O
up	O
to	O
three	O
channels	O
of	O
DDR3	O
memory	B-Architecture
.	O
</s>
<s>
Subsequent	O
performance	O
improvements	O
have	O
tended	O
toward	O
making	O
additions	O
rather	O
than	O
profound	O
changes	O
,	O
such	O
as	O
adding	O
the	O
Advanced	B-General_Concept
Vector	I-General_Concept
Extensions	I-General_Concept
instruction	O
set	O
extensions	O
to	O
Sandy	B-Device
Bridge	I-Device
,	O
first	O
released	O
on	O
32nm	B-Algorithm
in	O
January	O
2011	O
.	O
</s>
<s>
Time	O
has	O
also	O
brought	O
improved	O
support	O
for	O
virtualization	B-General_Concept
and	O
a	O
trend	O
toward	O
higher	O
levels	O
of	O
system	O
integration	O
and	O
management	O
functionality	O
(	O
and	O
along	O
with	O
that	O
,	O
increased	O
performance	O
)	O
through	O
the	O
ongoing	O
evolution	O
of	O
facilities	O
such	O
as	O
Intel	B-Application
Active	I-Application
Management	I-Application
Technology	I-Application
.	O
</s>
<s>
Since	O
2019	O
,	O
the	O
Core	B-Device
brand	O
has	O
been	O
based	O
on	O
four	O
product	O
lines	O
,	O
consisting	O
of	O
the	O
entry	O
level	O
i3	O
,	O
the	O
mainstream	O
i5	O
,	O
the	O
high-end	O
i7	O
,	O
and	O
the	O
"	O
enthusiast	O
"	O
i9	O
.	O
</s>
<s>
+Overview	O
of	O
Intel	B-Device
Core	I-Device
microarchitectures	I-Device
Brand	O
Desktop	B-Device
Mobile	B-Device
Codename	O
Cores	B-Architecture
Date	O
released	O
Codename	O
Cores	B-Architecture
Date	O
released	O
Core	B-Device
SoloDesktop	O
version	O
not	O
availableYonah165	O
nmJanuary	O
2006	O
Core	B-Device
DuoDesktop	O
version	O
not	O
availableYonah265	O
nmJanuary	O
2006	O
Core	B-Device
2	I-Device
SoloDesktop	O
version	O
not	O
availableMerom-LPenryn-L1165	O
nm45	O
nmSeptember	O
2007May	O
2008	O
Core	B-Device
2	I-Device
DuoConroeAllendaleWolfdale22265	O
nm65	O
nm45	O
nmAugust	O
2006January	O
2007January	O
2008MeromPenryn2265	O
nm45	O
nmJuly	O
2006January	O
2008	O
Core	B-Device
2	I-Device
QuadKentsfieldYorkfield4465	O
nm45	O
nmJanuary	O
2007March	O
2008Penryn445	O
nmAugust	O
2008	O
Core	B-Device
2	I-Device
ExtremeConroe	O
XEKentsfield	O
XEYorkfield	O
XE24465	O
nm65	O
nm45	O
nmJuly	O
2006November	O
2006November	O
2007Merom	O
XEPenryn	O
XEPenryn	O
XE22465	O
nm45	O
nm45	O
nmJuly	O
2007January	O
2008August	O
2008	O
Core	B-Device
MDesktop	O
version	O
not	O
availableBroadwell214	O
nmSeptember	O
2014	O
Core	B-Device
m3Desktop	O
version	O
not	O
availableSkylakeKaby	O
LakeKaby	O
LakeAmber	O
Lake222214	O
nm14	O
nm14	O
nm14	O
nmAugust	O
2015September	O
2016April	O
2017August	O
2018	O
Core	B-Device
m5Desktop	O
version	O
not	O
availableSkylake214	O
nmAugust	O
2015	O
Core	B-Device
m7Desktop	O
version	O
not	O
availableSkylake214	O
nmAugust	O
2015	O
Core	B-Device
i3ClarkdaleSandy	O
BridgeIvy	O
BridgeHaswellSkylakeKaby	O
LakeCoffee	O
LakeCoffee	O
LakeComet	O
LakeAlder	O
Lake222222444432	O
nm32	O
nm22	O
nm22	O
nm14	O
nm14	O
nm14	O
nm14	O
nm14	O
nm10	O
nmJanuary	O
2010February	O
2011September	O
2012September	O
2013September	O
2015January	O
2017October	O
2017Jan	O
.	O
</s>
<s>
2020	O
,	O
Jan	O
.	O
-	O
May	O
2021January	O
2022	O
Core	B-Device
i5LynnfieldClarkdaleSandy	O
BridgeSandy	O
BridgeIvy	O
BridgeHaswellBroadwellSkylakeKaby	O
LakeCoffee	O
LakeCoffee	O
LakeComet	O
LakeRocket	O
LakeAlder	O
Lake42422-42-444466666-1045	O
nm32	O
nm32	O
nm32	O
nm22	O
nm22	O
nm14	O
nm14	O
nm14	O
nm14	O
nm14	O
nm14	O
nm14	O
nm10	O
nmSeptember	O
2009January	O
2010January	O
2011February	O
2011April	O
2012June	O
2013June	O
2015September	O
2015January	O
2017October	O
2017Oct	O
.	O
</s>
<s>
2020	O
-	O
May	O
2021January	O
-	O
September	O
2021January	O
2022January	O
&	O
May	O
2022	O
Core	B-Device
i7BloomfieldLynnfieldGulftownSandy	O
BridgeSandy	O
Bridge-ESandy	O
Bridge-EIvy	O
BridgeHaswellIvy	O
Bridge-EBroadwellSkylakeKaby	O
LakeCoffee	O
LakeCoffee	O
LakeComet	O
LakeRocket	O
LakeAlder	O
Lake446464444-644468881245	O
nm45	O
nm32	O
nm32	O
nm32	O
nm32	O
nm22	O
nm22	O
nm22	O
nm14	O
nm14	O
nm14	O
nm14	O
nm14	O
nm14	O
nm14	O
nm10	O
nmNovember	O
2008September	O
2009July	O
2010January	O
2011November	O
2011February	O
2012April	O
2012June	O
2013September	O
2013June	O
2015August	O
2015January	O
2017October	O
2017October	O
2018April	O
2020March	O
2021Nov	O
.	O
</s>
<s>
2018	O
&	O
April	O
2019May	O
&	O
Aug	O
.	O
2019September	O
2019April	O
2020September	O
2020January	O
-	O
September	O
2021	O
January	O
2022January	O
&	O
May	O
2022	O
Core	B-Device
i7ExtremeBloomfieldGulftownSandy	O
Bridge-EIvy	O
Bridge-EHaswell-EBroadwell-ESkylake-XKaby	O
Lake-X46668106-8445	O
nm32	O
nm32	O
nm22	O
nm22	O
nm14	O
nm14	O
nm14	O
nmNovember	O
2008March	O
2010November	O
2011September	O
2013August	O
2014May	O
2016June	O
2017June	O
2017ClarksfieldSandy	O
BridgeIvy	O
BridgeHaswell444445	O
nm32	O
nm22	O
nm22	O
nmSeptember	O
2009January	O
2011May	O
2012June	O
2013Core	O
i9	O
Skylake-XSkylake-XCascade	O
Lake-XCoffee	O
LakeComet	O
LakeRocket	O
LakeAlder	O
Lake101214-1881081614	O
nm14	O
nm14	O
nm14	O
nm14	O
nm14	O
nm10	O
nmJune	O
2017August	O
2017September	O
2017October	O
2018April	O
2020March	O
2021Nov	O
.	O
</s>
<s>
The	O
original	O
Core	B-Device
brand	O
refers	O
to	O
Intel	O
's	O
32-bit	O
mobile	B-Device
dual-core	B-Architecture
x86	B-Operating_System
CPUs	B-Device
,	O
which	O
derived	O
from	O
the	O
Pentium	B-Architecture
M	I-Architecture
branded	O
processors	O
.	O
</s>
<s>
The	O
processor	O
family	O
used	O
an	O
enhanced	O
version	O
of	O
the	O
Intel	B-Device
P6	I-Device
microarchitecture	B-General_Concept
.	O
</s>
<s>
It	O
emerged	O
in	O
parallel	O
with	O
the	O
NetBurst	B-Device
microarchitecture	B-General_Concept
(	O
Intel	B-Device
P68	I-Device
)	O
of	O
the	O
Pentium	B-General_Concept
4	I-General_Concept
brand	O
,	O
and	O
was	O
a	O
precursor	O
of	O
the	O
64-bit	B-Device
Core	B-Device
microarchitecture	I-Device
of	O
Core	B-Device
2	I-Device
branded	O
CPUs	B-Device
.	O
</s>
<s>
The	O
Core	B-Device
brand	O
had	O
two	O
branches	O
:	O
the	O
Duo	O
(	O
dual-core	B-Architecture
)	O
and	O
Solo	O
(	O
Duo	O
with	O
one	O
disabled	O
core	B-Device
,	O
which	O
replaced	O
the	O
Pentium	B-Architecture
M	I-Architecture
brand	O
of	O
single-core	O
mobile	B-Device
processor	O
)	O
.	O
</s>
<s>
Intel	O
launched	O
the	O
Core	B-Device
brand	O
on	O
January	O
6	O
,	O
2006	O
,	O
with	O
the	O
release	O
of	O
the	O
32-bit	O
Yonah	B-Device
CPU	B-Device
Intel	O
's	O
first	O
dual-core	B-Architecture
mobile	B-Device
(	O
low-power	O
)	O
processor	O
.	O
</s>
<s>
Its	O
dual-core	B-Architecture
layout	O
closely	O
resembled	O
two	O
interconnected	O
Pentium	B-Architecture
M	I-Architecture
branded	O
CPUs	B-Device
packaged	O
as	O
a	O
single	O
die	O
(	O
piece	O
)	O
silicon	O
chip	O
(	O
IC	O
)	O
.	O
</s>
<s>
Hence	O
,	O
the	O
32-bit	O
microarchitecture	B-General_Concept
of	O
Core	B-Device
branded	O
CPUs	B-Device
contrary	O
to	O
its	O
name	O
had	O
more	O
in	O
common	O
with	O
Pentium	B-Architecture
M	I-Architecture
branded	O
CPUs	B-Device
than	O
with	O
the	O
subsequent	O
64-bit	B-Device
Core	B-Device
microarchitecture	I-Device
of	O
Core	B-Device
2	I-Device
branded	O
CPUs	B-Device
.	O
</s>
<s>
Despite	O
a	O
major	O
rebranding	O
effort	O
starting	O
January	O
2006	O
,	O
some	O
companies	O
continued	O
to	O
market	O
computers	O
with	O
the	O
Yonah	B-Device
core	B-Device
marked	O
as	O
Pentium	B-Architecture
M	I-Architecture
.	O
The	O
Core	B-Device
series	O
is	O
also	O
the	O
first	O
Intel	B-Device
processor	I-Device
used	O
as	O
the	O
main	O
CPU	B-Device
in	O
an	O
Apple	B-Device
Macintosh	I-Device
computer	O
.	O
</s>
<s>
The	O
Core	B-Device
Duo	O
was	O
the	O
CPU	B-Device
for	O
the	O
first	O
generation	O
MacBook	B-Device
Pro	I-Device
,	O
while	O
the	O
Core	B-Device
Solo	O
appeared	O
in	O
Apple	O
's	O
Mac	B-Device
Mini	I-Device
line	O
.	O
</s>
<s>
Core	B-Device
Duo	O
signified	O
the	O
beginning	O
of	O
Apple	B-Device
's	I-Device
shift	I-Device
to	I-Device
Intel	I-Device
processors	I-Device
across	O
the	O
entire	O
Mac	O
line	O
.	O
</s>
<s>
In	O
2007	O
,	O
Intel	O
began	O
branding	O
the	O
Yonah	B-Device
core	B-Device
CPUs	B-Device
intended	O
for	O
mainstream	O
mobile	B-Device
computers	O
as	O
Pentium	B-Device
Dual-Core	I-Device
,	O
not	O
to	O
be	O
confused	O
with	O
the	O
desktop	B-Device
64-bit	B-Device
Core	B-Device
microarchitecture	I-Device
CPUs	B-Device
also	O
branded	O
as	O
Pentium	B-Device
Dual-Core	I-Device
.	O
</s>
<s>
September	O
2007	O
and	O
January	O
4	O
,	O
2008	O
,	O
marked	O
the	O
discontinuation	O
of	O
a	O
number	O
of	O
Core	B-Device
branded	O
CPUs	B-Device
including	O
several	O
Core	B-Device
Solo	O
,	O
Core	B-Device
Duo	O
,	O
Celeron	B-Device
and	O
one	O
Core	B-Device
2	I-Device
Quad	O
chip	O
.	O
</s>
<s>
Intel	B-Device
Core	I-Device
Solo	O
uses	O
the	O
same	O
two-core	O
die	O
as	O
the	O
Core	B-Device
Duo	O
,	O
but	O
features	O
only	O
one	O
active	O
core	B-Device
.	O
</s>
<s>
Depending	O
on	O
demand	O
,	O
Intel	O
may	O
also	O
simply	O
disable	O
one	O
of	O
the	O
cores	B-Architecture
to	O
sell	O
the	O
chip	O
at	O
the	O
Core	B-Device
Solo	O
price	O
—	O
this	O
requires	O
less	O
effort	O
than	O
launching	O
and	O
maintaining	O
a	O
separate	O
line	O
of	O
CPUs	B-Device
that	O
physically	O
only	O
have	O
one	O
core	B-Device
.	O
</s>
<s>
Intel	O
had	O
used	O
the	O
same	O
strategy	O
previously	O
with	O
the	O
486	B-General_Concept
CPU	B-Device
in	O
which	O
early	O
486SX	B-Device
CPUs	B-Device
were	O
in	O
fact	O
manufactured	O
as	O
486DX	B-General_Concept
CPUs	B-Device
but	O
with	O
the	O
FPU	B-General_Concept
disabled	O
.	O
</s>
<s>
Intel	B-Device
Core	I-Device
Duo	O
consists	O
of	O
two	O
cores	B-Architecture
on	O
one	O
die	O
,	O
a	O
2MB	O
L2	O
cache	B-General_Concept
shared	O
by	O
both	O
cores	B-Architecture
,	O
and	O
an	O
arbiter	O
bus	O
that	O
controls	O
both	O
L2	O
cache	B-General_Concept
and	O
FSB	O
(	O
front-side	B-Architecture
bus	I-Architecture
)	O
access	O
.	O
</s>
<s>
The	O
successor	O
to	O
Core	B-Device
is	I-Device
the	O
mobile	B-Device
version	O
of	O
the	O
Intel	B-Device
Core	I-Device
2	I-Device
line	O
of	O
processors	O
using	O
cores	B-Architecture
based	O
upon	O
the	O
Intel	B-Device
Core	I-Device
microarchitecture	I-Device
,	O
released	O
on	O
July	O
27	O
,	O
2006	O
.	O
</s>
<s>
The	O
release	O
of	O
the	O
mobile	B-Device
version	O
of	O
Intel	B-Device
Core	I-Device
2	I-Device
marks	O
the	O
reunification	O
of	O
Intel	O
's	O
desktop	B-Device
and	O
mobile	B-Device
product	O
lines	O
as	O
Core	B-Device
2	I-Device
processors	O
were	O
released	O
for	O
desktops	O
and	O
notebooks	B-Device
,	O
unlike	O
the	O
first	O
Intel	B-Device
Core	I-Device
CPUs	B-Device
that	O
were	O
targeted	O
only	O
for	O
notebooks	B-Device
(	O
although	O
some	O
small	O
form	O
factor	O
and	O
all-in-one	O
desktops	O
,	O
like	O
the	O
iMac	B-Device
and	O
the	O
Mac	B-Device
Mini	I-Device
,	O
also	O
used	O
Core	B-Device
processors	O
)	O
.	O
</s>
<s>
Unlike	O
the	O
Intel	B-Device
Core	I-Device
,	O
Intel	B-Device
Core	I-Device
2	I-Device
is	O
a	O
64-bit	B-Device
processor	I-Device
,	O
supporting	O
Intel	O
64	O
.	O
</s>
<s>
Another	O
difference	O
between	O
the	O
original	O
Core	B-Device
Duo	O
and	O
the	O
new	O
Core	B-Device
2	I-Device
Duo	O
is	O
an	O
increase	O
in	O
the	O
amount	O
of	O
Level	O
2	O
cache	B-General_Concept
.	O
</s>
<s>
The	O
new	O
Core	B-Device
2	I-Device
Duo	O
has	O
tripled	O
the	O
amount	O
of	O
on-board	O
cache	B-General_Concept
to	O
6MB	O
.	O
</s>
<s>
Core	B-Device
2	I-Device
also	O
introduced	O
a	O
quad-core	B-Architecture
performance	O
variant	O
to	O
the	O
single	O
-	O
and	O
dual-core	B-Architecture
chips	I-Architecture
,	O
branded	O
Core	B-Device
2	I-Device
Quad	O
,	O
as	O
well	O
as	O
an	O
enthusiast	O
variant	O
,	O
Core	B-Device
2	I-Device
Extreme	O
.	O
</s>
<s>
All	O
three	O
chips	O
are	O
manufactured	O
at	O
a	O
65nm	B-Algorithm
lithography	B-Algorithm
,	O
and	O
in	O
2008	O
,	O
a	O
45nm	O
lithography	B-Algorithm
and	O
support	O
Front	B-Architecture
Side	I-Architecture
Bus	I-Architecture
speeds	O
ranging	O
from	O
533MHz	O
to	O
1600MHz	O
.	O
</s>
<s>
In	O
addition	O
,	O
the	O
45nm	O
die	O
shrink	O
of	O
the	O
Core	B-Device
microarchitecture	I-Device
adds	O
SSE4.1	O
support	O
to	O
all	O
Core	B-Device
2	I-Device
microprocessors	O
manufactured	O
at	O
a	O
45nm	O
lithography	B-Algorithm
,	O
therefore	O
increasing	O
the	O
calculation	O
rate	O
of	O
the	O
processors	O
.	O
</s>
<s>
The	O
Core	B-Device
2	I-Device
Solo	O
,	O
introduced	O
in	O
September	O
2007	O
,	O
is	O
the	O
successor	O
to	O
the	O
Core	B-Device
Solo	O
and	O
is	O
available	O
only	O
as	O
an	O
ultra-low-power	O
mobile	B-Device
processor	O
with	O
5.5	O
Watt	O
thermal	B-General_Concept
design	I-General_Concept
power	I-General_Concept
.	O
</s>
<s>
The	O
original	O
U2xxx	O
series	O
"	O
Merom-L	O
"	O
used	O
a	O
special	O
version	O
of	O
the	O
Merom	B-Device
chip	O
with	O
CPUID	B-Architecture
number	O
10661	O
(	O
model	O
22	O
,	O
stepping	O
A1	O
)	O
that	O
only	O
had	O
a	O
single	O
core	B-Device
and	O
was	O
also	O
used	O
in	O
some	O
Celeron	B-Device
processors	O
.	O
</s>
<s>
The	O
later	O
SU3xxx	O
are	O
part	O
of	O
Intel	O
's	O
CULV	B-Device
range	O
of	O
processors	O
in	O
a	O
smaller	O
μFC-BGA	B-Device
956	I-Device
package	O
but	O
contain	O
the	O
same	O
Penryn	B-Device
chip	O
as	O
the	O
dual-core	B-Architecture
variants	O
,	O
with	O
one	O
of	O
the	O
cores	B-Architecture
disabled	O
during	O
manufacturing	O
.	O
</s>
<s>
The	O
majority	O
of	O
the	O
desktop	B-Device
and	O
mobile	B-Device
Core	B-Device
2	I-Device
processor	O
variants	O
are	O
Core	B-Device
2	I-Device
Duo	O
with	O
two	O
processor	O
cores	B-Architecture
on	O
a	O
single	O
Merom	B-Device
,	O
Conroe	O
,	O
Allendale	O
,	O
Penryn	B-Device
,	O
or	O
Wolfdale	B-Device
chip	O
.	O
</s>
<s>
These	O
come	O
in	O
a	O
wide	O
range	O
of	O
performance	O
and	O
power	O
consumption	O
,	O
starting	O
with	O
the	O
relatively	O
slow	O
ultra-low-power	O
Uxxxx	O
(	O
10W	O
)	O
and	O
low-power	O
Lxxxx	O
(	O
17W	O
)	O
versions	O
,	O
to	O
the	O
more	O
performance	O
oriented	O
Pxxxx	O
(	O
25W	O
)	O
and	O
Txxxx	O
(	O
35W	O
)	O
mobile	B-Device
versions	O
and	O
the	O
Exxxx	O
(	O
65W	O
)	O
desktop	B-Device
models	O
.	O
</s>
<s>
The	O
mobile	B-Device
Core	B-Device
2	I-Device
Duo	O
processors	O
with	O
an	O
'	O
S	O
 '	O
prefix	O
in	O
the	O
name	O
are	O
produced	O
in	O
a	O
smaller	O
μFC-BGA	B-Device
956	I-Device
package	O
,	O
which	O
allows	O
building	O
more	O
compact	O
laptops	B-Device
.	O
</s>
<s>
Within	O
each	O
line	O
,	O
a	O
higher	O
number	O
usually	O
refers	O
to	O
a	O
better	O
performance	O
,	O
which	O
depends	O
largely	O
on	O
core	B-Device
and	O
front-side	B-Architecture
bus	I-Architecture
clock	O
frequency	O
and	O
amount	O
of	O
second	O
level	O
cache	B-General_Concept
,	O
which	O
are	O
model-specific	O
.	O
</s>
<s>
Core	B-Device
2	I-Device
Duo	O
processors	O
typically	O
use	O
the	O
full	O
L2	O
cache	B-General_Concept
of	O
2	O
,	O
3	O
,	O
4	O
,	O
or	O
6MB	O
available	O
in	O
the	O
specific	O
stepping	O
of	O
the	O
chip	O
,	O
while	O
versions	O
with	O
the	O
amount	O
of	O
cache	B-General_Concept
reduced	O
during	O
manufacturing	O
are	O
sold	O
for	O
the	O
low-end	O
consumer	O
market	O
as	O
Celeron	B-Device
or	O
Pentium	B-Device
Dual-Core	I-Device
processors	O
.	O
</s>
<s>
Like	O
those	O
processors	O
,	O
some	O
low-end	O
Core	B-Device
2	I-Device
Duo	O
models	O
disable	O
features	O
such	O
as	O
Intel	O
Virtualization	B-General_Concept
Technology	O
.	O
</s>
<s>
Core	B-Device
2	I-Device
Quad	O
processors	O
are	O
multi-chip	B-Algorithm
modules	I-Algorithm
consisting	O
of	O
two	O
dies	O
similar	O
to	O
those	O
used	O
in	O
Core	B-Device
2	I-Device
Duo	O
,	O
forming	O
a	O
quad-core	B-Architecture
processor	I-Architecture
.	O
</s>
<s>
This	O
allows	O
twice	O
the	O
performance	O
of	O
a	O
dual-core	B-Architecture
processors	I-Architecture
at	O
the	O
same	O
clock	O
frequency	O
in	O
ideal	O
conditions	O
.	O
</s>
<s>
Initially	O
,	O
all	O
Core	B-Device
2	I-Device
Quad	O
models	O
were	O
versions	O
of	O
Core	B-Device
2	I-Device
Duo	O
desktop	B-Device
processors	O
,	O
Kentsfield	B-Device
derived	O
from	O
Conroe	O
and	O
Yorkfield	B-Device
from	O
Wolfdale	B-Device
,	O
but	O
later	O
Penryn-QC	O
was	O
added	O
as	O
a	O
high-end	O
version	O
of	O
the	O
mobile	B-Device
dual-core	B-Architecture
Penryn	B-Device
.	O
</s>
<s>
The	O
Xeon	B-Device
32xx	O
and	O
33xx	O
processors	O
are	O
mostly	O
identical	O
versions	O
of	O
the	O
desktop	B-Device
Core	B-Device
2	I-Device
Quad	O
processors	O
and	O
can	O
be	O
used	O
interchangeably	O
.	O
</s>
<s>
Core	B-Device
2	I-Device
Extreme	O
processors	O
are	O
enthusiast	O
versions	O
of	O
Core	B-Device
2	I-Device
Duo	O
and	O
Core	B-Device
2	I-Device
Quad	O
processors	O
,	O
usually	O
with	O
a	O
higher	O
clock	O
frequency	O
and	O
an	O
unlocked	O
clock	O
multiplier	O
,	O
which	O
makes	O
them	O
especially	O
attractive	O
for	O
overclocking	B-Application
.	O
</s>
<s>
This	O
is	O
similar	O
to	O
earlier	O
Pentium	B-Device
processors	I-Device
labeled	O
as	O
Extreme	B-Device
Edition	I-Device
.	O
</s>
<s>
Core	B-Device
2	I-Device
Extreme	O
processors	O
were	O
released	O
at	O
a	O
much	O
higher	O
price	O
than	O
their	O
regular	O
version	O
,	O
often	O
$999	O
or	O
more	O
.	O
</s>
<s>
With	O
the	O
release	O
of	O
the	O
Nehalem	B-Device
microarchitecture	I-Device
in	O
November	O
2008	O
,	O
Intel	O
introduced	O
a	O
new	O
naming	O
scheme	O
for	O
its	O
Core	B-Device
processors	O
.	O
</s>
<s>
There	O
are	O
three	O
variants	O
,	O
Core	B-Device
i3	I-Device
,	O
Core	B-Device
i5	I-Device
and	O
Core	B-Device
i7	I-Device
,	O
but	O
the	O
names	O
no	O
longer	O
correspond	O
to	O
specific	O
technical	O
features	O
like	O
the	O
number	O
of	O
cores	B-Architecture
.	O
</s>
<s>
Instead	O
,	O
the	O
brand	O
is	O
now	O
divided	O
from	O
low-level	O
(	O
i3	O
)	O
,	O
through	O
mid-range	O
(	O
i5	O
)	O
to	O
high-end	O
performance	O
(	O
i7	O
)	O
,	O
which	O
correspond	O
to	O
three	O
,	O
four	O
and	O
five	O
stars	O
in	O
Intel	O
's	O
Intel	B-Device
Processor	I-Device
Rating	O
following	O
on	O
from	O
the	O
entry-level	O
Celeron	B-Device
(	O
one	O
star	O
)	O
and	O
Pentium	B-General_Concept
(	O
two	O
stars	O
)	O
processors	O
.	O
</s>
<s>
Common	O
features	O
of	O
all	O
Nehalem	B-Device
based	O
processors	O
include	O
an	O
integrated	O
DDR3	O
memory	B-General_Concept
controller	I-General_Concept
as	O
well	O
as	O
QuickPath	B-Architecture
Interconnect	I-Architecture
or	O
PCI	O
Express	O
and	O
Direct	B-Architecture
Media	I-Architecture
Interface	I-Architecture
on	O
the	O
processor	O
replacing	O
the	O
aging	O
quad-pumped	O
Front	B-Architecture
Side	I-Architecture
Bus	I-Architecture
used	O
in	O
all	O
earlier	O
Core	B-Device
processors	O
.	O
</s>
<s>
All	O
these	O
processors	O
have	O
256KB	O
L2	O
cache	B-General_Concept
per	O
core	B-Device
,	O
plus	O
up	O
to	O
12MB	O
shared	O
L3	O
cache	B-General_Concept
.	O
</s>
<s>
Because	O
of	O
the	O
new	O
I/O	O
interconnect	O
,	O
chipsets	O
and	O
mainboards	O
from	O
previous	O
generations	O
can	O
no	O
longer	O
be	O
used	O
with	O
Nehalem-based	O
processors	O
.	O
</s>
<s>
Intel	O
intended	O
the	O
Core	B-Device
i3	I-Device
as	O
the	O
new	O
low	O
end	O
of	O
the	O
performance	O
processor	O
line	O
,	O
following	O
the	O
retirement	O
of	O
the	O
Core	B-Device
2	I-Device
brand	O
.	O
</s>
<s>
The	O
first	O
Core	B-Device
i3	I-Device
processors	O
were	O
launched	O
on	O
January	O
7	O
,	O
2010	O
.	O
</s>
<s>
The	O
first	O
Nehalem	B-Device
based	O
Core	B-Device
i3	I-Device
was	O
Clarkdale-based	O
,	O
with	O
an	O
integrated	O
GPU	B-Application
and	O
two	O
cores	B-Architecture
.	O
</s>
<s>
The	O
same	O
processor	O
is	O
also	O
available	O
as	O
Core	B-Device
i5	I-Device
and	O
Pentium	B-General_Concept
,	O
with	O
slightly	O
different	O
configurations	O
.	O
</s>
<s>
The	O
Core	O
i3-3xxM	O
processors	O
are	O
based	O
on	O
Arrandale	O
,	O
the	O
mobile	B-Device
version	O
of	O
the	O
Clarkdale	B-Device
desktop	B-Device
processor	O
.	O
</s>
<s>
They	O
are	O
similar	O
to	O
the	O
Core	O
i5-4xx	O
series	O
but	O
running	O
at	O
lower	O
clock	O
speeds	O
and	O
without	O
Turbo	B-Device
Boost	I-Device
.	O
</s>
<s>
According	O
to	O
an	O
Intel	O
FAQ	O
they	O
do	O
not	O
support	O
Error	O
Correction	O
Code	O
(	O
ECC	O
)	O
memory	B-Architecture
.	O
</s>
<s>
According	O
to	O
motherboard	O
manufacturer	O
Supermicro	O
,	O
if	O
a	O
Core	B-Device
i3	I-Device
processor	O
is	O
used	O
with	O
a	O
server	B-Application
chipset	O
platform	O
such	O
as	O
Intel	O
3400/3420/3450	O
,	O
the	O
CPU	B-Device
supports	O
ECC	O
with	O
UDIMM	O
.	O
</s>
<s>
When	O
asked	O
,	O
Intel	O
confirmed	O
that	O
,	O
although	O
the	O
Intel	O
5	O
series	O
chipset	O
supports	O
non-ECC	O
memory	O
only	O
with	O
the	O
Core	B-Device
i5	I-Device
or	O
i3	O
processors	O
,	O
using	O
those	O
processors	O
on	O
a	O
motherboard	O
with	O
3400	O
series	O
chipsets	O
it	O
supports	O
the	O
ECC	O
function	O
of	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
A	O
limited	O
number	O
of	O
motherboards	O
by	O
other	O
companies	O
also	O
support	O
ECC	O
with	O
Intel	B-Device
Core	I-Device
ix	O
processors	O
;	O
the	O
Asus	O
P8B	O
WS	O
is	O
an	O
example	O
,	O
but	O
it	O
does	O
not	O
support	O
ECC	B-General_Concept
memory	I-General_Concept
under	O
Windows	O
non-server	O
operating	O
systems	O
.	O
</s>
<s>
Lynnfield	B-Device
was	O
the	O
first	O
Core	B-Device
i5	I-Device
processors	O
using	O
the	O
Nehalem	B-Device
microarchitecture	I-Device
,	O
introduced	O
on	O
September	O
8	O
,	O
2009	O
,	O
as	O
a	O
mainstream	O
variant	O
of	O
the	O
earlier	O
Core	B-Device
i7	I-Device
.	O
</s>
<s>
Lynnfield	B-Device
Core	B-Device
i5	I-Device
processors	O
have	O
an	O
8MB	O
L3	O
cache	B-General_Concept
,	O
a	O
DMI	B-Architecture
bus	O
running	O
at	O
2.5GT/s	O
and	O
support	O
for	O
dual-channel	O
DDR3-800/1066/1333	O
memory	B-Architecture
and	O
have	O
Hyper-threading	B-Operating_System
disabled	O
.	O
</s>
<s>
The	O
same	O
processors	O
with	O
different	O
sets	O
of	O
features	O
(	O
Hyper-threading	B-Operating_System
and	O
other	O
clock	O
frequencies	O
)	O
enabled	O
are	O
sold	O
as	O
Core	B-Device
i7-8xx	I-Device
and	O
Xeon	B-Device
3400-series	O
processors	O
,	O
which	O
should	O
not	O
be	O
confused	O
with	O
high-end	O
Core	O
i7-9xx	O
and	O
Xeon	B-Device
3500-series	O
processors	O
based	O
on	O
Bloomfield	B-Device
.	O
</s>
<s>
A	O
new	O
feature	O
called	O
Turbo	B-Device
Boost	I-Device
Technology	O
was	O
introduced	O
which	O
maximizes	O
speed	O
for	O
demanding	O
applications	O
,	O
dynamically	O
accelerating	O
performance	O
to	O
match	O
the	O
workload	O
.	O
</s>
<s>
After	O
Nehalem	B-Device
received	O
a	O
32nm	B-Algorithm
Westmere	B-Device
die	O
shrink	O
,	O
Arrandale	O
,	O
the	O
dual-core	B-Architecture
mobile	B-Device
Core	B-Device
i5	I-Device
processors	O
and	O
its	O
desktop	B-Device
counterpart	O
Clarkdale	B-Device
was	O
introduced	O
in	O
January	O
2010	O
,	O
together	O
with	O
Core	O
i7-6xx	O
and	O
Core	O
i3-3xx	O
processors	O
based	O
on	O
the	O
same	O
architecture	O
.	O
</s>
<s>
Core	O
i3-3xx	O
does	O
not	O
support	O
for	O
Turbo	B-Device
Boost	I-Device
,	O
L3	O
cache	B-General_Concept
in	O
Core	O
i5-5xx	O
processors	O
is	O
reduced	O
to	O
3MB	O
,	O
while	O
the	O
Core	O
i5-6xx	O
uses	O
the	O
full	O
cache	B-General_Concept
,	O
Clarkdale	B-Device
is	O
sold	O
as	O
Core	O
i5-6xx	O
,	O
along	O
with	O
related	O
Core	B-Device
i3	I-Device
and	O
Pentium	B-Device
processors	I-Device
.	O
</s>
<s>
It	O
has	O
Hyper-Threading	B-Operating_System
enabled	O
and	O
the	O
full	O
4MB	O
L3	O
cache	B-General_Concept
.	O
</s>
<s>
According	O
to	O
Intel	O
"	O
Core	B-Device
i5	I-Device
desktop	B-Device
processors	O
and	O
desktop	B-Device
boards	O
typically	O
do	O
not	O
support	O
ECC	B-General_Concept
memory	I-General_Concept
"	O
,	O
but	O
information	O
on	O
limited	O
ECC	O
support	O
in	O
the	O
Core	B-Device
i3	I-Device
section	O
also	O
applies	O
to	O
Core	B-Device
i5	I-Device
and	O
i7	O
.	O
</s>
<s>
Intel	B-Device
Core	I-Device
i7	I-Device
as	O
a	O
brand	O
name	O
applies	O
to	O
several	O
families	O
of	O
desktop	B-Device
and	O
laptop	B-Device
64-bit	O
x86-64	O
processors	O
using	O
the	O
Nehalem	B-Device
,	O
Westmere	B-Device
,	O
Sandy	B-Device
Bridge	I-Device
,	O
Ivy	B-Device
Bridge	I-Device
,	O
Haswell	B-Device
,	O
Broadwell	B-General_Concept
,	O
Skylake	B-Architecture
,	O
and	O
Kaby	B-Device
Lake	I-Device
microarchitectures	B-General_Concept
.	O
</s>
<s>
The	O
Core	B-Device
i7	I-Device
brand	O
targets	O
the	O
business	O
and	O
high-end	O
consumer	O
markets	O
for	O
both	O
desktop	B-Device
and	O
laptop	B-Device
computers	I-Device
,	O
and	O
is	O
distinguished	O
from	O
the	O
Core	B-Device
i3	I-Device
(	O
entry-level	O
consumer	O
)	O
,	O
Core	B-Device
i5	I-Device
(	O
mainstream	O
consumer	O
)	O
,	O
and	O
Xeon	B-Device
(	O
server	B-Application
and	O
workstation	B-Device
)	O
brands	O
.	O
</s>
<s>
Introduced	O
in	O
late	O
2008	O
,	O
Bloomfield	B-Device
was	O
the	O
first	O
Core	B-Device
i7	I-Device
processors	O
based	O
on	O
the	O
Nehalem	B-Device
architecture	I-Device
.	O
</s>
<s>
The	O
following	O
year	O
,	O
Lynnfield	B-Device
desktop	B-Device
processors	O
and	O
Clarksfield	B-Device
mobile	B-Device
processors	O
brought	O
new	O
quad-core	B-Architecture
Core	B-Device
i7	I-Device
models	O
based	O
on	O
the	O
said	O
architecture	O
.	O
</s>
<s>
After	O
Nehalem	B-Device
received	O
a	O
32nm	B-Algorithm
Westmere	B-Device
die	O
shrink	O
,	O
Arrandale	O
dual-core	B-Architecture
mobile	B-Device
processors	O
were	O
introduced	O
in	O
January	O
2010	O
,	O
followed	O
by	O
Core	B-Device
i7	I-Device
's	O
first	O
six-core	O
desktop	B-Device
processor	O
Gulftown	B-Device
on	O
March	O
16	O
,	O
2010	O
.	O
</s>
<s>
Both	O
the	O
regular	O
Core	B-Device
i7	I-Device
and	O
the	O
Extreme	B-Device
Edition	I-Device
are	O
advertised	O
as	O
five	O
stars	O
in	O
the	O
Intel	B-Device
Processor	I-Device
Rating	O
.	O
</s>
<s>
The	O
first-generation	O
Core	B-Device
i7	I-Device
uses	O
two	O
different	O
sockets	O
;	O
LGA	B-Device
1366	I-Device
designed	O
for	O
high-end	O
desktops	O
and	O
servers	O
,	O
and	O
LGA	B-Device
1156	I-Device
used	O
in	O
low	O
-	O
and	O
mid-end	O
desktops	O
and	O
servers	O
.	O
</s>
<s>
In	O
each	O
generation	O
,	O
the	O
highest-performing	O
Core	B-Device
i7	I-Device
processors	O
use	O
the	O
same	O
socket	O
and	O
QPI-based	O
architecture	O
as	O
the	O
medium-end	O
Xeon	B-Device
processors	O
of	O
that	O
generation	O
,	O
while	O
lower-performing	O
Core	B-Device
i7	I-Device
processors	O
use	O
the	O
same	O
socket	O
and	O
PCIe/DMI/FDI	O
architecture	O
as	O
the	O
Core	B-Device
i5	I-Device
.	O
</s>
<s>
"	O
Core	B-Device
i7	I-Device
"	O
is	O
a	O
successor	O
to	O
the	O
Intel	B-Device
Core	I-Device
2	I-Device
brand	O
.	O
</s>
<s>
Intel	O
representatives	O
stated	O
that	O
they	O
intended	O
the	O
moniker	O
Core	B-Device
i7	I-Device
to	O
help	O
consumers	O
decide	O
which	O
processor	O
to	O
purchase	O
as	O
Intel	O
releases	O
newer	O
Nehalem-based	O
products	O
in	O
the	O
future	O
.	O
</s>
<s>
In	O
early	O
2011	O
,	O
Intel	O
introduced	O
a	O
new	O
microarchitecture	B-General_Concept
named	O
Sandy	B-Device
Bridge	I-Device
.	O
</s>
<s>
This	O
is	O
the	O
second	O
generation	O
of	O
the	O
Core	B-Device
processor	O
microarchitecture	B-General_Concept
.	O
</s>
<s>
It	O
kept	O
all	O
the	O
existing	O
brands	O
from	O
Nehalem	B-Device
,	O
including	O
Core	O
i3/i5/i7	O
,	O
and	O
introduced	O
new	O
model	O
numbers	O
.	O
</s>
<s>
The	O
initial	O
set	O
of	O
Sandy	B-Device
Bridge	I-Device
processors	O
includes	O
dual	O
-	O
and	O
quad-core	B-Architecture
variants	O
,	O
all	O
of	O
which	O
use	O
a	O
single	O
32nm	B-Algorithm
die	O
for	O
both	O
the	O
CPU	B-Device
and	O
integrated	O
GPU	B-Application
cores	B-Architecture
,	O
unlike	O
the	O
earlier	O
microarchitectures	B-General_Concept
.	O
</s>
<s>
All	O
Core	O
i3/i5/i7	O
processors	O
with	O
the	O
Sandy	B-Device
Bridge	I-Device
microarchitecture	B-General_Concept
have	O
a	O
four-digit	O
model	O
number	O
.	O
</s>
<s>
With	O
the	O
mobile	B-Device
version	O
,	O
the	O
thermal	B-General_Concept
design	I-General_Concept
power	I-General_Concept
can	O
no	O
longer	O
be	O
determined	O
from	O
a	O
one	O
-	O
or	O
two-letter	O
suffix	O
but	O
is	O
encoded	O
into	O
the	O
CPU	B-Device
number	O
.	O
</s>
<s>
Starting	O
with	O
Sandy	B-Device
Bridge	I-Device
,	O
Intel	O
no	O
longer	O
distinguishes	O
the	O
code	O
names	O
of	O
the	O
processor	O
based	O
on	O
number	O
of	O
cores	B-Architecture
,	O
socket	O
or	O
intended	O
usage	O
;	O
they	O
all	O
use	O
the	O
same	O
code	O
name	O
as	O
the	O
microarchitecture	B-General_Concept
itself	O
.	O
</s>
<s>
Ivy	B-Device
Bridge	I-Device
is	O
the	O
codename	O
for	O
Intel	O
's	O
22nm	B-Algorithm
die	O
shrink	O
of	O
the	O
Sandy	B-Device
Bridge	I-Device
microarchitecture	B-General_Concept
based	O
on	O
tri-gate	O
(	O
"	O
3D	O
"	O
)	O
transistors	O
,	O
introduced	O
in	O
April	O
2012	O
.	O
</s>
<s>
Released	O
on	O
January	O
20	O
,	O
2011	O
,	O
the	O
Core	O
i3-2xxx	O
line	O
of	O
desktop	B-Device
and	O
mobile	B-Device
processors	O
is	O
a	O
direct	O
replacement	O
of	O
the	O
2010	O
"	O
Clarkdale	B-Device
"	O
Core	O
i3-5xx	O
and	O
"	O
Arrandale	O
"	O
Core	O
i3-3xxM	O
models	O
,	O
based	O
on	O
the	O
new	O
microarchitecture	B-General_Concept
.	O
</s>
<s>
While	O
they	O
require	O
new	O
sockets	O
and	O
chipsets	O
,	O
the	O
user-visible	O
features	O
of	O
the	O
Core	B-Device
i3	I-Device
are	O
largely	O
unchanged	O
,	O
including	O
the	O
lack	O
of	O
support	O
for	O
Turbo	B-Device
Boost	I-Device
and	O
AES-NI	O
.	O
</s>
<s>
Unlike	O
the	O
Sandy	O
Bridge-based	O
Celeron	B-Device
and	O
Pentium	B-Device
processors	I-Device
,	O
the	O
Core	B-Device
i3	I-Device
line	O
does	O
support	O
the	O
new	O
Advanced	B-General_Concept
Vector	I-General_Concept
Extensions	I-General_Concept
.	O
</s>
<s>
This	O
particular	O
processor	O
is	O
the	O
entry-level	O
processor	O
of	O
this	O
new	O
series	O
of	O
Intel	B-Device
processors	I-Device
.	O
</s>
<s>
In	O
January	O
2011	O
,	O
Intel	O
released	O
new	O
quad-core	B-Architecture
Core	B-Device
i5	I-Device
processors	O
based	O
on	O
the	O
"	O
Sandy	B-Device
Bridge	I-Device
"	O
microarchitecture	B-General_Concept
at	O
CES	O
2011	O
.	O
</s>
<s>
New	O
dual-core	B-Architecture
mobile	B-Device
processors	O
and	O
desktop	B-Device
processors	O
arrived	O
in	O
February	O
2011	O
.	O
</s>
<s>
The	O
Core	O
i5-2xxx	O
line	O
of	O
desktop	B-Device
processors	O
are	O
mostly	O
quad-core	B-Architecture
chips	O
,	O
with	O
the	O
exception	O
of	O
the	O
dual-core	B-Architecture
Core	O
i5-2390T	O
,	O
and	O
include	O
integrated	O
graphics	O
,	O
combining	O
the	O
key	O
features	O
of	O
the	O
earlier	O
Core	O
i5-6xx	O
and	O
Core	O
i5-7xx	O
lines	O
.	O
</s>
<s>
The	O
desktop	B-Device
CPUs	B-Device
now	O
all	O
have	O
four	O
non-SMT	O
cores	B-Architecture
(	O
like	O
the	O
i5-750	O
)	O
,	O
with	O
the	O
exception	O
of	O
the	O
i5-2390T	O
.	O
</s>
<s>
The	O
DMI	B-Architecture
bus	O
runs	O
at	O
5GT/s	O
.	O
</s>
<s>
The	O
mobile	B-Device
Core	O
i5-2xxxM	O
processors	O
are	O
all	O
dual-core	B-Architecture
and	O
hyper-threaded	B-Operating_System
chips	O
like	O
the	O
previous	O
Core	O
i5-5xxM	O
series	O
,	O
and	O
share	O
most	O
of	O
the	O
features	O
with	O
that	O
product	O
line	O
.	O
</s>
<s>
The	O
Core	B-Device
i7	I-Device
brand	O
was	O
the	O
high-end	O
for	O
Intel	O
's	O
desktop	B-Device
and	O
mobile	B-Device
processors	O
,	O
until	O
the	O
announcement	O
of	O
the	O
i9	O
in	O
2017	O
.	O
</s>
<s>
Its	O
Sandy	B-Device
Bridge	I-Device
models	O
feature	O
the	O
largest	O
amount	O
of	O
L3	O
cache	B-General_Concept
and	O
the	O
highest	O
clock	O
frequency	O
.	O
</s>
<s>
Most	O
of	O
these	O
models	O
are	O
very	O
similar	O
to	O
their	O
smaller	O
Core	B-Device
i5	I-Device
siblings	O
.	O
</s>
<s>
The	O
quad-core	B-Architecture
mobile	B-Device
Core	O
i7-2xxxQM/XM	O
processors	O
follow	O
the	O
previous	O
"	O
Clarksfield	B-Device
"	O
Core	O
i7-xxxQM/XM	O
processors	O
,	O
but	O
now	O
also	O
include	O
integrated	O
graphics	O
.	O
</s>
<s>
Ivy	B-Device
Bridge	I-Device
is	O
the	O
codename	O
for	O
a	O
"	O
third	O
generation	O
"	O
line	O
of	O
processors	O
based	O
on	O
the	O
22nm	B-Algorithm
manufacturing	O
process	O
developed	O
by	O
Intel	O
.	O
</s>
<s>
Mobile	B-Device
versions	O
of	O
the	O
CPU	B-Device
were	O
released	O
in	O
April	O
2012	O
following	O
with	O
desktop	B-Device
versions	O
in	O
September	O
2012	O
.	O
</s>
<s>
The	O
Ivy	O
Bridge-based	O
Core-i3-3xxx	O
line	O
is	O
a	O
minor	O
upgrade	O
to	O
22nm	B-Algorithm
process	O
technology	O
and	O
better	O
graphics	O
.	O
</s>
<s>
Haswell	B-Device
is	O
the	O
fourth	O
generation	O
Core	B-Device
processor	O
microarchitecture	B-General_Concept
,	O
and	O
was	O
released	O
in	O
2013	O
.	O
</s>
<s>
Broadwell	B-General_Concept
is	O
the	O
fifth	O
generation	O
Core	B-Device
processor	O
microarchitecture	B-General_Concept
,	O
and	O
was	O
released	O
by	O
Intel	O
on	O
September	O
6	O
,	O
2014	O
,	O
and	O
began	O
shipping	O
in	O
late	O
2014	O
.	O
</s>
<s>
It	O
is	O
the	O
first	O
to	O
use	O
a	O
14nm	B-Algorithm
chip	O
.	O
</s>
<s>
Additionally	O
,	O
mobile	B-Device
processors	O
were	O
launched	O
in	O
January	O
2015	O
and	O
Desktop	B-Device
Core	B-Device
i5	I-Device
and	O
i7	O
processors	O
were	O
released	O
in	O
June	O
2015	O
.	O
</s>
<s>
Processor	O
branding	O
Model	O
(	O
list	O
)	O
Cores	B-Architecture
(	O
Threads	B-Operating_System
)	O
L3	O
Cache	B-General_Concept
GPU	B-Application
Model	I-Application
Socket	O
TDP	B-General_Concept
Process	O
I/O	O
Bus	O
ReleaseDateCore	O
i75775C4	O
(	O
8	O
)	O
6	O
MBIris	O
6200LGA	O
115065	O
W14	O
nmDirect	O
Media	O
Interface	O
,	O
</s>
<s>
Skylake	B-Architecture
is	O
the	O
sixth	O
generation	O
Core	B-Device
processor	O
microarchitecture	B-General_Concept
,	O
and	O
was	O
launched	O
in	O
August	O
2015	O
.	O
</s>
<s>
Being	O
the	O
successor	O
to	O
the	O
Broadwell	B-General_Concept
line	O
,	O
it	O
is	O
a	O
redesign	O
using	O
the	O
same	O
14nm	B-Algorithm
manufacturing	O
process	O
technology	O
;	O
however	O
the	O
redesign	O
has	O
better	O
CPU	B-Device
and	O
GPU	B-Application
performance	O
and	O
reduced	O
power	O
consumption	O
.	O
</s>
<s>
Intel	O
also	O
disabled	O
overclocking	B-Application
non	O
-K	O
processors	O
.	O
</s>
<s>
+Desktop	O
processors	O
(	O
DT-Series	O
)	O
Processor	O
BrandingModelCores/ThreadsL3	O
CacheGPU	O
ModelSocketTDPProcessI/O	O
BusRelease	O
DateCore	O
i76700K4/88	O
MBHD	O
530LGA	O
115191	O
W14	O
nmDirect	O
Media	O
Interface	O
,	O
</s>
<s>
+Mobile	O
processors	O
(	O
H-Series	O
)	O
Processor	O
BrandingModelCores/ThreadsL3	O
CacheGPU	O
ModelSocketTDPProcessI/O	O
BusRelease	O
DateCore	O
i36100H2/43	O
MBHD	O
530FBGA	O
135635	O
W14	O
nmDirect	O
Media	O
Interface	O
,	O
</s>
<s>
+Mobile	O
processors	O
(	O
U-Series	O
)	O
Processor	O
BrandingModelCores/ThreadsL3	O
CacheGPU	O
ModelSocketTDPProcessI/O	O
BusRelease	O
DateCore	O
i76650U2/44	O
MBIris	O
540FCBGA	O
135615	O
W14	O
nmDirect	O
Media	O
Interface	O
,	O
</s>
<s>
Kaby	B-Device
Lake	I-Device
is	O
the	O
codename	O
for	O
the	O
seventh	O
generation	O
Core	B-Device
processor	O
,	O
and	O
was	O
launched	O
in	O
October	O
2016	O
(	O
mobile	B-Device
chips	O
)	O
and	O
January	O
2017	O
(	O
desktop	B-Device
chips	O
)	O
.	O
</s>
<s>
With	O
the	O
latest	O
generation	O
of	O
microarchitecture	B-General_Concept
,	O
Intel	O
decided	O
to	O
produce	O
Kaby	B-Device
Lake	I-Device
processors	O
without	O
using	O
their	O
"	O
tick	B-Device
–	I-Device
tock	I-Device
"	O
manufacturing	O
and	O
design	O
model	O
.	O
</s>
<s>
Kaby	B-Device
Lake	I-Device
features	O
the	O
same	O
Skylake	B-Architecture
microarchitecture	I-Architecture
and	O
is	O
fabricated	B-Architecture
using	O
Intel	O
's	O
14	B-Algorithm
nanometer	I-Algorithm
manufacturing	O
process	O
technology	O
.	O
</s>
<s>
Built	O
on	O
an	O
improved	O
14nm	B-Algorithm
process	O
(	O
14FF+	O
)	O
,	O
Kaby	B-Device
Lake	I-Device
features	O
faster	O
CPU	B-Device
clock	O
speeds	O
and	O
Turbo	B-Device
frequencies	O
.	O
</s>
<s>
Beyond	O
these	O
process	O
and	O
clock	O
speed	O
changes	O
,	O
little	O
of	O
the	O
CPU	B-Device
architecture	O
has	O
changed	O
from	O
Skylake	B-Architecture
,	O
resulting	O
in	O
identical	O
IPC	O
.	O
</s>
<s>
Kaby	B-Device
Lake	I-Device
features	O
a	O
new	O
graphics	O
architecture	O
to	O
improve	O
performance	O
in	O
3D	O
graphics	O
and	O
4K	B-Architecture
video	I-Architecture
playback	O
.	O
</s>
<s>
It	O
adds	O
native	O
High-bandwidth	B-Protocol
Digital	I-Protocol
Content	I-Protocol
Protection	I-Protocol
2.2	O
support	O
,	O
along	O
with	O
fixed	O
function	O
decode	O
of	O
H.264/MPEG	B-Application
-4	I-Application
AVC	I-Application
,	O
High	B-Algorithm
Efficiency	I-Algorithm
Video	I-Algorithm
Coding	I-Algorithm
Main	O
and	O
Main10/10	O
-bit	O
,	O
and	O
VP9	B-Algorithm
10-bit	O
and	O
8-bit	O
video	O
.	O
</s>
<s>
Hardware	O
encode	O
is	O
supported	O
for	O
H.264/MPEG	B-Application
-4	I-Application
AVC	I-Application
,	O
HEVC	B-Algorithm
Main10/10	O
-bit	O
,	O
and	O
VP9	B-Algorithm
8-bit	O
video	O
.	O
</s>
<s>
VP9	B-Algorithm
10-bit	O
encode	O
is	O
not	O
supported	O
in	O
hardware	O
.	O
</s>
<s>
OpenCL	B-Application
2.1	I-Application
is	O
now	O
supported	O
.	O
</s>
<s>
Kaby	B-Device
Lake	I-Device
is	O
the	O
first	O
Core	B-Device
architecture	I-Device
to	O
support	O
hyper-threading	B-Operating_System
for	O
the	O
Pentium-branded	O
desktop	B-Device
CPU	B-Device
SKU	O
.	O
</s>
<s>
Kaby	B-Device
Lake	I-Device
also	O
features	O
the	O
first	O
overclocking-enabled	O
i3-branded	O
CPU	B-Device
.	O
</s>
<s>
Features	O
common	O
to	O
desktop	B-Device
Kaby	B-Device
Lake	I-Device
CPUs	B-Device
:	O
</s>
<s>
The	O
Core-branded	O
processors	O
support	O
the	O
AVX2	B-General_Concept
instruction	O
set	O
.	O
</s>
<s>
No	O
L4	O
cache	B-General_Concept
(	O
eDRAM	O
)	O
.	O
</s>
<s>
PCIe	O
lanesTDPcTDPRelease	O
datePrice	O
(	O
USD	O
)	O
Single	O
coreDual	O
coreBaseMax.UpDownCore	O
i77Y752	O
(	O
4	O
)	O
1.3	O
GHz3.6	O
GHz3.4	O
GHzHD	O
615300	O
MHz1050	O
MHz4	O
MB104.5	O
W7	O
W3.5	O
WQ3	O
2016$393Core	O
i57Y571.2	O
GHz3.3	O
GHz2.9	O
GHz950	O
MHzQ1	O
2017$	O
2817Y543.2	O
GHz2.8	O
GHzQ3	O
2016Core	O
i37Y301.0	O
GHz2.6	O
GHz	O
?	O
900	O
MHz7Y321.1	O
GHz3.0	O
GHzQ2	O
2017Kaby	O
Lake-X	O
processors	O
are	O
modified	O
versions	O
of	O
Kaby	B-Device
Lake-S	I-Device
processors	O
that	O
fit	O
into	O
the	O
LGA	O
2066	O
socket	O
.	O
</s>
<s>
+Mobile	O
processors	O
(	O
U-Series	O
)	O
Processorbranding	O
Model	O
Cores(threads )	O
CPUclockrate	O
CPU	B-Device
Turbo	B-Device
clock	O
rate	O
GPU	B-Application
GPU	B-Application
clock	O
rate	O
L3cache	O
L4cache	O
Max.PCIelanes	O
TDP	B-General_Concept
cTDP	O
Releasedate	O
Price(USD )	O
Singlecore	O
Dualcore	B-Architecture
Quadcore	O
Base	O
Max	O
.	O
</s>
<s>
Coffee	B-Device
Lake	I-Device
is	O
a	O
codename	O
for	O
the	O
eighth	O
generation	O
Intel	B-Device
Core	I-Device
family	O
and	O
was	O
launched	O
in	O
October	O
2017	O
.	O
</s>
<s>
For	O
the	O
first	O
time	O
in	O
the	O
ten-year	O
history	O
of	O
Intel	B-Device
Core	I-Device
processors	O
,	O
the	O
Coffee	B-Device
Lake	I-Device
generation	O
features	O
an	O
increase	O
in	O
core	B-Device
counts	O
across	O
the	O
desktop	B-Device
lineup	O
of	O
processors	O
,	O
a	O
significant	O
driver	O
of	O
improved	O
performance	O
versus	O
previous	O
generations	O
despite	O
similar	O
per-clock	O
performance	O
.	O
</s>
<s>
Coffee	B-Device
Lake	I-Device
features	O
largely	O
the	O
same	O
CPU	B-Architecture
core	I-Architecture
and	O
performance	O
per	O
MHz	O
as	O
Skylake/Kaby	O
Lake	O
.	O
</s>
<s>
Features	O
specific	O
to	O
Coffee	B-Device
Lake	I-Device
include	O
:	O
</s>
<s>
Following	O
similar	O
refinements	O
to	O
the	O
14nm	B-Algorithm
process	O
in	O
Skylake	B-Architecture
and	O
Kaby	B-Device
Lake	I-Device
,	O
Coffee	B-Device
Lake	I-Device
is	O
the	O
third	O
14nm	B-Algorithm
process	O
refinement	O
(	O
"	O
14nm++	O
"	O
)	O
and	O
features	O
increased	O
transistor	O
gate	O
pitch	O
for	O
a	O
lower	O
current	O
density	O
and	O
higher	O
leakage	O
transistors	O
which	O
allows	O
higher	O
peak	O
power	O
and	O
higher	O
frequency	O
at	O
the	O
expense	O
of	O
die	O
area	O
and	O
idle	O
power	O
.	O
</s>
<s>
Coffee	B-Device
Lake	I-Device
will	O
be	O
used	O
in	O
conjunction	O
with	O
the	O
300-series	O
chipset	O
and	O
is	O
incompatible	O
with	O
the	O
older	O
100	O
-	O
and	O
200-series	O
chipsets	O
.	O
</s>
<s>
Amber	O
Lake	O
is	O
a	O
refinement	O
over	O
the	O
low	O
power	O
Mobile	B-Device
Kaby	B-Device
Lake	I-Device
CPUs	B-Device
.	O
</s>
<s>
Whiskey	B-Device
Lake	I-Device
is	O
Intel	B-Architecture
's	I-Architecture
codename	I-Architecture
for	O
the	O
third	O
14nm	B-Algorithm
Skylake	B-Architecture
process-refinement	O
,	O
following	O
Kaby	B-Device
Lake	I-Device
Refresh	O
and	O
Coffee	B-Device
Lake	I-Device
.	O
</s>
<s>
Intel	O
announced	O
low	O
power	O
mobile	B-Device
Whiskey	B-Device
Lake	I-Device
CPUs	B-Device
availability	O
on	O
August	O
28	O
,	O
2018	O
.	O
</s>
<s>
It	O
has	O
not	O
yet	O
been	O
advertised	O
whether	O
this	O
CPU	B-Device
architecture	O
contains	O
hardware	O
mitigations	O
for	O
Meltdown/Spectre	O
class	O
vulnerabilities	O
—	O
various	O
sources	O
contain	O
conflicting	O
information	O
.	O
</s>
<s>
Unofficially	O
it	O
was	O
announced	O
that	O
Whiskey	B-Device
Lake	I-Device
has	O
hardware	O
mitigations	O
against	O
Meltdown	B-Architecture
and	O
L1TF	B-Device
while	O
Spectre	B-Error_Name
V2	O
requires	O
software	O
mitigations	O
as	O
well	O
as	O
microcode/firmware	O
update	O
.	O
</s>
<s>
Cannon	B-Device
Lake	I-Device
(	O
formerly	O
Skymont	B-Device
)	O
is	O
Intel	B-Architecture
's	I-Architecture
codename	I-Architecture
for	O
the	O
10-nanometer	B-Algorithm
die	O
shrink	O
of	O
the	O
Kaby	B-Device
Lake	I-Device
microarchitecture	B-General_Concept
.	O
</s>
<s>
As	O
a	O
die	O
shrink	O
,	O
Cannon	B-Device
Lake	I-Device
is	O
a	O
new	O
process	O
in	O
Intel	O
's	O
"	O
process	B-Device
–	I-Device
architecture	I-Device
–	I-Device
optimization	I-Device
"	O
execution	O
plan	O
as	O
the	O
next	O
step	O
in	O
semiconductor	B-Architecture
fabrication	I-Architecture
.	O
</s>
<s>
Cannon	B-Device
Lake	I-Device
are	O
the	O
first	O
mainstream	O
CPUs	B-Device
to	O
include	O
the	O
AVX-512	B-General_Concept
instruction	O
set	O
.	O
</s>
<s>
In	O
comparison	O
to	O
the	O
previous	O
generation	O
AVX2	B-General_Concept
(	O
AVX-256	O
)	O
,	O
the	O
new	O
generation	O
AVX-512	B-General_Concept
most	O
notably	O
provides	O
double	O
the	O
width	O
of	O
data	O
registers	O
and	O
double	O
the	O
number	O
of	O
registers	O
.	O
</s>
<s>
These	O
enhancements	O
would	O
allow	O
for	O
twice	O
the	O
number	O
of	O
floating	O
point	O
operations	O
per	O
register	O
due	O
to	O
the	O
increased	O
width	O
in	O
addition	O
to	O
doubling	O
the	O
overall	O
number	O
of	O
registers	O
,	O
resulting	O
in	O
theoretical	O
performance	O
improvements	O
of	O
up	O
to	O
four	O
times	O
the	O
performance	O
of	O
AVX2	B-General_Concept
.	O
</s>
<s>
At	O
CES	O
2018	O
,	O
Intel	O
announced	O
that	O
they	O
had	O
started	O
shipping	O
mobile	B-Device
Cannon	B-Device
Lake	I-Device
CPUs	B-Device
at	O
the	O
end	O
of	O
2017	O
and	O
that	O
they	O
would	O
ramp	O
up	O
production	O
in	O
2018	O
.	O
</s>
<s>
The	O
9th	O
generation	O
Skylake	B-Architecture
CPUs	B-Device
are	O
updated	O
versions	O
of	O
previous	O
Skylake	B-Architecture
X-Series	O
CPUs	B-Device
with	O
clockspeed	O
improvements	O
.	O
</s>
<s>
The	O
9th	O
generation	O
Coffee	B-Device
Lake	I-Device
CPUs	B-Device
were	O
released	O
in	O
the	O
fourth	O
quarter	O
of	O
2018	O
.	O
</s>
<s>
They	O
include	O
hardware	O
mitigations	O
against	O
certain	O
Meltdown/Spectre	O
vulnerabilities	O
.	O
</s>
<s>
For	O
the	O
first	O
time	O
in	O
Intel	O
consumer	O
CPU	B-Device
history	O
,	O
these	O
CPUs	B-Device
support	O
up	O
to	O
128GB	O
RAM	B-Architecture
.	O
</s>
<s>
Even	O
though	O
the	O
F	O
suffix	O
CPUs	B-Device
lack	O
an	O
integrated	O
GPU	B-Application
,	O
Intel	O
set	O
the	O
same	O
price	O
for	O
these	O
CPUs	B-Device
as	O
their	O
featureful	O
counterparts	O
.	O
</s>
<s>
*	O
various	O
reviews	O
show	O
that	O
the	O
Core	B-Device
i9	I-Device
9900K	O
CPU	B-Device
may	O
consume	O
over	O
140W	O
under	O
load	O
.	O
</s>
<s>
The	O
Core	B-Device
i9	I-Device
9900KS	O
may	O
consume	O
even	O
more	O
.	O
</s>
<s>
Cascade	B-Device
Lake	I-Device
X-Series	O
CPUs	B-Device
are	O
the	O
10th	O
generation	O
versions	O
of	O
the	O
previous	O
Skylake	B-Architecture
X-Series	O
CPUs	B-Device
.	O
</s>
<s>
Ice	B-Device
Lake	I-Device
is	O
codename	O
for	O
Intel	O
's	O
10th	O
generation	O
Intel	B-Device
Core	I-Device
processors	O
,	O
representing	O
an	O
enhancement	O
of	O
the	O
'	O
Architecture	O
 '	O
of	O
the	O
preceding	O
generation	O
Kaby	O
Lake/Cannon	O
Lake	O
processors	O
(	O
as	O
specified	O
in	O
Intel	O
's	O
process	B-Device
–	I-Device
architecture	I-Device
–	I-Device
optimization	I-Device
execution	O
plan	O
)	O
.	O
</s>
<s>
As	O
the	O
successor	O
to	O
Cannon	B-Device
Lake	I-Device
,	O
Ice	B-Device
Lake	I-Device
uses	O
Intel	O
's	O
newer	O
10nm+	O
fabrication	B-Architecture
process	I-Architecture
,	O
and	O
is	O
powered	O
by	O
the	O
Sunny	B-Device
Cove	I-Device
microarchitecture	I-Device
.	O
</s>
<s>
Ice	B-Device
Lake	I-Device
are	O
the	O
first	O
Intel	B-Device
CPUs	I-Device
to	O
feature	O
in-silicon	O
mitigations	O
for	O
the	O
hardware	O
vulnerabilities	O
discovered	O
in	O
2017	O
,	O
Meltdown	B-Architecture
and	O
Spectre	B-Error_Name
.	O
</s>
<s>
These	O
side-channel	O
attacks	O
exploit	O
branch	B-General_Concept
prediction	I-General_Concept
's	I-General_Concept
use	O
of	O
speculative	B-General_Concept
execution	I-General_Concept
.	O
</s>
<s>
These	O
exploits	O
may	O
cause	O
the	O
CPU	B-Device
to	O
reveal	O
cached	O
private	O
information	O
which	O
the	O
exploiting	O
process	O
is	O
not	O
intended	O
to	O
be	O
able	O
to	O
access	O
as	O
a	O
form	O
of	O
timing	O
attack	O
.	O
</s>
<s>
Comet	B-Device
Lake	I-Device
is	O
Intel	B-Architecture
's	I-Architecture
codename	I-Architecture
for	O
the	O
fourth	O
14nm	B-Algorithm
Skylake	B-Architecture
process-refinement	O
,	O
following	O
Whiskey	B-Device
Lake	I-Device
.	O
</s>
<s>
Intel	O
announced	O
low	O
power	O
mobile	B-Device
Comet	B-Device
Lake	I-Device
CPUs	B-Device
availability	O
on	O
August	O
21	O
,	O
2019	O
.	O
</s>
<s>
LPDDR5-5400	O
"	O
architecture	O
capability	O
"	O
(	O
Intel	O
expects	O
Tiger	B-Device
Lake	I-Device
products	O
with	O
LPDDR5	O
to	O
be	O
available	O
around	O
Q1	O
2021	O
)	O
Designs	O
with	O
LPDDR5	O
memory	B-Architecture
are	O
yet	O
to	O
be	O
announced	O
as	O
of	O
March	O
2022	O
.	O
</s>
<s>
Rocket	B-Device
Lake	I-Device
is	O
a	O
codename	O
for	O
Intel	O
's	O
desktop	B-Device
x86	B-Operating_System
chip	O
family	O
based	O
on	O
the	O
new	O
Cypress	O
Cove	O
microarchitecture	B-General_Concept
,	O
a	O
variant	O
of	O
Sunny	B-Device
Cove	I-Device
(	O
used	O
by	O
Intel	O
's	O
Ice	B-Device
Lake	I-Device
mobile	B-Device
processors	O
)	O
backported	O
to	O
the	O
older	O
14nm	B-Algorithm
process	O
.	O
</s>
<s>
The	O
chips	O
are	O
marketed	O
as	O
"	O
Intel	O
11th	O
generation	O
Core	B-Device
"	O
.	O
</s>
<s>
All	O
CPUs	B-Device
listed	O
below	O
support	O
DDR4-3200	O
natively	O
.	O
</s>
<s>
The	O
Core	B-Device
i9	I-Device
K/KF	O
processors	O
enable	O
a	O
1:1	O
ratio	O
of	O
DRAM	O
to	O
memory	B-General_Concept
controller	I-General_Concept
by	O
default	O
at	O
DDR4-3200	O
,	O
whereas	O
the	O
Core	B-Device
i9	I-Device
non	O
K/KF	O
and	O
all	O
other	O
CPUs	B-Device
listed	O
below	O
enable	O
a	O
2:1	O
ratio	O
of	O
DRAM	O
to	O
memory	B-General_Concept
controller	I-General_Concept
by	O
default	O
at	O
DDR4-3200	O
and	O
a	O
1:1	O
ratio	O
by	O
default	O
at	O
DDR4-2933	O
.	O
</s>
<s>
Alder	B-Device
Lake	I-Device
is	O
Intel	B-Architecture
's	I-Architecture
codename	I-Architecture
for	O
the	O
12th	O
generation	O
of	O
Intel	B-Device
Core	I-Device
processors	O
based	O
on	O
a	O
hybrid	O
architecture	O
utilizing	O
Golden	B-Device
Cove	I-Device
high-performance	O
cores	B-Architecture
and	O
Gracemont	B-Device
power-efficient	O
cores	B-Architecture
.	O
</s>
<s>
It	O
is	O
fabricated	B-Architecture
using	O
Intel	O
's	O
Intel	B-Algorithm
7	I-Algorithm
process	O
,	O
previously	O
referred	O
to	O
as	O
Intel	O
10nm	B-Algorithm
Enhanced	O
SuperFin	O
(	O
10ESF	O
)	O
.	O
</s>
<s>
Intel	O
officially	O
announced	O
12th	O
Gen	O
Intel	B-Device
Core	I-Device
CPUs	B-Device
on	O
October	O
27	O
,	O
2021	O
,	O
and	O
was	O
launched	O
to	O
the	O
market	O
on	O
November	O
4	O
,	O
2021	O
.	O
</s>
<s>
AVX-512	B-General_Concept
(	O
including	O
FP16	O
)	O
is	O
present	O
but	O
disabled	O
by	O
default	O
to	O
match	O
E-cores	O
.	O
</s>
<s>
Skylake-like	O
IPC	O
.	O
</s>
<s>
Intel	O
Thread	B-Operating_System
Director	O
(	O
Scalable	O
Hybrid	O
Arch	O
Scheduling	O
)	O
,	O
a	O
hardware	O
technology	O
to	O
assist	O
the	O
OS	O
thread	B-Operating_System
scheduler	O
with	O
more	O
efficient	O
load	O
distribution	O
between	O
heterogeneous	O
CPU	B-Architecture
cores	I-Architecture
.	O
</s>
<s>
Microsoft	O
added	O
support	O
for	O
Thread	B-Operating_System
Director	O
to	O
Windows	B-Application
11	I-Application
,	O
while	O
support	O
to	O
Linux	O
was	O
merged	O
in	O
kernel	O
5.18	O
.	O
</s>
<s>
All	O
the	O
CPUs	B-Device
support	O
up	O
to	O
128GB	O
of	O
DDR4-3200	O
or	O
DDR5-4800	O
RAM	B-Architecture
in	O
dual	O
channel	O
mode	O
.	O
</s>
<s>
Some	O
models	O
feature	O
integrated	O
UHD	B-Application
Graphics	I-Application
770	I-Application
,	O
UHD	B-Application
Graphics	I-Application
730	I-Application
or	O
UHD	B-Application
Graphics	I-Application
710	I-Application
GPU	B-Application
with	O
32/24/16	O
EUs	B-General_Concept
and	O
base	O
frequency	O
of	O
300MHz	O
.	O
</s>
<s>
By	O
default	O
Alder	B-Device
Lake	I-Device
CPUs	B-Device
are	O
configured	O
to	O
run	O
at	O
Turbo	B-Device
Power	O
at	O
all	O
times	O
and	O
Base	O
Power	O
is	O
only	O
guaranteed	O
when	O
P-Cores/E	O
-cores	O
do	O
not	O
exceed	O
the	O
base	O
clock	O
rate	O
.	O
</s>
<s>
Max	O
Turbo	B-Device
Power	O
:	O
the	O
maximum	O
sustained	O
(	O
>1s	O
)	O
power	O
dissipation	O
of	O
the	O
processor	O
as	O
limited	O
by	O
current	O
and/or	O
temperature	O
controls	O
.	O
</s>
<s>
Instantaneous	O
power	O
may	O
exceed	O
Maximum	O
Turbo	B-Device
Power	O
for	O
short	O
durations	O
( ≤10ms	O
)	O
.	O
</s>
<s>
Maximum	O
Turbo	B-Device
Power	O
is	O
configurable	O
by	O
system	O
vendor	O
and	O
can	O
be	O
system	O
specific	O
.	O
</s>
<s>
CPUs	B-Device
in	O
bold	O
below	O
feature	O
ECC	B-General_Concept
memory	I-General_Concept
support	O
only	O
when	O
paired	O
with	O
a	O
motherboard	O
based	O
on	O
the	O
W680	O
chipset	O
.	O
</s>
<s>
+	O
Processor	O
branding	O
Model	O
Cores	B-Architecture
(	O
threads	B-Operating_System
)	O
Base	O
clock	O
rate	O
TurboBoost	B-Device
2.0	O
Turbo	B-Device
Max	O
3.0	O
GPU	B-Application
Smart	O
cache	B-General_Concept
Power	O
Price	O
(	O
USD	O
)	O
Model	O
Max	O
.	O
</s>
<s>
+	O
Processor	O
branding	O
Model	O
Cores	B-Architecture
(	O
threads	B-Operating_System
)	O
Base	O
clock	O
rate	O
TurboBoost	B-Device
2.0	O
UHD	B-Application
Graphics	I-Application
Smart	O
cache	B-General_Concept
Power	O
Price	O
(	O
USD	O
)	O
EUs	B-General_Concept
Max	O
.	O
</s>
<s>
Raptor	O
Lake	O
is	O
Intel	B-Architecture
's	I-Architecture
codename	I-Architecture
for	O
the	O
13th	O
generation	O
of	O
Intel	B-Device
Core	I-Device
processors	O
and	O
the	O
second	O
generation	O
based	O
on	O
a	O
hybrid	O
architecture	O
.	O
</s>
<s>
It	O
is	O
fabricated	B-Architecture
using	O
Intel	O
's	O
Intel	B-Algorithm
7	I-Algorithm
process	O
.	O
</s>
<s>
In	O
early	O
2018	O
,	O
news	O
reports	O
indicated	O
that	O
security	O
flaws	O
,	O
referred	O
to	O
as	O
"	O
Meltdown	B-Architecture
"	O
and	O
"	O
Spectre	B-Error_Name
"	O
,	O
were	O
found	O
"	O
in	O
virtually	O
all	O
Intel	B-Device
processors	I-Device
[	O
made	O
in	O
the	O
past	O
two	O
decades ]	O
that	O
will	O
require	O
fixes	O
within	O
Windows	O
,	O
macOS	O
and	O
Linux	O
"	O
.	O
</s>
<s>
According	O
to	O
a	O
New	O
York	O
Times	O
report	O
,	O
"	O
There	O
is	O
no	O
easy	O
fix	O
for	O
Spectre	B-Error_Name
...	O
as	O
for	O
Meltdown	B-Architecture
,	O
the	O
software	O
patch	O
needed	O
to	O
fix	O
the	O
issue	O
could	O
slow	O
down	O
computers	O
by	O
as	O
much	O
as	O
30	O
percent	O
"	O
.	O
</s>
<s>
In	O
mid	O
2018	O
,	O
the	O
majority	O
of	O
Intel	B-Device
Core	I-Device
processors	O
were	O
found	O
to	O
possess	O
a	O
defect	O
(	O
the	O
Foreshadow	B-Device
vulnerability	O
)	O
,	O
which	O
undermines	O
the	O
Software	O
Guard	O
Extensions	O
(	O
SGX	O
)	O
feature	O
of	O
the	O
processor	O
.	O
</s>
<s>
In	O
March	O
2020	O
,	O
computer	O
security	O
experts	O
reported	O
another	O
Intel	O
chip	O
security	O
flaw	O
,	O
besides	O
the	O
Meltdown	B-Architecture
and	O
Spectre	B-Error_Name
flaws	O
,	O
with	O
the	O
systematic	O
name	O
(	O
or	O
,	O
"	O
Intel	O
CSME	O
Bug	O
"	O
,	O
referencing	O
the	O
Converged	O
Security	O
and	O
Management	O
Engine	O
)	O
.	O
</s>
<s>
This	O
newly	O
found	O
flaw	O
is	O
not	O
fixable	O
with	O
a	O
firmware	O
update	O
,	O
and	O
affects	O
nearly	O
"	O
all	O
Intel	B-Device
chips	I-Device
released	O
in	O
the	O
past	O
five	O
years	O
"	O
.	O
</s>
