<s>
The	O
Intel	B-Device
8259	I-Device
is	O
a	O
Programmable	B-Architecture
Interrupt	I-Architecture
Controller	I-Architecture
(	O
PIC	O
)	O
designed	O
for	O
the	O
Intel	B-General_Concept
8085	I-General_Concept
and	O
Intel	B-General_Concept
8086	I-General_Concept
microprocessors	B-Architecture
.	O
</s>
<s>
The	O
initial	O
part	O
was	O
8259	B-Device
,	O
a	O
later	O
A	O
suffix	O
version	O
was	O
upward	O
compatible	O
and	O
usable	O
with	O
the	O
8086	B-General_Concept
or	O
8088	B-Device
processor	O
.	O
</s>
<s>
The	O
8259	B-Device
combines	O
multiple	O
interrupt	B-Application
input	O
sources	O
into	O
a	O
single	O
interrupt	B-Application
output	O
to	O
the	O
host	O
microprocessor	B-Architecture
,	O
extending	O
the	O
interrupt	B-Application
levels	O
available	O
in	O
a	O
system	O
beyond	O
the	O
one	O
or	O
two	O
levels	O
found	O
on	O
the	O
processor	O
chip	O
.	O
</s>
<s>
The	O
8259A	B-Device
was	O
the	O
interrupt	B-Architecture
controller	I-Architecture
for	O
the	O
ISA	B-Architecture
bus	I-Architecture
in	O
the	O
original	O
IBM	B-Device
PC	I-Device
and	O
IBM	B-Operating_System
PC	I-Operating_System
AT	I-Operating_System
.	O
</s>
<s>
The	O
8259	B-Device
was	O
introduced	O
as	O
part	O
of	O
Intel	O
's	O
MCS	O
85	O
family	O
in	O
1976	O
.	O
</s>
<s>
The	O
8259A	B-Device
was	O
included	O
in	O
the	O
original	O
PC	O
introduced	O
in	O
1981	O
and	O
maintained	O
by	O
the	O
PC/XT	B-Device
when	O
introduced	O
in	O
1983	O
.	O
</s>
<s>
A	O
second	O
8259A	B-Device
was	O
added	O
with	O
the	O
introduction	O
of	O
the	O
PC/AT	B-Operating_System
.	O
</s>
<s>
The	O
8259	B-Device
has	O
coexisted	O
with	O
the	O
Intel	B-Device
APIC	I-Device
Architecture	I-Device
since	O
its	O
introduction	O
in	O
Symmetric	B-Operating_System
Multi-Processor	I-Operating_System
PCs	O
.	O
</s>
<s>
Modern	O
PCs	O
have	O
begun	O
to	O
phase	O
out	O
the	O
8259A	B-Device
in	O
favor	O
of	O
the	O
Intel	B-Device
APIC	I-Device
Architecture	I-Device
.	O
</s>
<s>
However	O
,	O
while	O
not	O
anymore	O
a	O
separate	O
chip	O
,	O
the	O
8259A	B-Device
interface	O
is	O
still	O
provided	O
by	O
the	O
Platform	B-Device
Controller	I-Device
Hub	I-Device
or	O
Southbridge	B-Device
chipset	O
on	O
modern	O
x86	B-Operating_System
motherboards	B-Device
.	O
</s>
<s>
The	O
main	O
signal	O
pins	O
on	O
an	O
8259	B-Device
are	O
as	O
follows	O
:	O
eight	O
interrupt	B-Application
input	O
request	O
lines	O
named	O
IRQ0	O
through	O
IRQ7	O
,	O
an	O
interrupt	B-General_Concept
request	I-General_Concept
output	O
line	O
named	O
INTR	B-General_Concept
,	O
interrupt	B-Application
acknowledgment	O
line	O
named	O
INTA	O
,	O
D0	O
through	O
D7	O
for	O
communicating	O
the	O
interrupt	B-Application
level	O
or	O
vector	O
offset	O
.	O
</s>
<s>
Other	O
connections	O
include	O
CAS0	O
through	O
CAS2	O
for	O
cascading	O
between	O
8259s	B-Device
.	O
</s>
<s>
Up	O
to	O
eight	O
slave	O
8259s	B-Device
may	O
be	O
cascaded	O
to	O
a	O
master	O
8259	B-Device
to	O
provide	O
up	O
to	O
64	O
IRQs	B-General_Concept
.	O
</s>
<s>
8259s	B-Device
are	O
cascaded	O
by	O
connecting	O
the	O
INT	O
line	O
of	O
one	O
slave	O
8259	B-Device
to	O
the	O
IRQ	B-General_Concept
line	O
of	O
one	O
master	O
8259	B-Device
.	O
</s>
<s>
End	B-Device
of	I-Device
Interrupt	I-Device
(	O
EOI	O
)	O
operations	O
support	O
specific	O
EOI	O
,	O
non-specific	O
EOI	O
,	O
and	O
auto-EOI	O
.	O
</s>
<s>
A	O
specific	O
EOI	O
specifies	O
the	O
IRQ	B-General_Concept
level	O
it	O
is	O
acknowledging	O
in	O
the	O
ISR	O
.	O
</s>
<s>
A	O
non-specific	O
EOI	O
resets	O
the	O
IRQ	B-General_Concept
level	O
in	O
the	O
ISR	O
.	O
</s>
<s>
Auto-EOI	O
resets	O
the	O
IRQ	B-General_Concept
level	O
in	O
the	O
ISR	O
immediately	O
after	O
the	O
interrupt	B-Application
is	O
acknowledged	O
.	O
</s>
<s>
Edge	O
and	O
level	O
interrupt	B-Application
trigger	O
modes	O
are	O
supported	O
by	O
the	O
8259A	B-Device
.	O
</s>
<s>
The	O
8259	B-Device
may	O
be	O
configured	O
to	O
work	O
with	O
an	O
8080/8085	O
or	O
an	O
8086/8088	O
.	O
</s>
<s>
On	O
the	O
8086/8088	O
,	O
the	O
interrupt	B-Architecture
controller	I-Architecture
will	O
provide	O
an	O
interrupt	B-Application
number	O
on	O
the	O
data	O
bus	O
when	O
an	O
interrupt	B-Application
occurs	O
.	O
</s>
<s>
The	O
interrupt	B-Application
cycle	O
of	O
the	O
8080/8085	O
will	O
issue	O
three	O
bytes	O
on	O
the	O
data	O
bus	O
(	O
corresponding	O
to	O
a	O
CALL	O
instruction	O
in	O
the	O
8080/8085	O
instruction	O
set	O
)	O
.	O
</s>
<s>
The	O
8259A	B-Device
provides	O
additional	O
functionality	O
compared	O
to	O
the	O
8259	B-Device
(	O
in	O
particular	O
buffered	O
mode	O
and	O
level-triggered	O
mode	O
)	O
and	O
is	O
upward	O
compatible	O
with	O
it	O
.	O
</s>
<s>
Programming	O
an	O
8259	B-Device
in	O
conjunction	O
with	O
DOS	B-Device
and	O
Microsoft	B-Application
Windows	I-Application
has	O
introduced	O
a	O
number	O
of	O
confusing	O
issues	O
for	O
the	O
sake	O
of	O
backwards	O
compatibility	O
,	O
which	O
extends	O
as	O
far	O
back	O
as	O
the	O
original	O
PC	O
introduced	O
in	O
1981	O
.	O
</s>
<s>
DOS	B-Device
device	O
drivers	O
are	O
expected	O
to	O
send	O
a	O
non-specific	O
EOI	O
to	O
the	O
8259s	B-Device
when	O
they	O
finish	O
servicing	O
their	O
device	O
.	O
</s>
<s>
This	O
prevents	O
the	O
use	O
of	O
any	O
of	O
the	O
8259	B-Device
's	O
other	O
EOI	O
modes	O
in	O
DOS	B-Device
,	O
and	O
excludes	O
the	O
differentiation	O
between	O
device	O
interrupts	B-Application
rerouted	O
from	O
the	O
master	O
8259	B-Device
to	O
the	O
slave	O
8259	B-Device
.	O
</s>
<s>
The	O
second	O
issue	O
deals	O
with	O
the	O
use	O
of	O
IRQ2	O
and	O
IRQ9	O
from	O
the	O
introduction	O
of	O
a	O
slave	O
8259	B-Device
in	O
the	O
PC/AT	B-Operating_System
.	O
</s>
<s>
The	O
slave	O
8259	B-Device
's	O
INT	O
output	O
is	O
connected	O
to	O
the	O
master	O
's	O
IR2	O
.	O
</s>
<s>
The	O
IRQ2	O
line	O
of	O
the	O
ISA	B-Architecture
bus	I-Architecture
,	O
originally	O
connected	O
to	O
this	O
IR2	O
,	O
was	O
rerouted	O
to	O
IR1	O
of	O
the	O
slave	O
.	O
</s>
<s>
To	O
allow	O
backwards	O
compatibility	O
with	O
DOS	B-Device
device	O
drivers	O
that	O
still	O
set	O
up	O
for	O
IRQ2	O
,	O
a	O
handler	O
is	O
installed	O
by	O
the	O
BIOS	O
for	O
IRQ9	O
that	O
redirects	O
interrupts	B-Application
to	O
the	O
original	O
IRQ2	O
handler	O
.	O
</s>
<s>
On	O
the	O
PC	O
,	O
the	O
BIOS	O
(	O
and	O
thus	O
also	O
DOS	B-Device
)	O
traditionally	O
maps	O
the	O
master	O
8259	B-Device
interrupt	B-General_Concept
requests	I-General_Concept
(	O
IRQ0-IRQ7	O
)	O
to	O
interrupt	B-Application
vector	O
offset	O
8	O
(	O
INT08-INT0F	O
)	O
and	O
the	O
slave	O
8259	B-Device
(	O
in	O
PC/AT	B-Operating_System
and	O
later	O
)	O
interrupt	B-General_Concept
requests	I-General_Concept
(	O
IRQ8-IRQ15	O
)	O
to	O
interrupt	B-Application
vector	O
offset	O
112	O
(	O
INT70-INT77	O
)	O
.	O
</s>
<s>
This	O
was	O
done	O
despite	O
the	O
first	O
32	O
(	O
INT00-INT1F	O
)	O
interrupt	B-Application
vectors	O
being	O
reserved	O
by	O
the	O
processor	O
for	O
internal	O
exceptions	O
(	O
this	O
was	O
ignored	O
for	O
the	O
design	O
of	O
the	O
PC	O
for	O
some	O
reason	O
)	O
.	O
</s>
<s>
Because	O
of	O
the	O
reserved	O
vectors	O
for	O
exceptions	O
most	O
other	O
operating	O
systems	O
map	O
(	O
at	O
least	O
the	O
master	O
)	O
8259	B-Device
IRQs	B-General_Concept
(	O
if	O
used	O
on	O
a	O
platform	O
)	O
to	O
another	O
interrupt	B-Application
vector	O
base	O
offset	O
.	O
</s>
<s>
Since	O
most	O
other	O
operating	O
systems	O
allow	O
for	O
changes	O
in	O
device	O
driver	O
expectations	O
,	O
other	O
8259	B-Device
modes	O
of	O
operation	O
,	O
such	O
as	O
Auto-EOI	O
,	O
may	O
be	O
used	O
.	O
</s>
<s>
This	O
is	O
especially	O
important	O
for	O
modern	O
x86	B-Operating_System
hardware	O
in	O
which	O
a	O
significant	O
amount	O
of	O
time	O
may	O
be	O
spent	O
on	O
I/O	O
address	O
space	O
delay	O
when	O
communicating	O
with	O
the	O
8259s	B-Device
.	O
</s>
<s>
This	O
also	O
allows	O
a	O
number	O
of	O
other	O
optimizations	O
in	O
synchronization	O
,	O
such	O
as	O
critical	O
sections	O
,	O
in	O
a	O
multiprocessor	O
x86	B-Operating_System
system	O
with	O
8259s	B-Device
.	O
</s>
<s>
Since	O
the	O
ISA	B-Architecture
bus	I-Architecture
does	O
not	O
support	O
level	B-Application
triggered	I-Application
interrupts	I-Application
,	O
level	B-Application
triggered	I-Application
mode	O
may	O
not	O
be	O
used	O
for	O
interrupts	B-Application
connected	O
to	O
ISA	B-Architecture
devices	O
.	O
</s>
<s>
This	O
means	O
that	O
on	O
PC/XT	B-Device
,	O
PC/AT	B-Operating_System
,	O
and	O
compatible	O
systems	O
the	O
8259	B-Device
must	O
be	O
programmed	O
for	O
edge	B-Application
triggered	I-Application
mode	O
.	O
</s>
<s>
On	O
MCA	O
systems	O
,	O
devices	O
use	O
level	B-Application
triggered	I-Application
interrupts	I-Application
and	O
the	O
interrupt	B-Architecture
controller	I-Architecture
is	O
hardwired	O
to	O
always	O
work	O
in	O
level	B-Application
triggered	I-Application
mode	O
.	O
</s>
<s>
On	O
newer	O
EISA	O
,	O
PCI	O
,	O
and	O
later	O
systems	O
the	O
Edge/Level	O
Control	O
Registers	O
(	O
ELCRs	O
)	O
control	O
the	O
mode	O
per	O
IRQ	B-General_Concept
line	O
,	O
effectively	O
making	O
the	O
mode	O
of	O
the	O
8259	B-Device
irrelevant	O
for	O
such	O
systems	O
with	O
ISA	B-Architecture
buses	O
.	O
</s>
<s>
The	O
ELCRs	O
are	O
located	O
0x4d0	O
and	O
0x4d1	O
in	O
the	O
x86	B-Operating_System
I/O	O
address	O
space	O
.	O
</s>
<s>
They	O
are	O
8-bits	O
wide	O
,	O
each	O
bit	O
corresponding	O
to	O
an	O
IRQ	B-General_Concept
from	O
the	O
8259s	B-Device
.	O
</s>
<s>
When	O
a	O
bit	O
is	O
set	O
,	O
the	O
IRQ	B-General_Concept
is	O
in	O
level	B-Application
triggered	I-Application
mode	O
;	O
otherwise	O
,	O
the	O
IRQ	B-General_Concept
is	O
in	O
edge	B-Application
triggered	I-Application
mode	O
.	O
</s>
<s>
The	O
8259	B-Device
generates	O
spurious	B-Application
interrupts	I-Application
in	O
response	O
to	O
a	O
number	O
of	O
conditions	O
.	O
</s>
<s>
The	O
first	O
is	O
an	O
IRQ	B-General_Concept
line	O
being	O
deasserted	O
before	O
it	O
is	O
acknowledged	O
.	O
</s>
<s>
This	O
may	O
occur	O
due	O
to	O
noise	O
on	O
the	O
IRQ	B-General_Concept
lines	O
.	O
</s>
<s>
In	O
edge	B-Application
triggered	I-Application
mode	O
,	O
the	O
noise	O
must	O
maintain	O
the	O
line	O
in	O
the	O
low	O
state	O
for	O
100	O
ns	O
.	O
</s>
<s>
When	O
the	O
noise	O
diminishes	O
,	O
a	O
pull-up	O
resistor	O
returns	O
the	O
IRQ	B-General_Concept
line	O
to	O
high	O
,	O
thus	O
generating	O
a	O
false	O
interrupt	B-Application
.	O
</s>
<s>
In	O
level	B-Application
triggered	I-Application
mode	O
,	O
the	O
noise	O
may	O
cause	O
a	O
high	O
signal	O
level	O
on	O
the	O
systems	O
INTR	B-General_Concept
line	O
.	O
</s>
<s>
If	O
the	O
system	O
sends	O
an	O
acknowledgment	O
request	O
,	O
the	O
8259	B-Device
has	O
nothing	O
to	O
resolve	O
and	O
thus	O
sends	O
an	O
IRQ7	O
in	O
response	O
.	O
</s>
<s>
A	O
similar	O
case	O
can	O
occur	O
when	O
the	O
8259	B-Device
unmask	O
and	O
the	O
IRQ	B-General_Concept
input	O
de-assertion	O
are	O
not	O
properly	O
synchronized	O
.	O
</s>
<s>
In	O
many	O
systems	O
,	O
the	O
IRQ	B-General_Concept
input	O
is	O
deasserted	O
by	O
an	O
I/O	O
write	O
,	O
and	O
the	O
processor	O
does	O
n't	O
wait	O
until	O
the	O
write	O
reaches	O
the	O
I/O	O
device	O
.	O
</s>
<s>
If	O
the	O
processor	O
continues	O
and	O
unmasks	O
the	O
8259	B-Device
IRQ	B-General_Concept
before	O
the	O
IRQ	B-General_Concept
input	O
is	O
deasserted	O
,	O
the	O
8259	B-Device
will	O
assert	O
INTR	B-General_Concept
again	O
.	O
</s>
<s>
By	O
the	O
time	O
the	O
processor	O
recognizes	O
this	O
INTR	B-General_Concept
and	O
issues	O
an	O
acknowledgment	O
to	O
read	O
the	O
IRQ	B-General_Concept
from	O
the	O
8259	B-Device
,	O
the	O
IRQ	B-General_Concept
input	O
may	O
be	O
deasserted	O
,	O
and	O
the	O
8259	B-Device
returns	O
a	O
spurious	O
IRQ7	O
.	O
</s>
<s>
The	O
second	O
is	O
the	O
master	O
8259	B-Device
's	O
IRQ2	O
is	O
active	O
high	O
when	O
the	O
slave	O
8259	B-Device
's	O
IRQ	B-General_Concept
lines	O
are	O
inactive	O
on	O
the	O
falling	O
edge	O
of	O
an	O
interrupt	B-Application
acknowledgment	O
.	O
</s>
<s>
The	O
PC/XT	B-Device
ISA	B-Architecture
system	O
had	O
one	O
8259	B-Device
controller	O
,	O
while	O
PC/AT	B-Operating_System
and	O
later	O
systems	O
had	O
two	O
8259	B-Device
controllers	O
,	O
master	O
and	O
slave	O
.	O
</s>
<s>
IRQ0	O
through	O
IRQ7	O
are	O
the	O
master	O
8259	B-Device
's	O
interrupt	B-Application
lines	I-Application
,	O
while	O
IRQ8	O
through	O
IRQ15	O
are	O
the	O
slave	O
8259	B-Device
's	O
interrupt	B-Application
lines	I-Application
.	O
</s>
<s>
The	O
labels	O
on	O
the	O
pins	O
on	O
an	O
8259	B-Device
are	O
IR0	O
through	O
IR7	O
.	O
</s>
<s>
IRQ0	O
through	O
IRQ15	O
are	O
the	O
names	O
of	O
the	O
ISA	B-Architecture
bus	I-Architecture
's	O
lines	O
to	O
which	O
the	O
8259s	B-Device
are	O
attached	O
.	O
</s>
<s>
Model	O
Number	O
Technology	O
Temperature	O
Range	O
Package	O
Date	O
of	O
Release	O
Price	O
(	O
USD	O
)	O
In	O
quantities	O
of	O
100	O
and	O
up	O
ID8259	O
-40	O
°C	O
to	O
+85	O
°CIntel	O
Corporation	O
,	O
"	O
8086	B-General_Concept
Available	O
for	O
industrial	O
environment	O
"	O
,	O
Intel	O
Preview	O
Special	O
Issue	O
:	O
16-Bit	O
Solutions	O
,	O
May/June	O
1980	O
,	O
Page	O
29	O
March/April	O
1979Intel	O
Corporation	O
,	O
"	O
Microcomputer	O
Component	O
:	O
New	O
industrial	O
grade	O
product	O
line	O
answers	O
the	O
demand	O
for	O
high-reliability	O
components	O
to	O
operate	O
in	O
industrial	O
applications	O
.	O
</s>
