<s>
The	O
Intel	B-Device
8253	I-Device
and	O
8254	B-Device
are	O
programmable	B-Device
interval	I-Device
timers	I-Device
(	O
PITs	O
)	O
,	O
which	O
perform	O
timing	O
and	O
counting	O
functions	O
using	O
three	O
16-bit	O
counters	O
.	O
</s>
<s>
The	O
825x	O
family	O
was	O
primarily	O
designed	O
for	O
the	O
Intel	O
8080/8085	O
-processors	O
,	O
but	O
were	O
later	O
used	O
in	O
x86	B-Operating_System
compatible	I-Operating_System
systems	O
.	O
</s>
<s>
The	O
825x	O
chips	O
,	O
or	O
an	O
equivalent	O
circuit	O
embedded	O
in	O
a	O
larger	O
chip	O
,	O
are	O
found	O
in	O
all	O
IBM	O
PC	O
compatibles	O
and	O
Soviet	O
computers	O
like	O
the	O
Vector-06C	B-Device
.	O
</s>
<s>
In	O
PC	O
compatibles	O
,	O
Timer	O
Channel	O
0	O
is	O
assigned	O
to	O
IRQ-0	O
(	O
the	O
highest	O
priority	O
hardware	O
interrupt	O
)	O
.	O
</s>
<s>
Timer	O
Channel	O
2	O
is	O
assigned	O
to	O
the	O
PC	B-Device
speaker	I-Device
.	O
</s>
<s>
The	O
Intel	O
82c54	O
(	O
c	O
for	O
CMOS	B-Device
logic	O
)	O
variant	O
handles	O
up	O
to	O
10MHz	O
clock	O
signals	O
.	O
</s>
<s>
The	O
8253	B-Device
is	O
described	O
in	O
the	O
1980	O
Intel	O
"	O
Component	O
Data	O
Catalog	O
"	O
publication	O
.	O
</s>
<s>
The	O
8254	B-Device
,	O
described	O
as	O
a	O
superset	O
of	O
the	O
8253	B-Device
with	O
higher	O
clock	O
speed	O
ratings	O
,	O
has	O
a	O
"	O
preliminary	O
"	O
data	O
sheet	O
in	O
the	O
1982	O
Intel	O
"	O
Component	O
Data	O
Catalog	O
"	O
.	O
</s>
<s>
The	O
8254	B-Device
is	O
implemented	O
in	O
HMOS	O
and	O
has	O
a	O
"	O
Read	O
Back	O
"	O
command	O
not	O
available	O
on	O
the	O
8253	B-Device
,	O
and	O
permits	O
reading	O
and	O
writing	O
of	O
the	O
same	O
counter	O
to	O
be	O
interleaved	O
.	O
</s>
<s>
Modern	O
PC	O
compatibles	O
,	O
either	O
when	O
using	O
SoC	B-Architecture
CPUs	B-Device
or	O
southbridge	B-Device
typically	O
implement	O
full	O
8254	B-Device
compatibility	O
for	O
backward	O
compatibility	O
and	O
interoperability	O
.	O
</s>
<s>
The	O
Read	O
Back	O
command	O
being	O
a	O
vital	O
I/O	O
feature	O
for	O
interoperability	O
with	O
multicore	O
CPUs	B-Device
and	O
GPUs	O
.	O
</s>
<s>
The	O
available	O
82C53	O
CMOS	B-Device
version	O
was	O
outsourced	O
to	O
Oki	O
Electronic	O
Industry	O
Co.	O
,	O
Ltd	O
.	O
</s>
<s>
The	O
three	O
counters	O
are	O
16-bit	O
down	O
counters	O
independent	O
of	O
each	O
other	O
,	O
and	O
can	O
be	O
easily	O
read	O
by	O
the	O
CPU	B-Device
.	O
</s>
<s>
Data	O
bus	O
buffer	O
contains	O
the	O
logic	O
to	O
buffer	O
the	O
data	O
bus	O
between	O
the	O
microprocessor	B-Architecture
and	O
the	O
internal	O
registers	O
.	O
</s>
<s>
The	O
control	O
word	O
register	O
contains	O
the	O
programmed	O
information	O
which	O
will	O
be	O
sent	O
(	O
by	O
the	O
microprocessor	B-Architecture
)	O
to	O
the	O
device	O
.	O
</s>
<s>
To	O
initialize	O
the	O
counters	O
,	O
the	O
microprocessor	B-Architecture
must	O
write	O
a	O
control	O
word	O
(	O
CW	O
)	O
in	O
this	O
register	O
.	O
</s>
<s>
One	O
difference	O
between	O
the	O
8253	B-Device
and	O
8254	B-Device
is	O
that	O
the	O
former	O
had	O
one	O
internal	O
bit	O
which	O
affected	O
both	O
reads	O
and	O
writes	O
,	O
so	O
if	O
the	O
format	O
was	O
set	O
to	O
2-byte	O
,	O
a	O
read	O
of	O
the	O
lsbyte	O
would	O
cause	O
a	O
following	O
write	O
to	O
be	O
directed	O
to	O
the	O
msbyte	O
.	O
</s>
<s>
The	O
8254	B-Device
used	O
separate	O
bits	O
for	O
reads	O
and	O
writes	O
.	O
</s>
<s>
(	O
BCD	O
counting	O
almost	O
never	O
used	O
and	O
may	O
not	O
be	O
implemented	O
properly	O
in	O
emulators	O
or	O
southbridges	B-Device
.	O
)	O
</s>
<s>
Latch	B-General_Concept
the	O
count	O
for	O
a	O
given	O
timer	O
.	O
</s>
<s>
The	O
next	O
read	O
will	O
,	O
rather	O
than	O
returning	O
the	O
counter	O
value	O
at	O
the	O
moment	O
of	O
the	O
read	O
,	O
return	O
the	O
counter	O
value	O
at	O
the	O
moment	O
of	O
the	O
latch	B-General_Concept
command	O
.	O
</s>
<s>
When	O
the	O
latch	B-General_Concept
command	O
is	O
used	O
,	O
the	O
mode	O
and	O
BCD	O
status	O
are	O
not	O
changed	O
.	O
</s>
<s>
(	O
8254	B-Device
only	O
)	O
Latch	B-General_Concept
the	O
status	O
and/or	O
count	O
for	O
multiple	O
timers	O
.	O
</s>
<s>
This	O
allows	O
multiple	O
simultaneous	O
latch	B-General_Concept
commands	O
using	O
a	O
bitmap	O
.	O
</s>
<s>
+	O
8253/8254	O
control	O
word	O
Bit	O
#	O
/Name	O
Short	O
Description	O
D7SC1	O
D6SC2	O
D5RW1	O
D4RW0	O
D3M2	O
D2M1	O
D1M0	O
D0BCD	O
0	O
0	O
format	O
mode	O
BCD	O
Set	O
mode	O
of	O
Counter	O
0	O
0	O
1	O
format	O
mode	O
BCD	O
Set	O
mode	O
of	O
Counter	O
1	O
1	O
0	O
format	O
mode	O
BCD	O
Set	O
mode	O
of	O
Counter	O
2	O
(	O
at	O
port	O
42h	O
)	O
1	O
1	O
C2	O
C1	O
C0	O
x	O
Read-back	O
command	O
(	O
8254	B-Device
only	O
)	O
counter	O
0	O
0	O
—	O
x	O
—	O
Latch	B-General_Concept
counter	O
value	O
.	O
</s>
<s>
When	O
setting	O
the	O
PIT	O
,	O
the	O
microprocessor	B-Architecture
first	O
sends	O
a	O
control	O
message	O
,	O
then	O
a	O
count	O
message	O
to	O
the	O
PIT	O
.	O
</s>
<s>
In	O
this	O
mode	O
8253	B-Device
can	O
be	O
used	O
as	O
a	O
monostable	O
multivibrator	O
.	O
</s>
<s>
The	O
8253	B-Device
was	O
used	O
in	O
IBM	O
PC	O
compatibles	O
since	O
their	O
introduction	O
in	O
1981	O
.	O
</s>
<s>
In	O
modern	O
times	O
,	O
this	O
PIT	O
is	O
not	O
included	O
as	O
a	O
separate	O
chip	O
in	O
an	O
x86	B-Operating_System
PC	O
.	O
</s>
<s>
Rather	O
,	O
its	O
functionality	O
is	O
included	O
as	O
part	O
of	O
the	O
motherboard	O
chipset	O
's	O
southbridge	B-Device
.	O
</s>
<s>
In	O
a	O
modern	O
chipset	O
,	O
this	O
change	O
may	O
show	O
up	O
in	O
the	O
form	O
of	O
noticeably	O
faster	O
access	O
to	O
the	O
PIT	O
's	O
registers	O
in	O
the	O
x86	B-Operating_System
I/O	B-Architecture
address	I-Architecture
space	O
.	O
</s>
<s>
This	O
is	O
a	O
holdover	O
of	O
the	O
very	O
first	O
CGA	B-Device
PCs	O
–	O
they	O
derived	O
all	O
necessary	O
frequencies	O
from	O
a	O
single	O
quartz	O
crystal	O
,	O
and	O
to	O
make	O
TV	O
output	O
possible	O
,	O
this	O
oscillator	O
had	O
to	O
run	O
at	O
a	O
multiple	O
of	O
the	O
NTSC	O
color	O
subcarrier	O
frequency	O
.	O
</s>
<s>
This	O
frequency	O
,	O
divided	O
by	O
216	O
(	O
the	O
largest	O
divisor	O
the	O
8253	B-Device
is	O
capable	O
of	O
)	O
produces	O
the	O
≈	O
18.2Hz	O
timer	O
interrupt	O
used	O
in	O
MS-DOS	B-Application
and	O
related	O
operating	O
systems	O
.	O
</s>
<s>
Counter	O
2	O
is	O
used	O
to	O
generate	O
tones	O
via	O
the	O
PC	B-Device
speaker	I-Device
.	O
</s>
<s>
Newer	O
motherboards	O
include	O
additional	O
counters	O
through	O
the	O
Advanced	B-Device
Configuration	I-Device
and	I-Device
Power	I-Device
Interface	I-Device
(	O
ACPI	B-Device
)	O
,	O
a	O
counter	O
on	O
the	O
Local	B-Device
Advanced	I-Device
Programmable	I-Device
Interrupt	I-Device
Controller	I-Device
,	O
and	O
a	O
High	O
Precision	O
Event	O
Timer	O
.	O
</s>
<s>
The	O
CPU	B-Device
itself	O
also	O
provides	O
the	O
Time	B-Device
Stamp	I-Device
Counter	I-Device
facility	O
.	O
</s>
<s>
On	O
x86	B-Operating_System
PCs	O
,	O
many	O
video	O
card	O
BIOS	O
and	O
system	O
BIOS	O
will	O
reprogram	O
the	O
second	O
counter	O
for	O
their	O
own	O
use	O
.	O
</s>
<s>
This	O
prevents	O
any	O
serious	O
alternative	O
uses	O
of	O
the	O
timer	O
's	O
second	O
counter	O
on	O
many	O
x86	B-Operating_System
systems	O
.	O
</s>
<s>
Typically	O
,	O
the	O
initial	O
value	O
of	O
the	O
counter	O
is	O
set	O
by	O
sending	O
bytes	O
to	O
the	O
Control	O
,	O
then	O
Data	O
I/O	B-Architecture
Port	I-Architecture
registers	O
(	O
the	O
value	O
36h	O
sent	O
to	O
port	O
43h	O
,	O
then	O
the	O
low	O
byte	O
to	O
port	O
40h	O
,	O
and	O
port	O
40h	O
again	O
for	O
the	O
high	O
byte	O
)	O
.	O
</s>
<s>
The	O
counter	O
counts	O
down	O
to	O
zero	O
,	O
then	O
sends	O
a	O
hardware	O
interrupt	O
(	O
IRQ	B-General_Concept
0	O
,	O
INT	O
8	O
)	O
to	O
the	O
CPU	B-Device
.	O
</s>
<s>
The	O
slowest	O
possible	O
frequency	O
,	O
which	O
is	O
also	O
the	O
one	O
normally	O
used	O
by	O
computers	O
running	O
MS-DOS	B-Application
or	O
compatible	O
operating	O
systems	O
,	O
is	O
about	O
18.2Hz	O
.	O
</s>
<s>
Under	O
these	O
real	B-Application
mode	I-Application
operating	O
systems	O
,	O
the	O
BIOS	O
accumulates	O
the	O
number	O
of	O
INT	O
8	O
calls	O
that	O
it	O
receives	O
in	O
real	B-Application
mode	I-Application
address	O
0040:006c	O
,	O
which	O
can	O
be	O
read	O
by	O
a	O
program	O
.	O
</s>
<s>
As	O
a	O
timer	O
counts	O
down	O
,	O
its	O
value	O
can	O
also	O
be	O
read	O
directly	O
by	O
reading	O
its	O
I/O	B-Architecture
port	I-Architecture
twice	O
,	O
first	O
for	O
the	O
low	O
byte	O
,	O
and	O
then	O
for	O
the	O
high	O
byte	O
.	O
</s>
<s>
However	O
,	O
in	O
free-running	O
counter	O
applications	O
such	O
as	O
in	O
the	O
x86	B-Operating_System
PC	O
,	O
it	O
is	O
necessary	O
to	O
first	O
write	O
a	O
latch	B-General_Concept
command	O
for	O
the	O
desired	O
channel	O
to	O
the	O
control	O
register	O
,	O
so	O
that	O
both	O
bytes	O
read	O
will	O
belong	O
to	O
one	O
and	O
the	O
same	O
value	O
.	O
</s>
<s>
According	O
to	O
a	O
2002	O
Microsoft	O
document	O
,	O
"	O
because	O
reads	O
from	O
and	O
writes	O
to	O
this	O
hardware	O
 [ 8254 ] 	O
require	O
communication	O
through	O
an	O
IO	B-Architecture
port	I-Architecture
,	O
programming	O
it	O
takes	O
several	O
cycles	O
,	O
which	O
is	O
prohibitively	O
expensive	O
for	O
the	O
OS	O
.	O
</s>
