<s>
The	O
Intel	O
8231	O
and	O
8232	O
were	O
early	O
designs	O
of	O
floating-point	B-General_Concept
maths	I-General_Concept
coprocessors	I-General_Concept
(	O
FPUs	O
)	O
,	O
marketed	O
for	O
use	O
with	O
their	O
i8080	B-General_Concept
line	O
of	O
primary	O
CPUs	B-General_Concept
.	O
</s>
<s>
Whilst	O
the	O
i8231/i8232	O
(	O
and	O
their	O
AMD-branded	O
cousins	O
)	O
were	O
primarily	O
intended	O
to	O
partner	O
the	O
i8080	B-General_Concept
(	O
or	O
the	O
AMD	O
clone	O
Am9080	O
)	O
,	O
the	O
multiple	O
interface	O
options	O
in	O
their	O
design	O
,	O
from	O
simple	O
wait	B-Device
state	I-Device
insertion	O
and	O
status	B-General_Concept
polling	I-General_Concept
routines	O
to	O
interrupt	B-Application
and	O
DMA	B-General_Concept
controller	I-General_Concept
driven	O
methods	O
suitable	O
for	O
a	O
peripheral	O
processor	O
or	O
add-in	O
board	O
,	O
meant	O
that	O
–	O
with	O
a	O
small	O
amount	O
of	O
glue	O
logic	O
–	O
it	O
was	O
usable	O
in	O
almost	O
any	O
microprocessor	O
system	O
that	O
had	O
a	O
DMA	O
subsystem	O
or	O
a	O
spare	O
interrupt	B-Application
input/interrupt	O
vector	O
available	O
,	O
and	O
AMD	O
's	O
original	O
documentation	O
provided	O
several	O
different	O
examples	O
.	O
</s>
<s>
This	O
was	O
a	O
valuable	O
feature	O
for	O
one	O
of	O
the	O
first	O
commercially	O
available	O
single-chip	O
FPUs	O
,	O
greatly	O
broadening	O
its	O
potential	O
market	O
,	O
and	O
was	O
in	O
stark	O
contrast	O
to	O
Intel	O
's	O
succeeding	O
,	O
in-house	O
designed	O
8087	B-Device
(	O
and	O
other	O
x87	B-Application
family	O
)	O
FPUs	O
which	O
were	O
tightly	O
bound	O
to	O
the	O
x86	B-Operating_System
CPU	O
line	O
.	O
</s>
<s>
For	O
example	O
,	O
the	O
i8231A	O
was	O
used	O
in	O
the	O
Applied	O
Analytics	O
MicroSPEED	O
II	O
and	O
II+	O
accelerator	O
cards	O
for	O
the	O
6502-based	O
Apple	B-Device
II	I-Device
line	O
,	O
but	O
examples	O
were	O
also	O
given	O
for	O
the	O
Z80	B-General_Concept
,	O
MC6800	B-Device
,	O
i8085	B-General_Concept
,	O
and	O
even	O
the	O
16-bit	O
Z8000	B-Device
.	O
</s>
<s>
Additionally	O
,	O
prior	O
to	O
the	O
introduction	O
of	O
the	O
8087	B-Device
,	O
Intel	O
's	O
own	O
preliminary	O
datasheets	O
suggested	O
the	O
chips	O
as	O
suitable	O
companions	O
for	O
the	O
then-new	O
8086	B-General_Concept
.	O
</s>
<s>
The	O
later	O
Intel	O
8232	O
is	O
the	O
Floating	B-General_Concept
Point	I-General_Concept
Processor	I-General_Concept
Unit	O
(	O
FPU	O
)	O
.	O
</s>
<s>
All	O
three	O
chips	O
used	O
an	O
8-bit	O
data	B-General_Concept
bus	I-General_Concept
design	O
,	O
in	O
line	O
with	O
the	O
i8080	B-General_Concept
and	O
most	O
other	O
contemporary	O
microprocessors	O
.	O
</s>
<s>
a	O
roughly	O
1MHz	O
Apple	B-Device
II	I-Device
system	O
to	O
be	O
expanded	O
with	O
a	O
4MHz	O
8231A	O
and	O
enjoy	O
the	O
benefit	O
of	O
much	O
faster	O
numeric	O
processing	O
than	O
it	O
may	O
otherwise	O
have	O
been	O
limited	O
to	O
,	O
or	O
a	O
5MHz	O
i8085-based	O
system	O
to	O
host	O
an	O
8231A	O
or	O
8232	O
without	O
itself	O
having	O
to	O
be	O
slowed	O
to	O
4MHz	O
or	O
less	O
to	O
maintain	O
compatibility	O
.	O
</s>
<s>
It	O
also	O
,	O
along	O
with	O
the	O
interrupt	B-Application
driven	O
peripheral	O
design	O
,	O
allowed	O
a	O
degree	O
of	O
parallel	O
processing	O
between	O
the	O
CPU	O
and	O
FPU	O
,	O
with	O
the	O
former	O
resuming	O
its	O
own	O
normal	O
processing	O
after	O
passing	O
commands	O
and	O
data	O
to	O
the	O
essentially	O
"	O
offboard	O
"	O
coprocessor	O
,	O
only	O
switching	O
back	O
to	O
the	O
floating-point	O
subtask	O
(	O
to	O
receive	O
results	O
and	O
optionally	O
issue	O
further	O
commands	O
)	O
when	O
signalled	O
by	O
the	O
copro	O
that	O
processing	O
was	O
complete	O
.	O
</s>
<s>
Whilst	O
these	O
numbers	O
may	O
seem	O
low	O
from	O
a	O
modern	O
perspective	O
,	O
they	O
compare	O
reasonably	O
well	O
with	O
the	O
successor	O
i8087	B-Device
(	O
whose	O
bigger	O
advantages	O
were	O
a	O
wider	O
databus	O
and	O
address	O
range	O
–	O
allowing	O
faster	O
transfers	O
in	O
and	O
out	O
of	O
a	O
larger	O
memory	O
space	O
,	O
greater	O
numeric	O
precision	O
,	O
expanded	O
instruction/function	O
set	O
and	O
near-IEEE-754	O
compliance	O
)	O
,	O
and	O
were	O
radically	O
faster	O
compared	O
to	O
performing	O
the	O
same	O
calculations	O
using	O
software	O
emulation	O
on	O
a	O
regular	O
CPU	O
–	O
even	O
a	O
relatively	O
sophisticated	O
,	O
16-bit	O
8086	B-General_Concept
running	O
at	O
a	O
full	O
8MHz	O
could	O
only	O
achieve	O
somewhere	O
between	O
a	O
few	O
dozen	O
,	O
to	O
no	O
more	O
than	O
around	O
1000FLOPS	O
without	O
a	O
coprocessor	O
,	O
and	O
its	O
slower	O
clocked	O
,	O
8-bit	O
predecessors	O
and	O
rivals	O
would	O
have	O
fared	O
even	O
worse	O
.	O
</s>
