<s>
The	O
Intel	B-Device
8088	I-Device
(	O
"	O
eighty-eighty-eight	O
"	O
,	O
also	O
called	O
iAPX	B-Device
88	I-Device
)	O
microprocessor	B-Architecture
is	O
a	O
variant	O
of	O
the	O
Intel	B-General_Concept
8086	I-General_Concept
.	O
</s>
<s>
Introduced	O
on	O
June	O
1	O
,	O
1979	O
,	O
the	O
8088	B-Device
has	O
an	O
eight-bit	O
external	B-General_Concept
data	I-General_Concept
bus	I-General_Concept
instead	O
of	O
the	O
16-bit	B-Device
bus	O
of	O
the	O
8086	B-General_Concept
.	O
</s>
<s>
The	O
16-bit	B-Device
registers	O
and	O
the	O
one	O
megabyte	O
address	O
range	O
are	O
unchanged	O
,	O
however	O
.	O
</s>
<s>
In	O
fact	O
,	O
according	O
to	O
the	O
Intel	O
documentation	O
,	O
the	O
8086	B-General_Concept
and	O
8088	B-Device
have	O
the	O
same	O
execution	B-General_Concept
unit	I-General_Concept
(	O
EU	O
)	O
only	O
the	O
bus	B-General_Concept
interface	I-General_Concept
unit	I-General_Concept
(	O
BIU	O
)	O
is	O
different	O
.	O
</s>
<s>
The	O
original	O
IBM	B-Device
PC	I-Device
is	O
based	O
on	O
the	O
8088	B-Device
,	O
as	O
are	O
its	O
clones	O
.	O
</s>
<s>
The	O
8088	B-Device
was	O
designed	O
at	O
Intel	O
's	O
laboratory	O
in	O
Haifa	B-Algorithm
,	O
Israel	O
,	O
as	O
were	O
a	O
large	O
number	O
of	O
Intel	O
's	O
processors	O
.	O
</s>
<s>
The	O
8088	B-Device
was	O
targeted	O
at	O
economical	O
systems	O
by	O
allowing	O
the	O
use	O
of	O
an	O
eight-bit	O
data	O
path	O
and	O
eight-bit	O
support	O
and	O
peripheral	O
chips	O
;	O
complex	O
circuit	O
boards	O
were	O
still	O
fairly	O
cumbersome	O
and	O
expensive	O
when	O
it	O
was	O
released	O
.	O
</s>
<s>
The	O
prefetch	B-General_Concept
queue	I-General_Concept
of	O
the	O
8088	B-Device
was	O
shortened	O
to	O
four	O
bytes	O
,	O
from	O
the	O
8086	B-General_Concept
's	O
six	O
bytes	O
,	O
and	O
the	O
prefetch	B-General_Concept
algorithm	O
was	O
slightly	O
modified	O
to	O
adapt	O
to	O
the	O
narrower	O
bus	O
.	O
</s>
<s>
These	O
modifications	O
of	O
the	O
basic	O
8086	B-General_Concept
design	O
were	O
one	O
of	O
the	O
first	O
jobs	O
assigned	O
to	O
Intel	O
's	O
new	O
design	O
office	O
and	O
laboratory	O
in	O
Haifa	B-Algorithm
.	O
</s>
<s>
Variants	O
of	O
the	O
8088	B-Device
with	O
more	O
than	O
5MHz	O
maximal	O
clock	O
frequency	O
include	O
the	O
8088	B-Device
–	O
2	O
,	O
which	O
was	O
fabricated	B-Architecture
using	O
Intel	O
's	O
new	O
enhanced	O
nMOS	B-Algorithm
process	O
called	O
HMOS	O
and	O
specified	O
for	O
a	O
maximal	O
frequency	O
of	O
8MHz	O
.	O
</s>
<s>
Later	O
followed	O
the	O
80C88	B-Device
,	O
a	O
fully	B-General_Concept
static	I-General_Concept
CHMOS	O
design	O
,	O
which	O
could	O
operate	O
with	O
clock	O
speeds	O
from	O
0	O
to	O
8MHz	O
.	O
</s>
<s>
For	O
instance	O
,	O
the	O
NEC	B-Device
V20	I-Device
was	O
a	O
pin-compatible	O
and	O
slightly	O
faster	O
(	O
at	O
the	O
same	O
clock	O
frequency	O
)	O
variant	O
of	O
the	O
8088	B-Device
,	O
designed	O
and	O
manufactured	O
by	O
NEC	O
.	O
</s>
<s>
Successive	O
NEC	O
8088	B-Device
compatible	B-Device
processors	O
would	O
run	O
at	O
up	O
to	O
16MHz	O
.	O
</s>
<s>
In	O
1984	O
,	O
Commodore	O
International	O
signed	O
a	O
deal	O
to	O
manufacture	O
the	O
8088	B-Device
for	O
use	O
in	O
a	O
licensed	O
Dynalogic	B-Device
Hyperion	I-Device
clone	O
,	O
in	O
a	O
move	O
that	O
was	O
regarded	O
as	O
signaling	O
a	O
major	O
new	O
direction	O
for	O
the	O
company	O
.	O
</s>
<s>
When	O
announced	O
,	O
the	O
list	O
price	O
of	O
the	O
8088	B-Device
was	O
US	O
$124.80	O
.	O
</s>
<s>
Intel	O
second	O
sourced	O
this	O
microprocessor	B-Architecture
to	O
Fujitsu	O
Limited	O
.	O
</s>
<s>
The	O
8088	B-Device
is	O
architecturally	O
very	O
similar	O
to	O
the	O
8086	B-General_Concept
.	O
</s>
<s>
The	O
main	O
difference	O
is	O
that	O
there	O
are	O
only	O
eight	O
data	O
lines	O
instead	O
of	O
the	O
8086	B-General_Concept
's	O
16	O
lines	O
.	O
</s>
<s>
All	O
of	O
the	O
other	O
pins	O
of	O
the	O
device	O
perform	O
the	O
same	O
function	O
as	O
they	O
do	O
with	O
the	O
8086	B-General_Concept
with	O
two	O
exceptions	O
.	O
</s>
<s>
First	O
,	O
pin	O
34	O
is	O
no	O
longer	O
(	O
this	O
is	O
the	O
high-order	O
byte	O
select	O
on	O
the	O
8086	B-General_Concept
—	O
the	O
8088	B-Device
does	O
not	O
have	O
a	O
high-order	O
byte	O
on	O
its	O
eight-bit	O
data	B-General_Concept
bus	I-General_Concept
)	O
.	O
</s>
<s>
The	O
pin	O
on	O
the	O
8088	B-Device
is	O
IO/	O
.	O
</s>
<s>
On	O
the	O
8086	B-General_Concept
part	O
it	O
is	O
/M	O
.	O
</s>
<s>
The	O
reason	O
for	O
the	O
reversal	O
is	O
that	O
it	O
makes	O
the	O
8088	B-Device
compatible	B-Device
with	O
the	O
8085	B-General_Concept
.	O
</s>
<s>
Depending	O
on	O
the	O
clock	O
frequency	O
,	O
the	O
number	O
of	O
memory	O
wait	B-Device
states	I-Device
,	O
as	O
well	O
as	O
on	O
the	O
characteristics	O
of	O
the	O
particular	O
application	O
program	O
,	O
the	O
average	O
performance	O
for	O
the	O
Intel	B-Device
8088	I-Device
ranged	O
approximately	O
from	O
0.33	O
to	O
1million	O
instructions	O
per	O
second	O
.	O
</s>
<s>
Meanwhile	O
,	O
the	O
mov	O
reg	O
,	O
reg	O
and	O
ALU	B-General_Concept
reg	O
,	O
reg	O
instructions	O
,	O
taking	O
two	O
and	O
three	O
cycles	O
respectively	O
,	O
yielded	O
an	O
absolute	O
peak	O
performance	O
of	O
between	O
and	O
MIPS	O
per	O
MHz	O
,	O
that	O
is	O
,	O
somewhere	O
in	O
the	O
range	O
3	O
–	O
5MIPS	O
at	O
10MHz	O
.	O
</s>
<s>
The	O
speed	O
of	O
the	O
execution	B-General_Concept
unit	I-General_Concept
(	O
EU	O
)	O
and	O
the	O
bus	O
of	O
the	O
8086	B-General_Concept
CPU	O
was	O
well	O
balanced	O
;	O
with	O
a	O
typical	O
instruction	O
mix	O
,	O
an	O
8086	B-General_Concept
could	O
execute	O
instructions	O
out	O
of	O
the	O
prefetch	B-General_Concept
queue	I-General_Concept
a	O
good	O
bit	O
of	O
the	O
time	O
.	O
</s>
<s>
Cutting	O
down	O
the	O
bus	O
to	O
eight	O
bits	O
made	O
it	O
a	O
serious	O
bottleneck	O
in	O
the	O
8088	B-Device
.	O
</s>
<s>
With	O
the	O
speed	O
of	O
instruction	O
fetch	O
reduced	O
by	O
50%	O
in	O
the	O
8088	B-Device
as	O
compared	O
to	O
the	O
8086	B-General_Concept
,	O
a	O
sequence	O
of	O
fast	O
instructions	O
can	O
quickly	O
drain	O
the	O
four-byte	O
prefetch	B-General_Concept
queue	I-General_Concept
.	O
</s>
<s>
Both	O
the	O
8086	B-General_Concept
and	O
8088	B-Device
take	O
four	O
clock	O
cycles	O
to	O
complete	O
a	O
bus	O
cycle	O
;	O
whereas	O
for	O
the	O
8086	B-General_Concept
this	O
means	O
four	O
clocks	O
to	O
transfer	O
two	O
bytes	O
,	O
on	O
the	O
8088	B-Device
it	O
is	O
four	O
clocks	O
per	O
byte	O
.	O
</s>
<s>
Therefore	O
,	O
for	O
example	O
,	O
a	O
two-byte	O
shift	O
or	O
rotate	O
instruction	O
,	O
which	O
takes	O
the	O
EU	O
only	O
two	O
clock	O
cycles	O
to	O
execute	O
,	O
actually	O
takes	O
eight	O
clock	O
cycles	O
to	O
complete	O
if	O
it	O
is	O
not	O
in	O
the	O
prefetch	B-General_Concept
queue	I-General_Concept
.	O
</s>
<s>
in	O
general	O
,	O
because	O
so	O
many	O
basic	O
instructions	O
execute	O
in	O
fewer	O
than	O
four	O
clocks	O
per	O
instruction	O
byteincluding	O
almost	O
all	O
the	O
ALU	B-General_Concept
and	O
data-movement	O
instructions	O
on	O
register	O
operands	O
and	O
some	O
of	O
these	O
on	O
memory	O
operandsit	O
is	O
practically	O
impossible	O
to	O
avoid	O
idling	O
the	O
EU	O
in	O
the	O
8088	B-Device
at	O
least	O
of	O
the	O
time	O
while	O
executing	O
useful	O
real-world	O
programs	O
,	O
and	O
it	O
is	O
not	O
hard	O
to	O
idle	O
it	O
half	O
the	O
time	O
.	O
</s>
<s>
In	O
short	O
,	O
an	O
8088	B-Device
typically	O
runs	O
about	O
half	O
as	O
fast	O
as	O
8086	B-General_Concept
clocked	O
at	O
the	O
same	O
rate	O
,	O
because	O
of	O
the	O
bus	O
bottleneck	O
(	O
the	O
only	O
major	O
difference	O
)	O
.	O
</s>
<s>
A	O
side	O
effect	O
of	O
the	O
8088	B-Device
design	O
,	O
with	O
the	O
slow	O
bus	O
and	O
the	O
small	O
prefetch	B-General_Concept
queue	I-General_Concept
,	O
is	O
that	O
the	O
speed	O
of	O
code	O
execution	O
can	O
be	O
very	O
dependent	O
on	O
instruction	O
order	O
.	O
</s>
<s>
When	O
programming	O
the	O
8088	B-Device
,	O
for	O
CPU	O
efficiency	O
,	O
it	O
is	O
vital	O
to	O
interleave	O
long-running	O
instructions	O
with	O
short	O
ones	O
whenever	O
possible	O
.	O
</s>
<s>
For	O
example	O
,	O
a	O
repeated	O
string	O
operation	O
or	O
a	O
shift	O
by	O
three	O
or	O
more	O
will	O
take	O
long	O
enough	O
to	O
allow	O
time	O
for	O
the	O
4-byte	O
prefetch	B-General_Concept
queue	I-General_Concept
to	O
completely	O
fill	O
.	O
</s>
<s>
The	O
8088	B-Device
is	O
also	O
(	O
like	O
the	O
8086	B-General_Concept
)	O
slow	O
at	O
accessing	O
memory	O
.	O
</s>
<s>
The	O
same	O
ALU	B-General_Concept
that	O
is	O
used	O
to	O
execute	O
arithmetic	O
and	O
logic	O
instructions	O
is	O
also	O
used	O
to	O
calculate	O
effective	O
addresses	O
.	O
</s>
<s>
There	O
is	O
a	O
separate	O
adder	O
for	O
adding	O
a	O
shifted	O
segment	O
register	O
to	O
the	O
offset	O
address	O
,	O
but	O
the	O
offset	O
EA	O
itself	O
is	O
always	O
calculated	O
entirely	O
in	O
the	O
main	O
ALU	B-General_Concept
.	O
</s>
<s>
Contrast	O
this	O
with	O
the	O
two-clock	O
period	O
bus	O
cycle	O
of	O
the	O
6502	B-General_Concept
CPU	O
and	O
the	O
80286	B-General_Concept
's	O
three-clock	O
period	O
bus	O
cycle	O
with	O
pipelining	O
down	O
to	O
two	O
cycles	O
for	O
most	O
transfers	O
.	O
</s>
<s>
Most	O
8088	B-Device
instructions	O
that	O
can	O
operate	O
on	O
either	O
registers	O
or	O
memory	O
,	O
including	O
common	O
ALU	B-General_Concept
and	O
data-movement	O
operations	O
,	O
are	O
at	O
least	O
four	O
times	O
slower	O
for	O
memory	O
operands	O
than	O
for	O
only	O
register	O
operands	O
.	O
</s>
<s>
Therefore	O
,	O
efficient	O
8088	B-Device
(	O
and	O
8086	B-General_Concept
)	O
programs	O
avoid	O
repeated	O
access	O
of	O
memory	O
operands	O
when	O
possible	O
,	O
loading	O
operands	O
from	O
memory	O
into	O
registers	O
to	O
work	O
with	O
them	O
there	O
and	O
storing	O
back	O
only	O
the	O
finished	O
results	O
.	O
</s>
<s>
The	O
relatively	O
large	O
general	O
register	O
set	O
of	O
the	O
8088	B-Device
compared	O
to	O
its	O
contemporaries	O
assists	O
this	O
strategy	O
.	O
</s>
<s>
The	O
same	O
is	O
probably	O
not	O
true	O
on	O
the	O
80286	B-General_Concept
and	O
later	O
;	O
they	O
have	O
dedicated	O
address	O
ALUs	O
and	O
perform	O
memory	O
accesses	O
much	O
faster	O
than	O
the	O
8088	B-Device
and	O
8086	B-General_Concept
.	O
</s>
<s>
Finally	O
,	O
because	O
calls	O
,	O
jumps	O
,	O
and	O
interrupts	O
reset	O
the	O
prefetch	B-General_Concept
queue	I-General_Concept
,	O
and	O
because	O
loading	O
the	O
IP	O
register	O
requires	O
communication	O
between	O
the	O
EU	O
and	O
the	O
BIU	O
(	O
since	O
the	O
IP	O
register	O
is	O
in	O
the	O
BIU	O
,	O
not	O
in	O
the	O
EU	O
,	O
where	O
the	O
general	O
registers	O
are	O
)	O
,	O
these	O
operations	O
are	O
costly	O
.	O
</s>
<s>
Any	O
conditional	O
jump	O
requires	O
four	O
clock	O
cycles	O
if	O
not	O
taken	O
,	O
but	O
if	O
taken	O
,	O
it	O
requires	O
16	O
cycles	O
in	O
addition	O
to	O
resetting	O
the	O
prefetch	B-General_Concept
queue	I-General_Concept
;	O
therefore	O
,	O
conditional	O
jumps	O
should	O
be	O
arranged	O
to	O
be	O
not	O
taken	O
most	O
of	O
the	O
time	O
,	O
especially	O
inside	O
loops	O
.	O
</s>
<s>
Intel	O
datasheets	O
for	O
the	O
8086	B-General_Concept
and	O
8088	B-Device
advertised	O
the	O
dedicated	O
multiply	O
and	O
divide	O
instructions	O
(	O
MUL	O
,	O
IMUL	O
,	O
DIV	O
,	O
and	O
IDIV	O
)	O
,	O
but	O
they	O
are	O
very	O
slow	O
,	O
on	O
the	O
order	O
of	O
100	O
–	O
200	O
clock	O
cycles	O
each	O
.	O
</s>
<s>
The	O
80286	B-General_Concept
and	O
80386	B-General_Concept
each	O
greatly	O
increase	O
the	O
execution	O
speed	O
of	O
these	O
multiply	O
and	O
divide	O
instructions	O
.	O
</s>
<s>
The	O
original	O
IBM	B-Device
PC	I-Device
is	O
the	O
most	O
influential	O
microcomputer	O
to	O
use	O
the	O
8088	B-Device
.	O
</s>
<s>
Some	O
of	O
IBM	O
's	O
engineers	O
and	O
other	O
employees	O
wanted	O
to	O
use	O
the	O
IBM	B-Device
801	I-Device
processor	O
,	O
some	O
preferred	O
the	O
new	O
Motorola	B-Device
68000	I-Device
,	O
and	O
others	O
argued	O
for	O
a	O
small	O
and	O
simple	O
microprocessor	B-Architecture
,	O
such	O
as	O
the	O
MOS	B-General_Concept
Technology	I-General_Concept
6502	I-General_Concept
or	O
Zilog	B-General_Concept
Z80	I-General_Concept
,	O
which	O
are	O
in	O
earlier	O
personal	O
computers	O
.	O
</s>
<s>
However	O
,	O
IBM	O
already	O
had	O
a	O
history	O
of	O
using	O
Intel	O
chips	O
in	O
its	O
products	O
and	O
had	O
also	O
acquired	O
the	O
rights	O
to	O
manufacture	O
the	O
8086	B-General_Concept
family	O
.	O
</s>
<s>
IBM	O
chose	O
the	O
8088	B-Device
over	O
the	O
8086	B-General_Concept
because	O
Intel	O
offered	O
a	O
better	O
price	O
for	O
the	O
former	O
and	O
could	O
supply	O
more	O
units	O
.	O
</s>
<s>
Another	O
factor	O
was	O
that	O
the	O
8088	B-Device
allowed	O
the	O
computer	O
to	O
be	O
based	O
on	O
a	O
modified	O
8085	B-General_Concept
design	O
,	O
as	O
it	O
could	O
easily	O
interface	O
with	O
most	O
nMOS	B-Algorithm
chips	O
with	O
8-bit	O
databuses	O
.	O
</s>
<s>
This	O
included	O
ICs	O
originally	O
intended	O
for	O
support	O
and	O
peripheral	O
functions	O
around	O
the	O
8085	B-General_Concept
and	O
similar	O
processors	O
(	O
not	O
exclusively	O
Intel	O
's	O
)	O
,	O
which	O
were	O
already	O
well	O
known	O
by	O
many	O
engineers	O
,	O
further	O
reducing	O
cost	O
.	O
</s>
<s>
The	O
descendants	O
of	O
the	O
8088	B-Device
include	O
the	O
80188	B-Device
,	O
80186	B-Device
,	O
80286	B-General_Concept
,	O
80386	B-General_Concept
,	O
80486	B-General_Concept
,	O
and	O
later	O
software-compatible	O
processors	O
,	O
including	O
the	O
Intel	B-Device
Core	I-Device
processors	O
,	O
which	O
are	O
popular	O
today	O
.	O
</s>
