<s>
The	O
Intel	B-Device
8087	I-Device
,	O
announced	O
in	O
1980	O
,	O
was	O
the	O
first	O
x87	B-Application
floating-point	B-Algorithm
coprocessor	B-General_Concept
for	O
the	O
8086	B-General_Concept
line	O
of	O
microprocessors	O
.	O
</s>
<s>
The	O
purpose	O
of	O
the	O
8087	B-Device
was	O
to	O
speed	O
up	O
computations	O
for	O
floating-point	B-Algorithm
arithmetic	I-Algorithm
,	O
such	O
as	O
addition	O
,	O
subtraction	O
,	O
multiplication	O
,	O
division	O
,	O
and	O
square	O
root	O
.	O
</s>
<s>
It	O
also	O
computed	O
transcendental	O
functions	O
such	O
as	O
exponential	O
,	O
logarithmic	O
or	O
trigonometric	O
calculations	O
,	O
and	O
besides	O
floating-point	B-Algorithm
it	O
could	O
also	O
operate	O
on	O
large	O
binary	O
and	O
decimal	O
integers	O
.	O
</s>
<s>
The	O
8087	B-Device
could	O
perform	O
about	O
50,000	O
FLOPS	O
using	O
around	O
2.4	O
watts	O
.	O
</s>
<s>
Only	O
arithmetic	O
operations	O
benefited	O
from	O
installation	O
of	O
an	O
8087	B-Device
;	O
computers	O
used	O
only	O
with	O
such	O
applications	O
as	O
word	O
processing	O
,	O
for	O
example	O
,	O
would	O
not	O
benefit	O
from	O
the	O
extra	O
expense	O
(	O
around	O
$150	O
in	O
1992	O
)	O
and	O
power	O
consumption	O
of	O
an	O
8087	B-Device
.	O
</s>
<s>
The	O
8087	B-Device
was	O
an	O
advanced	O
IC	O
for	O
its	O
time	O
,	O
pushing	O
the	O
limits	O
of	O
manufacturing	O
technology	O
of	O
the	O
period	O
.	O
</s>
<s>
The	O
sales	O
of	O
the	O
8087	B-Device
received	O
a	O
significant	O
boost	O
when	O
IBM	O
included	O
a	O
coprocessor	B-General_Concept
socket	O
on	O
the	O
IBM	B-Device
PC	I-Device
motherboard	O
.	O
</s>
<s>
Due	O
to	O
a	O
shortage	O
of	O
chips	O
,	O
IBM	O
did	O
not	O
actually	O
offer	O
the	O
8087	B-Device
as	O
an	O
option	O
for	O
the	O
PC	O
until	O
it	O
had	O
been	O
on	O
the	O
market	O
for	O
six	O
months	O
.	O
</s>
<s>
Development	O
of	O
the	O
8087	B-Device
led	O
to	O
the	O
IEEE	O
754-1985	O
standard	O
for	O
floating-point	B-Algorithm
arithmetic	I-Algorithm
.	O
</s>
<s>
There	O
were	O
later	O
x87	B-Application
coprocessors	B-General_Concept
for	O
the	O
80186	B-Device
(	O
not	O
used	O
in	O
PC-compatibles	O
)	O
,	O
80286	B-General_Concept
,	O
80386	B-General_Concept
,	O
and	O
80386SX	O
processors	O
.	O
</s>
<s>
Starting	O
with	O
the	O
80486	B-General_Concept
,	O
the	O
later	O
Intel	B-Operating_System
x86	I-Operating_System
processors	O
did	O
not	O
use	O
a	O
separate	O
floating-point	B-Algorithm
coprocessor	B-General_Concept
;	O
floating-point	B-Algorithm
functions	O
were	O
provided	O
integrated	O
with	O
the	O
processor	O
.	O
</s>
<s>
Internally	O
,	O
the	O
chip	O
lacked	O
a	O
hardware	O
multiplier	O
and	O
implemented	O
calculations	O
using	O
the	O
CORDIC	B-Algorithm
algorithm	I-Algorithm
.	O
</s>
<s>
Intel	O
had	O
previously	O
manufactured	O
the	O
8231	B-General_Concept
Arithmetic	O
processing	O
unit	O
,	O
and	O
the	O
8232	B-General_Concept
Floating	B-Algorithm
Point	I-Algorithm
Processor	O
.	O
</s>
<s>
These	O
were	O
designed	O
for	O
use	O
with	O
8080	B-General_Concept
or	O
similar	O
processors	O
and	O
used	O
an	O
8-bit	O
data	O
bus	O
.	O
</s>
<s>
They	O
were	O
interfaced	O
to	O
a	O
host	O
system	O
either	O
through	O
programmed	O
I/O	O
or	O
a	O
DMA	B-General_Concept
controller	I-General_Concept
.	O
</s>
<s>
The	O
8087	B-Device
was	O
initially	O
conceived	O
by	O
Bill	O
Pohlman	O
,	O
the	O
engineering	O
manager	O
at	O
Intel	O
who	O
oversaw	O
the	O
development	O
of	O
the	O
8086	B-General_Concept
chip	O
.	O
</s>
<s>
Bill	O
took	O
steps	O
to	O
be	O
sure	O
that	O
the	O
8086	B-General_Concept
chip	O
could	O
support	O
a	O
yet-to-be-developed	O
math	O
chip	O
.	O
</s>
<s>
In	O
1977	O
Pohlman	O
got	O
the	O
go	O
ahead	O
to	O
design	O
the	O
8087	B-Device
math	O
chip	O
.	O
</s>
<s>
The	O
two	O
came	O
up	O
with	O
a	O
revolutionary	O
design	O
with	O
64	O
bits	O
of	O
mantissa	O
and	O
16	O
bits	O
of	O
exponent	O
for	O
the	O
longest-format	O
real	O
number	O
,	O
with	O
a	O
stack	B-Application
architecture	O
CPU	O
and	O
eight	O
80-bit	O
stack	B-Application
registers	O
,	O
with	O
a	O
computationally	O
rich	O
instruction	O
set	O
.	O
</s>
<s>
Palmer	O
credited	O
William	O
Kahan	O
's	O
writings	O
on	O
floating	B-Algorithm
point	I-Algorithm
as	O
a	O
significant	O
influence	O
on	O
their	O
design	O
.	O
</s>
<s>
The	O
8087	B-Device
design	O
initially	O
met	O
a	O
cool	O
reception	O
in	O
Santa	O
Clara	O
due	O
to	O
its	O
aggressive	O
design	O
.	O
</s>
<s>
Robert	O
Koehler	O
and	O
John	O
Bayliss	O
were	O
also	O
awarded	O
a	O
patent	O
for	O
the	O
technique	O
where	O
some	O
instructions	O
with	O
a	O
particular	O
bit	O
pattern	O
were	O
offloaded	O
to	O
the	O
coprocessor	B-General_Concept
.	O
</s>
<s>
The	O
8087	B-Device
had	O
45,000	O
transistors	O
and	O
was	O
manufactured	O
as	O
a	O
3μm	O
depletion-load	O
HMOS	O
circuit	O
.	O
</s>
<s>
It	O
worked	O
in	O
tandem	O
with	O
the	O
8086	B-General_Concept
or	O
8088	O
and	O
introduced	O
about	O
60	O
new	O
instructions	O
.	O
</s>
<s>
Most	O
8087	B-Device
assembly	O
mnemonics	O
begin	O
with	O
F	O
,	O
such	O
as	O
FADD	O
,	O
FMUL	O
,	O
FCOM	O
and	O
so	O
on	O
,	O
making	O
them	O
easily	O
distinguishable	O
from	O
8086	B-General_Concept
instructions	O
.	O
</s>
<s>
The	O
binary	O
encodings	O
for	O
all	O
8087	B-Device
instructions	O
begin	O
with	O
the	O
bit	O
pattern	O
11011	O
,	O
decimal	O
27	O
,	O
the	O
same	O
as	O
the	O
ASCII	B-Protocol
character	I-Protocol
ESC	O
,	O
although	O
in	O
the	O
higher-order	O
bits	O
of	O
a	O
byte	O
;	O
similar	O
instruction	O
prefixes	O
are	O
also	O
sometimes	O
referred	O
to	O
as	O
"	O
escape	O
codes	O
"	O
.	O
</s>
<s>
The	O
instruction	O
mnemonic	O
assigned	O
by	O
Intel	O
for	O
these	O
coprocessor	B-General_Concept
instructions	O
is	O
"	O
ESC	O
"	O
.	O
</s>
<s>
When	O
the	O
8086	B-General_Concept
or	O
8088	O
CPU	O
executed	O
the	O
ESC	O
instruction	O
,	O
if	O
the	O
second	O
byte	O
(	O
the	O
ModR/M	O
byte	O
)	O
specified	O
a	O
memory	O
operand	O
,	O
the	O
CPU	O
would	O
execute	O
a	O
bus	O
cycle	O
to	O
read	O
one	O
word	O
from	O
the	O
memory	O
location	O
specified	O
in	O
the	O
instruction	O
(	O
using	O
any	O
8086	B-General_Concept
addressing	O
mode	O
)	O
,	O
but	O
it	O
would	O
not	O
store	O
the	O
read	O
operand	O
into	O
any	O
CPU	B-General_Concept
register	I-General_Concept
or	O
perform	O
any	O
operation	O
on	O
it	O
;	O
the	O
8087	B-Device
would	O
observe	O
the	O
bus	O
and	O
decode	O
the	O
instruction	O
stream	O
in	O
sync	O
with	O
the	O
8086	B-General_Concept
,	O
recognizing	O
the	O
coprocessor	B-General_Concept
instructions	O
meant	O
for	O
itself	O
.	O
</s>
<s>
For	O
an	O
8087	B-Device
instruction	O
with	O
a	O
memory	O
operand	O
,	O
if	O
the	O
instruction	O
called	O
for	O
the	O
operand	O
to	O
be	O
read	O
,	O
the	O
8087	B-Device
would	O
take	O
the	O
word	O
of	O
data	O
read	O
by	O
the	O
main	O
CPU	O
from	O
the	O
data	O
bus	O
.	O
</s>
<s>
If	O
the	O
operand	O
to	O
be	O
read	O
was	O
longer	O
than	O
one	O
word	O
,	O
the	O
8087	B-Device
would	O
also	O
copy	O
the	O
address	O
from	O
the	O
address	O
bus	O
;	O
then	O
,	O
after	O
completion	O
of	O
the	O
data	O
read	O
cycle	O
driven	O
by	O
the	O
CPU	O
,	O
the	O
8087	B-Device
would	O
immediately	O
use	O
DMA	B-General_Concept
to	O
take	O
control	O
of	O
the	O
bus	O
and	O
transfer	O
the	O
additional	O
bytes	O
of	O
the	O
operand	O
itself	O
.	O
</s>
<s>
If	O
an	O
8087	B-Device
instruction	O
with	O
a	O
memory	O
operand	O
called	O
for	O
that	O
operand	O
to	O
be	O
written	O
,	O
the	O
8087	B-Device
would	O
ignore	O
the	O
read	O
word	O
on	O
the	O
data	O
bus	O
and	O
just	O
copy	O
the	O
address	O
,	O
then	O
request	O
DMA	B-General_Concept
and	O
write	O
the	O
entire	O
operand	O
,	O
in	O
the	O
same	O
way	O
that	O
it	O
would	O
read	O
the	O
end	O
of	O
an	O
extended	O
operand	O
.	O
</s>
<s>
In	O
this	O
way	O
,	O
the	O
main	O
CPU	O
maintained	O
general	O
control	O
of	O
the	O
bus	O
and	O
bus	O
timing	O
,	O
while	O
the	O
8087	B-Device
handled	O
all	O
other	O
aspects	O
of	O
execution	O
of	O
coprocessor	B-General_Concept
instructions	O
,	O
except	O
for	O
brief	O
DMA	B-General_Concept
periods	O
when	O
the	O
8087	B-Device
would	O
take	O
over	O
the	O
bus	O
to	O
read	O
or	O
write	O
operands	O
to/from	O
its	O
own	O
internal	O
registers	O
.	O
</s>
<s>
As	O
a	O
consequence	O
of	O
this	O
design	O
,	O
the	O
8087	B-Device
could	O
only	O
operate	O
on	O
operands	O
taken	O
either	O
from	O
memory	O
or	O
from	O
its	O
own	O
registers	O
,	O
and	O
any	O
exchange	O
of	O
data	O
between	O
the	O
8087	B-Device
and	O
the	O
8086	B-General_Concept
or	O
8088	O
was	O
only	O
through	O
RAM	O
.	O
</s>
<s>
The	O
main	O
CPU	O
program	O
continued	O
to	O
execute	O
while	O
the	O
8087	B-Device
executed	O
an	O
instruction	O
;	O
from	O
the	O
perspective	O
of	O
the	O
main	O
8086	B-General_Concept
or	O
8088	O
CPU	O
,	O
a	O
coprocessor	B-General_Concept
instruction	O
took	O
only	O
as	O
long	O
as	O
the	O
processing	O
of	O
the	O
opcode	O
and	O
any	O
memory	O
operand	O
cycle	O
(	O
2	O
clock	O
cycles	O
for	O
no	O
operand	O
,	O
8	O
clock	O
cycles	O
plus	O
the	O
EA	O
calculation	O
time	O
[	O
5	O
to	O
12	O
clock	O
cycles ]	O
for	O
a	O
memory	O
operand	O
[	O
plus	O
4	O
more	O
clock	O
cycles	O
on	O
an	O
8088 ]	O
,	O
to	O
transfer	O
the	O
second	O
byte	O
of	O
the	O
operand	O
word	O
)	O
,	O
after	O
which	O
the	O
CPU	O
would	O
begin	O
executing	O
the	O
next	O
instruction	O
of	O
the	O
program	O
.	O
</s>
<s>
Thus	O
,	O
a	O
system	O
with	O
an	O
8087	B-Device
was	O
capable	O
of	O
true	O
parallel	O
processing	O
,	O
performing	O
one	O
operation	O
in	O
the	O
integer	O
ALU	O
of	O
the	O
main	O
CPU	O
while	O
at	O
the	O
same	O
time	O
performing	O
a	O
floating-point	B-Algorithm
operation	O
in	O
the	O
8087	B-Device
coprocessor	B-General_Concept
.	O
</s>
<s>
Since	O
the	O
8086	B-General_Concept
or	O
8088	O
exclusively	O
controlled	O
the	O
instruction	O
flow	O
and	O
timing	O
and	O
had	O
no	O
direct	O
access	O
to	O
the	O
internal	O
status	O
of	O
the	O
8087	B-Device
,	O
and	O
because	O
the	O
8087	B-Device
could	O
execute	O
only	O
one	O
instruction	O
at	O
a	O
time	O
,	O
programs	O
for	O
the	O
combined	O
8086/8087	O
or	O
8088/8087	O
system	O
had	O
to	O
ensure	O
that	O
the	O
8087	B-Device
had	O
time	O
to	O
complete	O
the	O
last	O
instruction	O
issued	O
to	O
it	O
before	O
it	O
was	O
issued	O
another	O
one	O
.	O
</s>
<s>
The	O
WAIT	O
instruction	O
(	O
of	O
the	O
main	O
CPU	O
)	O
was	O
provided	O
for	O
this	O
purpose	O
,	O
and	O
most	O
assemblers	O
implicitly	O
asserted	O
a	O
WAIT	O
instruction	O
before	O
each	O
instance	O
of	O
most	O
floating-point	B-Algorithm
coprocessor	B-General_Concept
instructions	O
.	O
</s>
<s>
(	O
It	O
is	O
not	O
necessary	O
to	O
use	O
a	O
WAIT	O
instruction	O
before	O
an	O
8087	B-Device
operation	O
if	O
the	O
program	O
uses	O
other	O
means	O
to	O
ensure	O
that	O
enough	O
time	O
elapses	O
between	O
the	O
issuance	O
of	O
timing-sensitive	O
8087	B-Device
instructions	O
so	O
that	O
the	O
8087	B-Device
can	O
never	O
receive	O
such	O
an	O
instruction	O
before	O
it	O
completes	O
the	O
previous	O
one	O
.	O
</s>
<s>
It	O
is	O
also	O
not	O
necessary	O
,	O
if	O
a	O
WAIT	O
is	O
used	O
,	O
that	O
it	O
immediately	O
precede	O
the	O
next	O
8087	B-Device
instruction	O
.	O
)	O
</s>
<s>
The	O
WAIT	O
instruction	O
waited	O
for	O
the	O
−TEST	O
input	O
pin	O
of	O
the	O
8086/8088	O
to	O
be	O
asserted	O
(	O
low	O
)	O
,	O
and	O
this	O
pin	O
was	O
connected	O
to	O
the	O
BUSY	O
pin	O
of	O
the	O
8087	B-Device
in	O
all	O
systems	O
that	O
had	O
an	O
8087	B-Device
(	O
so	O
TEST	O
was	O
asserted	O
when	O
BUSY	O
was	O
deasserted	O
)	O
.	O
</s>
<s>
Because	O
the	O
instruction	O
prefetch	O
queues	O
of	O
the	O
8086	B-General_Concept
and	O
8088	O
make	O
the	O
time	O
when	O
an	O
instruction	O
is	O
executed	O
not	O
always	O
the	O
same	O
as	O
the	O
time	O
it	O
is	O
fetched	O
,	O
a	O
coprocessor	B-General_Concept
such	O
as	O
the	O
8087	B-Device
cannot	O
determine	O
when	O
an	O
instruction	O
for	O
itself	O
is	O
the	O
next	O
instruction	O
to	O
be	O
executed	O
purely	O
by	O
watching	O
the	O
CPU	O
bus	O
.	O
</s>
<s>
The	O
8086	B-General_Concept
and	O
8088	O
have	O
two	O
queue	O
status	O
signals	O
connected	O
to	O
the	O
coprocessor	B-General_Concept
to	O
allow	O
it	O
to	O
synchronize	O
with	O
the	O
CPU	O
's	O
internal	O
timing	O
of	O
execution	O
of	O
instructions	O
from	O
its	O
prefetch	O
queue	O
.	O
</s>
<s>
The	O
8087	B-Device
maintains	O
its	O
own	O
identical	O
prefetch	O
queue	O
,	O
from	O
which	O
it	O
reads	O
the	O
coprocessor	B-General_Concept
opcodes	O
that	O
it	O
actually	O
executes	O
.	O
</s>
<s>
Because	O
the	O
8086	B-General_Concept
and	O
8088	O
prefetch	O
queues	O
have	O
different	O
sizes	O
and	O
different	O
management	O
algorithms	O
,	O
the	O
8087	B-Device
determines	O
which	O
type	O
of	O
CPU	O
it	O
is	O
attached	O
to	O
by	O
observing	O
a	O
certain	O
CPU	O
bus	O
line	O
when	O
the	O
system	O
is	O
reset	O
,	O
and	O
the	O
8087	B-Device
adjusts	O
its	O
internal	O
instruction	O
queue	O
accordingly	O
.	O
</s>
<s>
The	O
redundant	O
duplication	O
of	O
prefetch	O
queue	O
hardware	O
in	O
the	O
CPU	O
and	O
the	O
coprocessor	B-General_Concept
is	O
inefficient	O
in	O
terms	O
of	O
power	O
usage	O
and	O
total	O
die	O
area	O
,	O
but	O
it	O
allowed	O
the	O
coprocessor	B-General_Concept
interface	O
to	O
use	O
very	O
few	O
dedicated	O
IC	O
pins	O
,	O
which	O
was	O
important	O
.	O
</s>
<s>
At	O
the	O
time	O
when	O
the	O
8086	B-General_Concept
,	O
which	O
defined	O
the	O
coprocessor	B-General_Concept
interface	O
,	O
was	O
introduced	O
,	O
IC	O
packages	O
with	O
more	O
than	O
40	O
pins	O
were	O
rare	O
,	O
expensive	O
,	O
and	O
wrangled	O
with	O
problems	O
such	O
as	O
excessive	O
lead	O
capacitance	O
,	O
a	O
major	O
limiting	O
factor	O
for	O
signalling	O
speeds	O
.	O
</s>
<s>
The	O
coprocessor	B-General_Concept
operation	O
codes	O
are	O
encoded	O
in	O
6	O
bits	O
across	O
2	O
bytes	O
,	O
beginning	O
with	O
the	O
escape	O
sequence	O
:	O
</s>
<s>
The	O
first	O
three	O
"	O
x	O
"	O
bits	O
are	O
the	O
first	O
three	O
bits	O
of	O
the	O
floating-point	B-Algorithm
opcode	O
.	O
</s>
<s>
Then	O
two	O
"	O
m	O
"	O
bits	O
,	O
then	O
the	O
latter	O
half	O
three	O
bits	O
of	O
the	O
floating-point	B-Algorithm
opcode	O
,	O
followed	O
by	O
three	O
"	O
r	O
"	O
bits	O
.	O
</s>
<s>
Application	O
programs	O
had	O
to	O
be	O
written	O
to	O
make	O
use	O
of	O
the	O
special	O
floating-point	B-Algorithm
instructions	O
.	O
</s>
<s>
At	O
run	O
time	O
,	O
software	O
could	O
detect	O
the	O
coprocessor	B-General_Concept
and	O
use	O
it	O
for	O
floating-point	B-Algorithm
operations	O
.	O
</s>
<s>
When	O
detected	O
absent	O
,	O
similar	O
floating-point	B-Algorithm
functions	O
had	O
to	O
be	O
calculated	O
in	O
software	O
,	O
or	O
the	O
whole	O
coprocessor	B-General_Concept
could	O
be	O
emulated	O
in	O
software	O
for	O
more	O
precise	O
numerical	O
compatibility	O
.	O
</s>
<s>
The	O
x87	B-Application
family	O
does	O
not	O
use	O
a	O
directly	O
addressable	O
register	B-General_Concept
set	O
such	O
as	O
the	O
main	O
registers	O
of	O
the	O
x86	B-Operating_System
processors	O
;	O
instead	O
,	O
the	O
x87	B-Application
registers	O
form	O
an	O
eight-level	O
deep	O
stack	B-Application
structure	O
ranging	O
from	O
st0	O
to	O
st7	O
,	O
where	O
st0	O
is	O
the	O
top	O
.	O
</s>
<s>
The	O
x87	B-Application
instructions	O
operate	O
by	O
pushing	O
,	O
calculating	O
,	O
and	O
popping	O
values	O
on	O
this	O
stack	B-Application
.	O
</s>
<s>
However	O
,	O
dyadic	O
operations	O
such	O
as	O
FADD	O
,	O
FMUL	O
,	O
FCMP	O
,	O
and	O
so	O
on	O
may	O
either	O
implicitly	O
use	O
the	O
topmost	O
st0	O
and	O
st1	O
or	O
may	O
use	O
st0	O
together	O
with	O
an	O
explicit	O
memory	O
operand	O
or	O
register	B-General_Concept
;	O
the	O
st0	O
register	B-General_Concept
may	O
thus	O
be	O
used	O
as	O
an	O
accumulator	B-General_Concept
(	O
i.e.	O
</s>
<s>
as	O
a	O
combined	O
destination	O
and	O
left	O
operand	O
)	O
and	O
can	O
also	O
be	O
exchanged	O
with	O
any	O
of	O
the	O
eight	O
stack	B-Application
registers	O
using	O
an	O
instruction	O
called	O
FXCH	O
stX	O
(	O
codes	O
D9C8	O
–	O
D9CFh	O
)	O
.	O
</s>
<s>
This	O
makes	O
the	O
x87	B-Application
stack	B-Application
usable	O
as	O
seven	O
freely	O
addressable	O
registers	O
plus	O
an	O
accumulator	B-General_Concept
.	O
</s>
<s>
This	O
is	O
especially	O
applicable	O
on	O
superscalar	B-General_Concept
x86	B-Operating_System
processors	O
(	O
Pentium	B-General_Concept
of	O
1993	O
and	O
later	O
)	O
,	O
where	O
these	O
exchange	O
instructions	O
are	O
optimized	O
down	O
to	O
a	O
zero-clock	O
penalty	O
.	O
</s>
<s>
When	O
Intel	O
designed	O
the	O
8087	B-Device
,	O
it	O
aimed	O
to	O
make	O
a	O
standard	O
floating-point	B-Algorithm
format	I-Algorithm
for	O
future	O
designs	O
.	O
</s>
<s>
An	O
important	O
aspect	O
of	O
the	O
8087	B-Device
from	O
a	O
historical	O
perspective	O
was	O
that	O
it	O
became	O
the	O
basis	O
for	O
the	O
IEEE	O
754	O
floating-point	B-Algorithm
standard	O
.	O
</s>
<s>
The	O
8087	B-Device
did	O
not	O
implement	O
the	O
eventual	O
IEEE	O
754	O
standard	O
in	O
all	O
its	O
details	O
,	O
as	O
the	O
standard	O
was	O
not	O
finished	O
until	O
1985	O
,	O
but	O
the	O
80387	O
did	O
.	O
</s>
<s>
The	O
8087	B-Device
provided	O
two	O
basic	O
32/64	O
-bit	O
floating-point	B-Algorithm
data	O
types	O
and	O
an	O
additional	O
extended	B-Algorithm
80-bit	I-Algorithm
internal	O
temporary	O
format	O
(	O
that	O
could	O
also	O
be	O
stored	O
in	O
memory	O
)	O
to	O
improve	O
accuracy	O
over	O
large	O
and	O
complex	O
calculations	O
.	O
</s>
<s>
Apart	O
from	O
this	O
,	O
the	O
8087	B-Device
offered	O
an	O
80-bit/18	O
-digit	O
packed	O
BCD	O
(	O
binary-coded	O
decimal	O
)	O
format	O
and	O
16-	O
,	O
32-	O
,	O
and	O
64-bit	O
integer	O
data	O
types	O
.	O
</s>
<s>
The	O
8087	B-Device
handles	O
infinity	B-Application
values	O
by	O
either	O
affine	O
closure	O
or	O
projective	O
closure	O
(	O
selected	O
by	O
the	O
status	O
register	B-General_Concept
)	O
.	O
</s>
<s>
With	O
projective	O
closure	O
,	O
infinity	B-Application
is	O
treated	O
as	O
an	O
unsigned	O
representation	O
for	O
very	O
small	O
or	O
very	O
large	O
numbers	O
.	O
</s>
<s>
These	O
two	O
methods	O
of	O
handling	O
infinity	B-Application
were	O
incorporated	O
into	O
the	O
draft	O
version	O
of	O
the	O
IEEE	O
754	O
floating-point	B-Algorithm
standard	O
.	O
</s>
<s>
The	O
80287	O
retained	O
projective	O
closure	O
as	O
an	O
option	O
,	O
but	O
the	O
80387	O
and	O
subsequent	O
floating-point	B-Algorithm
processors	O
(	O
including	O
the	O
80187	O
)	O
only	O
supported	O
affine	O
closure	O
.	O
</s>
<s>
The	O
8087	B-Device
differed	O
from	O
subsequent	O
Intel	O
coprocessors	B-General_Concept
in	O
that	O
it	O
was	O
directly	O
connected	O
to	O
the	O
address	O
and	O
data	O
buses	O
.	O
</s>
<s>
The	O
8087	B-Device
looked	O
for	O
instructions	O
that	O
commenced	O
with	O
the	O
"	O
11011	O
"	O
sequence	O
and	O
acted	O
on	O
them	O
,	O
immediately	O
requesting	O
DMA	B-General_Concept
from	O
the	O
main	O
CPU	O
as	O
necessary	O
to	O
access	O
memory	O
operands	O
longer	O
than	O
one	O
word	O
(	O
16bits	O
)	O
,	O
then	O
immediately	O
releasing	O
bus	O
control	O
back	O
to	O
the	O
main	O
CPU	O
.	O
</s>
<s>
The	O
coprocessor	B-General_Concept
did	O
not	O
hold	O
up	O
execution	O
of	O
the	O
program	O
until	O
the	O
coprocessor	B-General_Concept
instruction	O
was	O
complete	O
,	O
and	O
the	O
program	O
had	O
to	O
explicitly	O
synchronize	O
the	O
two	O
processors	O
,	O
as	O
explained	O
above	O
(	O
in	O
the	O
"	O
Design	O
and	O
development	O
"	O
section	O
)	O
.	O
</s>
<s>
There	O
was	O
a	O
potential	O
crash	O
problem	O
if	O
the	O
coprocessor	B-General_Concept
instruction	O
failed	O
to	O
decode	O
to	O
one	O
that	O
the	O
coprocessor	B-General_Concept
understood	O
.	O
</s>
<s>
Intel	O
's	O
later	O
coprocessors	B-General_Concept
did	O
not	O
connect	O
to	O
the	O
buses	O
in	O
the	O
same	O
way	O
,	O
but	O
received	O
instructions	O
through	O
the	O
main	O
processor	O
I/O	O
ports	O
.	O
</s>
<s>
This	O
yielded	O
an	O
execution	O
time	O
penalty	O
,	O
but	O
the	O
potential	O
crash	O
problem	O
was	O
avoided	O
because	O
the	O
main	O
processor	O
would	O
ignore	O
the	O
instruction	O
if	O
the	O
coprocessor	B-General_Concept
refused	O
to	O
accept	O
it	O
.	O
</s>
<s>
The	O
8087	B-Device
was	O
able	O
to	O
detect	O
whether	O
it	O
was	O
connected	O
to	O
an	O
8088	O
or	O
an	O
8086	B-General_Concept
by	O
monitoring	O
the	O
data	O
bus	O
during	O
the	O
reset	O
cycle	O
.	O
</s>
<s>
The	O
8087	B-Device
was	O
,	O
in	O
theory	O
,	O
capable	O
of	O
working	O
concurrently	O
while	O
the	O
8086/8	O
processes	O
additional	O
instructions	O
.	O
</s>
<s>
In	O
practice	O
,	O
there	O
was	O
the	O
potential	O
for	O
program	O
failure	O
if	O
the	O
coprocessor	B-General_Concept
issued	O
a	O
new	O
instruction	O
before	O
the	O
last	O
one	O
had	O
completed	O
.	O
</s>
<s>
The	O
assembler	O
would	O
automatically	O
insert	O
an	O
FWAIT	O
instruction	O
after	O
every	O
coprocessor	B-General_Concept
opcode	O
,	O
forcing	O
the	O
8086/8	O
to	O
halt	O
execution	O
until	O
the	O
8087	B-Device
signalled	O
that	O
it	O
had	O
finished	O
.	O
</s>
<s>
Intel	B-Device
8087	I-Device
coprocessors	B-General_Concept
were	O
fabricated	O
in	O
two	O
variants	O
:	O
one	O
with	O
ceramic	O
side-brazed	O
DIP	B-Algorithm
(	O
CerDIP	B-Algorithm
)	O
and	O
one	O
in	O
hermetic	O
DIP	B-Algorithm
(	O
PDIP	B-Algorithm
)	O
,	O
and	O
were	O
designed	O
to	O
operate	O
in	O
the	O
following	O
temperature	O
ranges	O
:	O
</s>
<s>
All	O
models	O
of	O
the	O
8087	B-Device
had	O
a	O
40-pin	O
DIP	B-Algorithm
package	O
and	O
operated	O
on	O
5volts	O
,	O
consuming	O
around	O
2.4watts	O
.	O
</s>
<s>
Unlike	O
later	O
Intel	O
coprocessors	B-General_Concept
,	O
the	O
8087	B-Device
had	O
to	O
run	O
at	O
the	O
same	O
clock	O
speed	O
as	O
the	O
main	O
processor	O
.	O
</s>
<s>
The	O
part	O
was	O
second-sourced	O
by	O
AMD	O
as	O
AMD	O
8087	B-Device
and	O
by	O
Cyrix	O
as	O
Cyrix	O
8087	B-Device
.	O
</s>
<s>
The	O
clone	O
K1810WM87	O
of	O
the	O
8087	B-Device
was	O
produced	O
in	O
the	O
Soviet	O
Union	O
.	O
</s>
<s>
Just	O
as	O
the	O
8088	O
and	O
8086	B-General_Concept
processors	O
were	O
superseded	O
by	O
later	O
parts	O
,	O
so	O
was	O
the	O
8087	B-Device
superseded	O
.	O
</s>
<s>
Other	O
Intel	O
coprocessors	B-General_Concept
were	O
the	O
80287	O
,	O
80387	O
,	O
and	O
the	O
80187	O
.	O
</s>
<s>
Starting	O
with	O
the	O
80486	B-General_Concept
,	O
the	O
later	O
Intel	O
processors	O
did	O
not	O
use	O
a	O
separate	O
floating-point	B-Algorithm
coprocessor	B-General_Concept
;	O
virtually	O
all	O
included	O
it	O
on	O
the	O
main	O
processor	O
die	O
,	O
with	O
the	O
significant	O
exception	O
of	O
the	O
80486SX	B-General_Concept
,	O
which	O
was	O
a	O
modified	O
80486DX	B-General_Concept
with	O
the	O
FPU	O
disabled	O
.	O
</s>
<s>
The	O
80487	O
was	O
in	O
fact	O
a	O
full-blown	O
80486DX	B-General_Concept
chip	O
with	O
an	O
extra	O
pin	O
.	O
</s>
<s>
When	O
installed	O
,	O
it	O
disabled	O
the	O
80486SX	B-General_Concept
CPU	O
.	O
</s>
<s>
The	O
80486DX	B-General_Concept
,	O
Pentium	B-General_Concept
,	O
and	O
later	O
processors	O
include	O
floating-point	B-Algorithm
functionality	O
on	O
the	O
CPU	O
core	O
.	O
</s>
