<s>
The	O
Intel	B-Architecture
MCS-51	I-Architecture
(	O
commonly	O
termed	O
8051	B-Architecture
)	O
is	O
a	O
single	B-Architecture
chip	I-Architecture
microcontroller	I-Architecture
(	O
MCU	O
)	O
series	O
developed	O
by	O
Intel	O
in	O
1980	O
for	O
use	O
in	O
embedded	B-Architecture
systems	I-Architecture
.	O
</s>
<s>
The	O
architect	O
of	O
the	O
Intel	B-Architecture
MCS-51	I-Architecture
instruction	B-General_Concept
set	I-General_Concept
was	O
John	O
H	O
.	O
Wharton	O
.	O
</s>
<s>
Intel	O
's	O
original	O
versions	O
were	O
popular	O
in	O
the	O
1980s	O
and	O
early	O
1990s	O
,	O
and	O
enhanced	O
binary	B-General_Concept
compatible	I-General_Concept
derivatives	O
remain	O
popular	O
today	O
.	O
</s>
<s>
It	O
is	O
an	O
example	O
of	O
a	O
complex	B-Architecture
instruction	I-Architecture
set	I-Architecture
computer	I-Architecture
(	O
but	O
also	O
possessing	O
some	O
of	O
the	O
features	O
of	O
RISC	B-Architecture
architectures	I-Architecture
,	O
such	O
as	O
a	O
large	O
register	B-General_Concept
set	O
and	O
register	B-General_Concept
windows	I-General_Concept
)	O
and	O
has	O
separate	O
memory	O
spaces	O
for	O
program	O
instructions	O
and	O
data	O
.	O
</s>
<s>
Intel	O
's	O
original	O
MCS-51	B-Architecture
family	O
was	O
developed	O
using	O
N-type	O
metal	O
–	O
oxide	O
–	O
semiconductor	O
(	O
NMOS	B-Algorithm
)	O
technology	O
,	O
like	O
its	O
predecessor	O
Intel	B-Device
MCS-48	I-Device
,	O
but	O
later	O
versions	O
,	O
identified	O
by	O
a	O
letter	O
C	B-Language
in	O
their	O
name	O
(	O
e.g.	O
,	O
80C51	B-Architecture
)	O
use	O
complementary	O
metal	O
–	O
oxide	O
–	O
semiconductor	O
(	O
CMOS	B-Device
)	O
technology	O
and	O
consume	O
less	O
power	O
than	O
their	O
NMOS	B-Algorithm
predecessors	O
.	O
</s>
<s>
The	O
family	O
was	O
continued	O
in	O
1996	O
with	O
the	O
enhanced	O
8-bit	O
MCS-151	O
and	O
the	O
8/16-bit/32	O
-bit	O
MCS-251	O
family	O
of	O
binary	B-General_Concept
compatible	I-General_Concept
microcontrollers	B-Architecture
.	O
</s>
<s>
While	O
Intel	O
no	O
longer	O
manufactures	O
the	O
MCS-51	B-Architecture
,	O
MCS-151	O
and	O
MCS-251	O
family	O
,	O
enhanced	O
binary	B-General_Concept
compatible	I-General_Concept
derivatives	O
made	O
by	O
numerous	O
vendors	O
remain	O
popular	O
today	O
.	O
</s>
<s>
Some	O
derivatives	O
integrate	O
a	O
digital	B-Architecture
signal	I-Architecture
processor	I-Architecture
(	O
DSP	O
)	O
or	O
a	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
(	O
coprocessor	O
,	O
FPU	O
)	O
.	O
</s>
<s>
Beyond	O
these	O
physical	O
devices	O
,	O
several	O
companies	O
also	O
offer	O
MCS-51	B-Architecture
derivatives	O
as	O
IP	B-Architecture
cores	I-Architecture
for	O
use	O
in	O
field-programmable	B-Architecture
gate	I-Architecture
array	I-Architecture
(	O
FPGA	B-Architecture
)	O
or	O
application-specific	O
integrated	O
circuit	O
(	O
ASIC	O
)	O
designs	O
.	O
</s>
<s>
The	O
8051	B-Architecture
architecture	O
provides	O
many	O
functions	O
(	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
,	O
random-access	B-Architecture
memory	I-Architecture
(	O
RAM	B-Architecture
)	O
,	O
read-only	B-Device
memory	I-Device
(	O
ROM	B-Device
)	O
,	O
input/output	B-General_Concept
(	O
I/O	B-General_Concept
)	O
ports	O
,	O
serial	B-Protocol
port	I-Protocol
,	O
interrupt	B-Application
control	O
,	O
timers	O
)	O
in	O
one	O
package	B-Algorithm
:	O
</s>
<s>
Dual	O
16-bit	B-Device
address	B-Architecture
bus	I-Architecture
;	O
it	O
can	B-Protocol
access	O
2×216	O
memory	O
locations	O
:	O
64KB	O
(	O
65,536	O
locations	O
)	O
each	O
of	O
ROM	B-Device
(	O
PMEM	O
)	O
and	O
external	O
RAM	B-Architecture
(	O
XRAM	O
)	O
,	O
using	O
two	O
memory	O
buses	O
in	O
a	O
Harvard	B-Architecture
architecture	I-Architecture
.	O
</s>
<s>
One	O
feature	O
of	O
the	O
8051	B-Architecture
core	O
is	O
the	O
inclusion	O
of	O
a	O
boolean	O
processing	O
engine	O
,	O
which	O
allows	O
bit-level	O
boolean	O
logic	O
operations	O
to	O
be	O
carried	O
out	O
directly	O
and	O
efficiently	O
on	O
select	O
internal	O
registers	B-General_Concept
,	O
ports	O
and	O
select	O
RAM	B-Architecture
locations	O
.	O
</s>
<s>
Another	O
feature	O
is	O
the	O
inclusion	O
of	O
four	O
bank	B-General_Concept
selectable	I-General_Concept
working	B-General_Concept
register	I-General_Concept
sets	O
,	O
which	O
greatly	O
reduce	O
the	O
time	O
required	O
to	O
perform	O
the	O
context	B-Operating_System
switches	I-Operating_System
to	O
enter	O
and	O
leave	O
interrupt	B-General_Concept
service	I-General_Concept
routines	I-General_Concept
.	O
</s>
<s>
With	O
one	O
instruction	O
,	O
the	O
8051	B-Architecture
can	B-Protocol
switch	O
register	B-General_Concept
banks	O
,	O
avoiding	O
the	O
time-consuming	O
task	O
of	O
transferring	O
the	O
critical	O
registers	B-General_Concept
to	O
RAM	B-Architecture
.	O
</s>
<s>
Once	O
a	O
UART	O
,	O
and	O
a	O
timer	O
if	O
necessary	O
,	O
has	O
been	O
configured	O
,	O
the	O
programmer	O
needs	O
only	O
write	O
a	O
simple	O
interrupt	B-Application
routine	O
to	O
refill	O
the	O
send	O
shift	O
register	B-General_Concept
whenever	O
the	O
last	O
bit	O
is	O
shifted	O
out	O
by	O
the	O
UART	O
and/or	O
empty	O
the	O
full	O
receive	O
shift	O
register	B-General_Concept
(	O
copy	O
the	O
data	O
somewhere	O
else	O
)	O
.	O
</s>
<s>
MCS-51	B-Architecture
based	O
microcontrollers	B-Architecture
typically	O
include	O
one	O
or	O
two	O
UARTs	O
,	O
two	O
or	O
three	O
timers	O
,	O
128	O
or	O
256bytes	O
of	O
internal	O
data	O
RAM	B-Architecture
(	O
16bytes	O
of	O
which	O
are	O
bit-addressable	O
)	O
,	O
up	O
to	O
128bytes	O
of	O
I/O	B-General_Concept
,	O
512bytes	O
to	O
64KB	O
of	O
internal	O
program	B-Device
memory	I-Device
,	O
and	O
sometimes	O
a	O
quantity	O
of	O
extended	O
data	O
RAM	B-Architecture
(	O
ERAM	O
)	O
located	O
in	O
the	O
external	O
data	O
space	O
.	O
</s>
<s>
External	O
RAM	B-Architecture
and	O
ROM	B-Device
share	O
the	O
data	O
and	O
address	O
buses	O
.	O
</s>
<s>
The	O
original	O
8051	B-Architecture
core	O
ran	O
at	O
12	O
clock	O
cycles	O
per	O
machine	O
cycle	O
,	O
with	O
most	O
instructions	O
executing	O
in	O
one	O
or	O
two	O
machine	O
cycles	O
.	O
</s>
<s>
With	O
a	O
12MHz	O
clock	O
frequency	O
,	O
the	O
8051	B-Architecture
could	O
thus	O
execute	O
1	O
million	O
one-cycle	O
instructions	O
per	O
second	O
or	O
500,000	O
two-cycle	O
instructions	O
per	O
second	O
.	O
</s>
<s>
Enhanced	O
8051	B-Architecture
cores	O
are	O
now	O
commonly	O
used	O
which	O
run	O
at	O
six	O
,	O
four	O
,	O
two	O
,	O
or	O
even	O
one	O
clock	O
per	O
machine	O
cycle	O
(	O
denoted	O
"	O
1T	O
"	O
)	O
,	O
and	O
have	O
clock	O
frequencies	O
of	O
up	O
to	O
100MHz	O
,	O
and	O
are	O
thus	O
capable	O
of	O
an	O
even	O
greater	O
number	O
of	O
instructions	O
per	O
second	O
.	O
</s>
<s>
All	O
Silicon	O
Labs	O
,	O
some	O
Dallas	O
(	O
now	O
part	O
of	O
Maxim	O
Integrated	O
)	O
and	O
a	O
few	O
Atmel	O
(	O
now	O
part	O
of	O
Microchip	O
)	O
devices	O
have	O
single	B-General_Concept
cycle	I-General_Concept
cores	I-General_Concept
.	O
</s>
<s>
8051	B-Architecture
variants	O
may	O
include	O
built-in	O
reset	O
timers	O
with	O
brown-out	O
detection	O
,	O
on-chip	O
oscillators	O
,	O
self-programmable	O
flash	B-Device
ROM	I-Device
program	B-Device
memory	I-Device
,	O
built-in	O
external	O
RAM	B-Architecture
,	O
extra	O
internal	O
program	O
storage	O
,	O
bootloader	B-Application
code	O
in	O
ROM	B-Device
,	O
EEPROM	B-General_Concept
non-volatile	O
data	O
storage	O
,	O
I2C	O
,	O
SPI	B-Architecture
,	O
and	O
USB	B-Protocol
host	O
interfaces	O
,	O
CAN	B-Protocol
or	O
LIN	O
bus	O
,	O
Zigbee	B-Protocol
or	O
Bluetooth	B-Protocol
radio	O
modules	O
,	O
PWM	B-Algorithm
generators	O
,	O
analog	O
comparators	O
,	O
analog-to-digital	O
and	O
digital-to-analog	O
converters	O
,	O
RTCs	O
,	O
extra	O
counters	O
and	O
timers	O
,	O
in-circuit	O
debugging	O
facilities	O
,	O
more	O
interrupt	B-Application
sources	O
,	O
extra	O
power	O
saving	O
modes	O
,	O
more/less	O
parallel	O
ports	O
etc	O
.	O
</s>
<s>
Intel	O
manufactured	O
a	O
mask	O
programmed	O
version	O
,	O
8052AH-BASIC	O
,	O
with	O
a	O
BASIC	O
interpreter	O
in	O
ROM	B-Device
,	O
capable	O
of	O
running	O
user	O
programs	O
loaded	O
into	O
RAM	B-Architecture
.	O
</s>
<s>
MCS-51	B-Architecture
based	O
microcontrollers	B-Architecture
have	O
been	O
adapted	O
to	O
extreme	O
environments	O
.	O
</s>
<s>
Examples	O
for	O
high-temperature	O
variants	O
are	O
the	O
Tekmos	O
TK8H51	O
family	O
for	O
−40°C	O
to	O
+250°C	O
or	O
the	O
Honeywell	O
HT83C51	O
for	O
−55°C	O
to	O
+225°C	O
(	O
with	O
operation	O
for	O
up	O
to	O
1	O
year	O
at	O
+300°C	O
)	O
.	O
</s>
<s>
Radiation-hardenend	O
MCS-51	B-Architecture
microcontrollers	B-Architecture
for	O
use	O
in	O
spacecraft	O
are	O
available	O
;	O
e.g.	O
,	O
from	O
Cobham	O
(	O
formerly	O
Aeroflex	O
)	O
as	O
the	O
UT69RH051	O
or	O
from	O
NIIET	O
as	O
the	O
1830VE32	O
(	O
)	O
.	O
</s>
<s>
In	O
some	O
engineering	O
schools	O
,	O
the	O
8051	B-Architecture
microcontroller	B-Architecture
is	O
used	O
in	O
introductory	O
microcontroller	B-Architecture
courses	O
.	O
</s>
<s>
8051	B-Architecture
is	O
the	O
original	O
name	O
by	O
Intel	O
with	O
4KB	O
ROM	B-Device
and	O
128byte	O
RAM	B-Architecture
.	O
</s>
<s>
Variants	O
starting	O
with	O
87	O
have	O
a	O
user	O
programmable	O
EPROM	B-General_Concept
,	O
sometimes	O
UV	O
erasable	O
.	O
</s>
<s>
Variants	O
with	O
a	O
C	B-Language
as	O
the	O
third	O
character	O
are	O
some	O
kind	O
of	O
CMOS	B-Device
.	O
</s>
<s>
8031	B-Architecture
and	O
8032	B-Architecture
are	O
ROM-less	O
versions	O
,	O
with	O
128	O
and	O
256	O
bytes	B-Application
RAM	B-Architecture
.	O
</s>
<s>
The	O
last	O
digit	O
can	B-Protocol
indicate	O
memory	O
size	O
,	O
e.g.	O
</s>
<s>
8052	B-Architecture
with	O
8KB	O
ROM	B-Device
,	O
87C54	O
16KB	O
EPROM	B-General_Concept
,	O
and	O
87C58	O
with	O
32KB	O
EPROM	B-General_Concept
,	O
all	O
with	O
256byte	O
RAM	B-Architecture
.	O
</s>
<s>
The	O
MCS-51	B-Architecture
has	O
four	O
distinct	O
types	O
of	O
memory	O
:	O
internal	B-General_Concept
RAM	I-General_Concept
,	O
special	O
function	O
registers	B-General_Concept
,	O
program	B-Device
memory	I-Device
,	O
and	O
external	O
data	O
memory	O
.	O
</s>
<s>
To	O
access	O
these	O
efficiently	O
,	O
some	O
compilers	O
utilize	O
as	O
many	O
as	O
7	O
types	O
of	O
memory	O
definitions	O
:	O
Internal	B-General_Concept
RAM	I-General_Concept
,	O
single-bit	O
access	O
to	O
internal	B-General_Concept
RAM	I-General_Concept
,	O
special	O
function	O
registers	B-General_Concept
,	O
single-bit	O
access	O
to	O
selected	O
(	O
divisible	O
by	O
8	O
)	O
special	O
function	O
registers	B-General_Concept
,	O
program	O
RAM	B-Architecture
,	O
external	O
ram	B-Architecture
accessed	O
using	O
a	O
register	B-General_Concept
indirect	O
access	O
,	O
using	O
one	O
of	O
the	O
standard	O
8-bit	O
registers	B-General_Concept
,	O
and	O
register	B-General_Concept
indirect	O
external	O
RAM	B-Architecture
access	O
utilizing	O
the	O
16-bit	B-Device
indirect	O
access	O
register	B-General_Concept
.	O
</s>
<s>
The	O
8051	B-Architecture
's	O
instruction	B-General_Concept
set	I-General_Concept
is	O
designed	O
as	O
a	O
Harvard	B-Architecture
architecture	I-Architecture
with	O
segregated	O
memory	O
(	O
data	O
and	O
instructions	O
)	O
;	O
it	O
can	B-Protocol
only	O
execute	O
code	O
fetched	O
from	O
program	B-Device
memory	I-Device
,	O
and	O
has	O
no	O
instructions	O
to	O
write	O
to	O
program	B-Device
memory	I-Device
.	O
</s>
<s>
However	O
,	O
the	O
bus	O
leaving	O
the	O
IC	O
has	O
a	O
single	O
address	O
and	O
data	O
path	O
,	O
and	O
strongly	O
resembles	O
a	O
Von	B-Architecture
Neumann	I-Architecture
architecture	I-Architecture
bus	O
.	O
</s>
<s>
Most	O
8051	B-Architecture
systems	O
respect	O
the	O
instruction	B-General_Concept
set	I-General_Concept
,	O
and	O
require	O
customized	O
features	O
to	O
download	O
new	O
executable	O
programs	O
,	O
e.g.	O
</s>
<s>
in	O
flash	B-Device
memory	I-Device
.	O
</s>
<s>
Internal	B-General_Concept
RAM	I-General_Concept
(	O
IRAM	O
)	O
has	O
an	O
8-bit	O
address	O
space	O
,	O
using	O
addresses	O
0	O
through	O
0xFF	O
.	O
</s>
<s>
IRAM	O
from	O
0x00	O
to	O
0x7F	O
contains	O
128	O
directly	O
addressable	O
1-byte	O
registers	B-General_Concept
,	O
which	O
can	B-Protocol
be	O
accessed	O
using	O
an	O
8-bit	O
absolute	O
address	O
that	O
is	O
part	O
of	O
the	O
instruction	O
.	O
</s>
<s>
Alternatively	O
,	O
IRAM	O
can	B-Protocol
be	O
accessed	O
indirectly	O
:	O
the	O
address	O
is	O
loaded	O
into	O
R0	O
or	O
R1	O
,	O
and	O
the	O
memory	O
is	O
accessed	O
using	O
the	O
@R0	O
or	O
@R1	O
syntax	O
,	O
or	O
as	O
stack	O
memory	O
through	O
the	O
stack	O
pointer	O
SP	O
,	O
with	O
the	O
PUSH	O
and	O
POP	O
operations	O
;	O
and	O
*	O
CALL	O
and	O
RET	O
operations	O
.	O
</s>
<s>
The	O
original	O
8051	B-Architecture
has	O
only	O
128	O
bytes	B-Application
of	O
IRAM	O
.	O
</s>
<s>
The	O
8052	B-Architecture
added	O
IRAM	O
from	O
0x80	O
to	O
0xFF	O
,	O
which	O
can	B-Protocol
only	O
be	O
accessed	O
indirectly	O
(	O
e.g.	O
</s>
<s>
Most	O
8051	B-Architecture
clones	O
also	O
have	O
a	O
full	O
256	O
bytes	B-Application
of	O
IRAM	O
.	O
</s>
<s>
Direct	O
accesses	O
to	O
the	O
IRAM	O
addresses	O
80-FF	O
are	O
,	O
instead	O
,	O
mapped	O
onto	O
the	O
special	O
function	O
registers	B-General_Concept
(	O
SFR	O
)	O
,	O
where	O
the	O
accumulators	B-General_Concept
A	O
,	O
B	O
,	O
carry	B-Algorithm
bit	I-Algorithm
C	B-Language
,	O
and	O
other	O
special	O
registers	B-General_Concept
for	O
control	O
,	O
status	O
,	O
etc.	O
,	O
are	O
located	O
.	O
</s>
<s>
Special	O
function	O
registers	B-General_Concept
(	O
SFR	O
)	O
are	O
located	O
in	O
the	O
same	O
address	O
space	O
as	O
IRAM	O
,	O
at	O
addresses	O
0x80	O
to	O
0xFF	O
,	O
and	O
are	O
accessed	O
directly	O
using	O
the	O
same	O
instructions	O
as	O
for	O
the	O
lower	O
half	O
of	O
IRAM	O
.	O
</s>
<s>
The	O
special	O
function	O
registers	B-General_Concept
(	O
SFR	O
)	O
include	O
the	O
accumulators	B-General_Concept
A	O
(	O
or	O
ACC	O
,	O
at	O
E0	O
)	O
and	O
B	O
(	O
at	O
F0	O
)	O
and	O
program	O
status	O
word	O
(	O
or	O
PSW	O
,	O
at	O
D0	O
)	O
,	O
themselves	O
,	O
as	O
well	O
as	O
the	O
16-bit	B-Device
data	O
pointer	O
DPTR	O
(	O
at	O
82	O
,	O
as	O
DPL	O
and	O
83	O
as	O
DPH	O
)	O
.	O
</s>
<s>
In	O
addition	O
to	O
these	O
,	O
a	O
small	O
core	O
of	O
other	O
special	O
function	O
registers	B-General_Concept
-	O
including	O
the	O
interrupt	B-Application
enable	O
IE	O
at	O
A8	O
and	O
interrupt	B-Application
priority	O
IP	O
at	O
B8	O
;	O
the	O
I/O	B-General_Concept
ports	O
P0	O
(	O
80	O
)	O
,	O
P1	O
(	O
90	O
)	O
,	O
P2	O
(	O
A0	O
)	O
,	O
P3	O
(	O
B0	O
)	O
;	O
the	O
serial	O
I/O	B-General_Concept
control	O
SCON	O
(	O
98	O
)	O
and	O
buffer	O
SBUF	O
(	O
99	O
)	O
;	O
the	O
CPU/power	O
control	O
register	B-General_Concept
PCON	O
(	O
87	O
)	O
;	O
and	O
the	O
registers	B-General_Concept
for	O
timers	O
0	O
and	O
1	O
control	O
(	O
TCON	O
at	O
88	O
)	O
and	O
operation	O
mode	O
(	O
TMOD	O
at	O
89	O
)	O
,	O
the	O
16-bit	B-Device
timer	O
0	O
(	O
TL0	O
at	O
8A	O
,	O
TH0	O
at	O
8C	O
)	O
and	O
timer	O
1	O
(	O
TL1	O
at	O
8B	O
,	O
TH1	O
at	O
8D	O
)	O
-	O
are	O
present	O
on	O
all	O
versions	O
of	O
the	O
8051	B-Architecture
.	O
</s>
<s>
Other	O
addresses	O
are	O
version-dependent	O
;	O
in	O
particular	O
,	O
the	O
timer	O
2	O
registers	B-General_Concept
for	O
the	O
8052	B-Architecture
:	O
the	O
control	O
register	B-General_Concept
T2CON	O
(	O
at	O
C8	O
)	O
,	O
the	O
16-bit	B-Device
capture/latch	O
(	O
RCAP2L	O
at	O
CA	O
,	O
RCAP2H	O
at	O
CB	O
)	O
and	O
timer	O
2	O
(	O
TL2	O
at	O
CC	O
and	O
TH2	O
at	O
CD	O
)	O
,	O
are	O
not	O
included	O
with	O
the	O
8051	B-Architecture
.	O
</s>
<s>
The	O
32	O
bytes	B-Application
in	O
IRAM	O
from	O
0x00	O
–	O
0x1F	O
contains	O
space	O
for	O
four	O
eight-byte	O
register	B-General_Concept
windows	I-General_Concept
,	O
which	O
the	O
8	O
registers	B-General_Concept
R0	O
–	O
R7	O
map	O
to	O
.	O
</s>
<s>
The	O
16	O
bytes	B-Application
(	O
128	O
bits	O
)	O
at	O
IRAM	O
locations	O
0x20	O
–	O
0x2F	O
contains	O
space	O
for	O
128	O
1-bit	O
registers	B-General_Concept
,	O
which	O
are	O
separately	O
addressable	O
as	O
bit	O
registers	B-General_Concept
00-7F	O
.	O
</s>
<s>
The	O
remaining	O
bit	O
registers	B-General_Concept
,	O
addressed	O
as	O
80-FF	O
,	O
are	O
mapped	O
onto	O
the	O
16	O
special	O
function	O
registers	B-General_Concept
80	O
,	O
88	O
,	O
90	O
,	O
98	O
,	O
...	O
,	O
F0	O
and	O
F8	O
(	O
those	O
whose	O
addresses	O
are	O
multiples	O
of	O
8	O
)	O
,	O
and	O
therefore	O
include	O
the	O
bits	O
comprising	O
the	O
accumulators	B-General_Concept
A	O
,	O
B	O
and	O
program	O
status	O
word	O
PSW	O
.	O
</s>
<s>
The	O
register	B-General_Concept
window	I-General_Concept
address	O
,	O
being	O
bits	O
3	O
and	O
4	O
on	O
PSW	O
,	O
is	O
itself	O
addressable	O
as	O
bit	O
registers	B-General_Concept
D3	O
and	O
D4	O
,	O
respectively	O
;	O
while	O
the	O
carry	B-Algorithm
bit	I-Algorithm
C	B-Language
(	O
or	O
CY	O
)	O
,	O
at	O
bit	O
7	O
of	O
the	O
PSW	O
,	O
is	O
addressable	O
as	O
bit	O
register	B-General_Concept
D7	O
.	O
</s>
<s>
Program	B-Device
memory	I-Device
(	O
PMEM	O
,	O
though	O
less	O
common	O
in	O
usage	O
than	O
IRAM	O
and	O
XRAM	O
)	O
is	O
up	O
to	O
64KB	O
of	O
read-only	B-Device
memory	I-Device
,	O
starting	O
at	O
address	O
0	O
in	O
a	O
separate	O
address	O
space	O
.	O
</s>
<s>
Program	B-Device
memory	I-Device
is	O
read-only	O
,	O
though	O
some	O
variants	O
of	O
the	O
8051	B-Architecture
use	O
on-chip	O
flash	B-Device
memory	I-Device
and	O
provide	O
a	O
method	O
of	O
re-programming	O
the	O
memory	O
in-system	O
or	O
in-application	O
.	O
</s>
<s>
In	O
addition	O
to	O
code	O
,	O
it	O
is	O
possible	O
to	O
store	O
read-only	O
data	O
such	O
as	O
lookup	B-Data_Structure
tables	I-Data_Structure
in	O
program	B-Device
memory	I-Device
,	O
retrieved	O
by	O
the	O
or	O
instructions	O
.	O
</s>
<s>
The	O
address	O
is	O
computed	O
as	O
the	O
sum	O
of	O
the	O
8-bit	O
accumulator	B-General_Concept
and	O
a	O
16-bit	B-Device
register	B-General_Concept
(	O
PC	O
or	O
DPTR	O
)	O
.	O
</s>
<s>
Special	O
jump	O
and	O
call	O
instructions	O
(	O
and	O
)	O
slightly	O
reduce	O
the	O
size	O
of	O
code	O
that	O
accesses	O
local	O
(	O
within	O
the	O
same	O
2KB	O
)	O
program	B-Device
memory	I-Device
.	O
</s>
<s>
When	O
code	O
larger	O
than	O
64K	O
is	O
required	O
,	O
a	O
common	O
system	O
makes	O
the	O
code	O
bank-switched	O
,	O
with	O
general-purpose	O
I/O	B-General_Concept
selecting	O
the	O
upper	O
address	O
bits	O
.	O
</s>
<s>
Some	O
8051	B-Architecture
compilers	O
make	O
provisions	O
to	O
automatically	O
access	O
paged	O
code	O
.	O
</s>
<s>
In	O
these	O
systems	O
the	O
interrupt	B-Application
vectors	O
and	O
paging	O
table	O
are	O
placed	O
in	O
the	O
first	O
32K	O
of	O
code	O
,	O
and	O
are	O
always	O
resident	O
.	O
</s>
<s>
External	O
data	O
memory	O
(	O
XRAM	O
)	O
is	O
a	O
third	O
address	O
space	O
,	O
also	O
starting	O
at	O
address	O
0	O
,	O
and	O
allowing	O
16	B-Device
bits	I-Device
of	O
address	O
space	O
.	O
</s>
<s>
It	O
can	B-Protocol
also	O
be	O
on	O
-	O
or	O
off-chip	O
;	O
what	O
makes	O
it	O
"	O
external	O
"	O
is	O
that	O
it	O
must	O
be	O
accessed	O
using	O
the	O
(	O
move	O
external	O
)	O
instruction	O
.	O
</s>
<s>
Many	O
variants	O
of	O
the	O
8051	B-Architecture
include	O
the	O
standard	O
256bytes	O
of	O
IRAM	O
plus	O
a	O
few	O
kilobytes	O
of	O
XRAM	O
on	O
the	O
chip	O
.	O
</s>
<s>
The	O
first	O
256	O
bytes	B-Application
of	O
XRAM	O
may	O
be	O
accessed	O
using	O
the	O
,	O
,	O
,	O
and	O
instructions	O
.	O
</s>
<s>
The	O
16-bit	B-Device
address	O
requires	O
the	O
programmer	O
to	O
load	O
the	O
16-bit	B-Device
index	O
register	B-General_Concept
.	O
</s>
<s>
For	O
this	O
reason	O
,	O
RAM	B-Architecture
accesses	O
with	O
16-bit	B-Device
addresses	O
are	O
substantially	O
slower	O
.	O
</s>
<s>
Some	O
CPUs	O
permit	O
the	O
8-bit	O
indirect	O
address	O
to	O
use	O
any	O
8-bit	O
general	O
purpose	O
register	B-General_Concept
.	O
</s>
<s>
To	O
permit	O
the	O
use	O
of	O
this	O
feature	O
,	O
some	O
8051-compatible	O
microcontrollers	B-Architecture
with	O
internal	B-General_Concept
RAM	I-General_Concept
larger	O
than	O
256	O
bytes	B-Application
,	O
or	O
an	O
inability	O
to	O
access	O
external	O
RAM	B-Architecture
access	O
internal	B-General_Concept
RAM	I-General_Concept
as	O
if	O
it	O
were	O
external	O
,	O
and	O
have	O
a	O
special	O
function	O
register	B-General_Concept
(	O
e.g.	O
</s>
<s>
PDATA	O
)	O
that	O
permits	O
them	O
to	O
set	O
the	O
upper	O
address	O
of	O
the	O
256-byte	O
page	O
.	O
</s>
<s>
This	O
emulates	O
the	O
MCS8051	O
mode	O
that	O
can	B-Protocol
page	O
the	O
upper	O
byte	B-Application
of	O
a	O
RAM	B-Architecture
address	O
by	O
setting	O
the	O
general-purpose	O
I/O	B-General_Concept
pins	O
.	O
</s>
<s>
When	O
RAM	B-Architecture
larger	O
than	O
64K	O
is	O
required	O
,	O
a	O
common	O
system	O
makes	O
the	O
RAM	B-Architecture
bank-switched	O
,	O
with	O
general-purpose	O
I/O	B-General_Concept
selecting	O
the	O
upper	O
address	O
bits	O
.	O
</s>
<s>
Some	O
8051	B-Architecture
compilers	O
make	O
provisions	O
to	O
automatically	O
access	O
paged	O
data	O
.	O
</s>
<s>
The	O
only	O
register	B-General_Concept
on	O
an	O
8051	B-Architecture
that	O
is	O
not	O
memory-mapped	O
is	O
the	O
16-bit	B-Device
program	B-General_Concept
counter	I-General_Concept
(	O
PC	O
)	O
.	O
</s>
<s>
This	O
specifies	O
the	O
address	O
of	O
the	O
next	B-General_Concept
instruction	I-General_Concept
to	O
execute	O
.	O
</s>
<s>
Eight	O
general-purpose	O
registers	B-General_Concept
R0	O
–	O
R7	O
may	O
be	O
accessed	O
with	O
instructions	O
one	O
byte	B-Application
shorter	O
than	O
others	O
.	O
</s>
<s>
Only	O
eight	O
bytes	B-Application
of	O
that	O
range	O
are	O
used	O
at	O
any	O
given	O
time	O
,	O
determined	O
by	O
the	O
two	O
bank	O
select	O
bits	O
in	O
the	O
PSW	O
.	O
</s>
<s>
The	O
following	O
is	O
a	O
partial	O
list	O
of	O
the	O
8051	B-Architecture
's	O
registers	B-General_Concept
,	O
which	O
are	O
memory-mapped	O
into	O
the	O
special	O
function	O
register	B-General_Concept
space	O
:	O
</s>
<s>
Stack	O
pointer	O
,	O
SP	O
(	O
0x81	O
)	O
This	O
is	O
an	O
8-bit	O
register	B-General_Concept
used	O
by	O
subroutine	O
call	O
and	O
return	O
instructions	O
.	O
</s>
<s>
Data	O
pointer	O
,	O
DP	O
(	O
0x82	O
–	O
83	O
)	O
This	O
is	O
a	O
16-bit	B-Device
register	B-General_Concept
that	O
is	O
used	O
for	O
accessing	O
PMEM	O
and	O
XRAM	O
.	O
</s>
<s>
Accumulator	B-General_Concept
,	O
A	O
(	O
0xE0	O
)	O
This	O
register	B-General_Concept
is	O
used	O
by	O
most	O
instructions	O
.	O
</s>
<s>
B	O
register	B-General_Concept
(	O
0xF0	O
)	O
This	O
is	O
used	O
as	O
an	O
extension	O
to	O
the	O
accumulator	B-General_Concept
for	O
multiply	O
and	O
divide	O
instructions	O
.	O
</s>
<s>
These	O
are	O
the	O
16	O
IRAM	O
locations	O
from	O
0x20	O
–	O
0x2F	O
,	O
and	O
the	O
16	O
special	O
function	O
registers	B-General_Concept
0x80	O
,	O
0x88	O
,	O
0x90	O
,	O
...	O
,	O
0xF8	O
.	O
</s>
<s>
Any	O
bit	O
of	O
these	O
bytes	B-Application
may	O
be	O
directly	O
accessed	O
by	O
a	O
variety	O
of	O
logical	O
operations	O
and	O
conditional	O
branches	O
.	O
</s>
<s>
For	O
the	O
former	O
,	O
the	O
most	O
significant	O
bit	O
of	O
the	O
accumulator	B-General_Concept
can	B-Protocol
be	O
addressed	O
directly	O
,	O
as	O
it	O
is	O
a	O
bit-addressable	O
SFR	O
.	O
</s>
<s>
For	O
the	O
latter	O
,	O
there	O
are	O
explicit	O
instructions	O
to	O
jump	O
on	O
whether	O
or	O
not	O
the	O
accumulator	B-General_Concept
is	O
zero	O
.	O
</s>
<s>
It	O
is	O
a	O
multi-cycle	B-General_Concept
processor	I-General_Concept
.	O
</s>
<s>
Many	O
instructions	O
utilize	O
an	O
accumulator	B-General_Concept
.	O
</s>
<s>
Each	O
interrupt	B-Application
has	O
four	O
priorities	O
.	O
</s>
<s>
Within	O
each	O
priority	O
,	O
the	O
interrupts	B-Application
of	O
devices	O
are	O
in	O
a	O
fixed	O
priority	O
.	O
</s>
<s>
Instructions	O
are	O
all	O
1	O
to	O
3	O
bytes	B-Application
long	O
,	O
consisting	O
of	O
an	O
initial	O
opcode	O
byte	B-Application
,	O
followed	O
by	O
up	O
to	O
2	O
bytes	B-Application
of	O
operands	O
.	O
</s>
<s>
of	O
the	O
opcode	O
bytes	B-Application
,	O
x0	O
–	O
x3	O
,	O
are	O
used	O
for	O
irregular	O
opcodes	O
.	O
</s>
<s>
of	O
the	O
opcode	O
bytes	B-Application
,	O
x4	O
–	O
xF	O
,	O
are	O
assigned	O
to	O
16	O
basic	O
ALU	O
instructions	O
with	O
12	O
possible	O
operands	O
.	O
</s>
<s>
x8	O
–	O
xF	O
:	O
Register	B-General_Concept
direct	O
,	O
R0	O
–	O
R7	O
.	O
</s>
<s>
x6	O
–	O
x7	O
:	O
Register	B-General_Concept
indirect	O
,	O
@R0	O
or	O
@R1	O
.	O
</s>
<s>
x5	O
:	O
Memory	O
direct	O
,	O
a	O
following	O
byte	B-Application
specifies	O
an	O
IRAM	O
or	O
SFR	O
location	O
.	O
</s>
<s>
x4	O
:	O
Immediate	O
,	O
a	O
following	O
byte	B-Application
specifies	O
an	O
8-bit	O
constant	O
.	O
</s>
<s>
When	O
the	O
operand	O
is	O
a	O
destination	O
(	O
,	O
)	O
or	O
the	O
operation	O
already	O
includes	O
an	O
immediate	O
source	O
(	O
,	O
)	O
,	O
this	O
instead	O
specifies	O
that	O
the	O
accumulator	B-General_Concept
is	O
used	O
.	O
</s>
<s>
Immediate	O
mode	O
(	O
opcode	O
0x04	O
)	O
specifies	O
the	O
accumulator	B-General_Concept
,	O
.	O
</s>
<s>
Immediate	O
mode	O
(	O
opcode	O
0x14	O
)	O
specifies	O
the	O
accumulator	B-General_Concept
,	O
.	O
</s>
<s>
2y	O
Add	O
the	O
operand	O
to	O
the	O
accumulator	B-General_Concept
,	O
A	O
.	O
Opcode	O
0x23	O
(	O
,	O
"	O
rotate	O
left	O
"	O
but	O
actually	O
a	O
shift	O
left	O
)	O
may	O
be	O
thought	O
of	O
as	O
.	O
</s>
<s>
3y	O
Add	O
the	O
operand	O
,	O
plus	O
the	O
C	B-Language
bit	O
,	O
to	O
the	O
accumulator	B-General_Concept
.	O
</s>
<s>
4y	O
Logical	O
OR	O
the	O
operand	O
into	O
the	O
accumulator	B-General_Concept
.	O
</s>
<s>
5y	O
Logical	O
AND	O
the	O
operand	O
into	O
the	O
accumulator	B-General_Concept
.	O
</s>
<s>
6y	O
Logical	O
exclusive-OR	O
the	O
operand	O
into	O
the	O
accumulator	B-General_Concept
.	O
</s>
<s>
Immediate	O
mode	O
(	O
opcode	O
0x74	O
)	O
specifies	O
the	O
accumulator	B-General_Concept
,	O
.	O
</s>
<s>
8y	O
Move	O
value	O
to	O
an	O
IRAM	O
or	O
SFR	O
register	B-General_Concept
.	O
</s>
<s>
9y	O
Subtract	O
the	O
operand	O
from	O
the	O
accumulator	B-General_Concept
.	O
</s>
<s>
Ay	O
Move	O
value	O
from	O
an	O
IRAM	O
or	O
SFR	O
register	B-General_Concept
.	O
</s>
<s>
Immediate	O
and	O
memory	O
direct	O
modes	O
(	O
opcodes	O
0xB4	O
and	O
0xB5	O
)	O
compare	O
the	O
operand	O
against	O
the	O
accumulator	B-General_Concept
,	O
.	O
</s>
<s>
Cy	O
Exchange	O
the	O
accumulator	B-General_Concept
and	O
the	O
operand	O
.	O
</s>
<s>
Immediate	O
mode	O
(	O
opcode	O
0xD4	O
)	O
,	O
and	O
register	B-General_Concept
indirect	O
mode	O
(	O
0xD6	O
,	O
0xD7	O
)	O
are	O
not	O
used	O
.	O
</s>
<s>
Ey	O
Move	O
operand	O
to	O
the	O
accumulator	B-General_Concept
.	O
</s>
<s>
Fy	O
Move	O
accumulator	B-General_Concept
to	O
the	O
operand	O
.	O
</s>
<s>
The	O
instruction	O
modifies	O
the	O
C	B-Language
bit	O
only	O
,	O
to	O
the	O
borrow	O
that	O
results	O
from	O
.	O
</s>
<s>
The	O
(	O
short	O
jump	O
)	O
opcode	O
takes	O
a	O
signed	O
relative	O
offset	O
byte	B-Application
operand	O
and	O
transfers	O
control	O
there	O
relative	O
to	O
the	O
address	O
of	O
the	O
following	O
instruction	O
.	O
</s>
<s>
The	O
/	O
opcodes	O
combine	O
the	O
three	O
most	O
significant	O
bits	O
of	O
the	O
opcode	O
byte	B-Application
with	O
the	O
following	O
byte	B-Application
to	O
specify	O
an	O
11-bit	O
destination	O
that	O
is	O
used	O
to	O
replace	O
11	O
bottom	O
bits	O
of	O
the	O
PC	O
register	B-General_Concept
(	O
top	O
5	O
bits	O
of	O
PC	O
register	B-General_Concept
remain	O
intact	O
)	O
.	O
</s>
<s>
For	O
larger	O
addresses	O
,	O
the	O
and	O
instructions	O
allow	O
a	O
16-bit	B-Device
destination	O
.	O
</s>
<s>
One	O
of	O
the	O
reasons	O
for	O
the	O
8051	B-Architecture
's	O
popularity	O
is	O
its	O
range	O
of	O
operations	O
on	O
single	O
bits	O
.	O
</s>
<s>
Bits	O
are	O
always	O
specified	O
by	O
absolute	O
addresses	O
;	O
there	O
is	O
no	O
register-indirect	O
or	O
indexed	O
addressing	O
.	O
</s>
<s>
Because	O
the	O
carry	B-Algorithm
flag	I-Algorithm
is	O
bit	O
7	O
of	O
the	O
bit-addressable	O
program	O
status	O
word	O
,	O
the	O
,	O
and	O
instructions	O
are	O
shorter	O
equivalents	O
to	O
,	O
and	O
.	O
</s>
<s>
Although	O
most	O
instructions	O
require	O
that	O
one	O
operand	O
is	O
the	O
accumulator	B-General_Concept
or	O
an	O
immediate	O
constant	O
,	O
opcode	O
0x85	O
performs	O
directly	O
between	O
two	O
internal	B-General_Concept
RAM	I-General_Concept
locations	O
.	O
</s>
<s>
There	O
are	O
various	O
high-level	B-Language
programming	I-Language
language	I-Language
compilers	O
for	O
the	O
8051	B-Architecture
.	O
</s>
<s>
Several	O
C	B-Language
compilers	O
are	O
available	O
for	O
the	O
8051	B-Architecture
,	O
most	O
of	O
which	O
allow	O
the	O
programmer	O
to	O
specify	O
where	O
each	O
variable	O
should	O
be	O
stored	O
in	O
its	O
six	O
types	O
of	O
memory	O
,	O
and	O
provide	O
access	O
to	O
8051	B-Architecture
specific	O
hardware	O
features	O
such	O
as	O
the	O
multiple	O
register	B-General_Concept
banks	O
and	O
bit	O
manipulation	O
instructions	O
.	O
</s>
<s>
There	O
are	O
many	O
commercial	O
C	B-Language
compilers	O
.	O
</s>
<s>
Small	B-Application
Device	I-Application
C	I-Application
Compiler	I-Application
(	O
SDCC	O
)	O
is	O
a	O
popular	O
open	O
source	O
C	B-Language
compiler	O
.	O
</s>
<s>
Other	O
high	B-Language
level	I-Language
languages	I-Language
such	O
as	O
C++	B-Language
,	O
Forth	B-Application
,	O
</s>
<s>
BASIC	O
,	O
Object	B-Language
Pascal	I-Language
,	O
Pascal	B-Application
,	O
PL/M	B-Language
and	O
Modula-2	B-Language
are	O
available	O
for	O
the	O
8051	B-Architecture
,	O
but	O
they	O
are	O
less	O
widely	O
used	O
than	O
C	B-Language
and	O
assembly	B-Language
.	O
</s>
<s>
Because	O
IRAM	O
,	O
XRAM	O
,	O
and	O
PMEM	O
(	O
read	O
only	O
)	O
all	O
have	O
an	O
address	O
0	O
,	O
C	B-Language
compilers	O
for	O
the	O
8051	B-Architecture
architecture	O
provide	O
compiler-specific	O
pragmas	O
or	O
other	O
extensions	O
to	O
indicate	O
where	O
a	O
particular	O
piece	O
of	O
data	O
should	O
be	O
stored	O
(	O
i.e.	O
</s>
<s>
Intel	O
discontinued	O
its	O
MCS-51	B-Architecture
product	O
line	O
in	O
March	O
2007	O
;	O
however	O
,	O
there	O
are	O
plenty	O
of	O
enhanced	O
8051	B-Architecture
products	O
or	O
silicon	O
intellectual	O
property	O
added	O
regularly	O
from	O
other	O
vendors	O
.	O
</s>
<s>
The	O
8051	B-Architecture
's	O
predecessor	O
,	O
the	O
8048	B-Device
,	O
was	O
used	O
in	O
the	O
keyboard	O
of	O
the	O
first	O
IBM	B-Device
PC	I-Device
,	O
where	O
it	O
converted	O
keypresses	O
into	O
the	O
serial	O
data	O
stream	O
which	O
is	O
sent	O
to	O
the	O
main	O
unit	O
of	O
the	O
computer	O
.	O
</s>
<s>
An	O
Intel	B-Device
8049	I-Device
served	O
a	O
similar	O
role	O
in	O
the	O
Sinclair	B-Device
QL	I-Device
.	O
</s>
<s>
The	O
8048	B-Device
and	O
derivatives	O
are	O
still	O
used	O
for	O
basic	O
model	O
keyboards	O
.	O
</s>
<s>
The	O
8031	B-Architecture
was	O
a	O
reduced	O
version	O
of	O
the	O
original	O
8051	B-Architecture
that	O
had	O
no	O
internal	O
program	B-Device
memory	I-Device
(	O
read-only	B-Device
memory	I-Device
,	O
ROM	B-Device
)	O
.	O
</s>
<s>
To	O
use	O
this	O
chip	O
,	O
external	O
ROM	B-Device
had	O
to	O
be	O
added	O
containing	O
the	O
program	O
that	O
the	O
8031	B-Architecture
would	O
fetch	O
and	O
execute	O
.	O
</s>
<s>
An	O
8051	B-Architecture
chip	O
could	O
be	O
sold	O
as	O
a	O
ROM-less	O
8031	B-Architecture
,	O
as	O
the	O
8051	B-Architecture
's	O
internal	O
ROM	B-Device
is	O
disabled	O
by	O
the	O
normal	O
state	O
of	O
the	O
EA	O
pin	O
in	O
an	O
8031-based	O
design	O
.	O
</s>
<s>
A	O
vendor	O
might	O
sell	O
an	O
8051	B-Architecture
as	O
an	O
8031	B-Architecture
for	O
any	O
number	O
of	O
reasons	O
,	O
such	O
as	O
faulty	O
code	O
in	O
the	O
8051	B-Architecture
's	O
ROM	B-Device
,	O
or	O
simply	O
an	O
oversupply	O
of	O
8051s	B-Architecture
and	O
undersupply	O
of	O
8031s	B-Architecture
.	O
</s>
<s>
The	O
8052	B-Architecture
was	O
an	O
enhanced	O
version	O
of	O
the	O
original	O
8051	B-Architecture
that	O
featured	O
256bytes	O
of	O
internal	B-General_Concept
RAM	I-General_Concept
instead	O
of	O
128bytes	O
,	O
8KB	O
of	O
ROM	B-Device
instead	O
of	O
4KB	O
,	O
and	O
a	O
third	O
16-bit	B-Device
timer	O
.	O
</s>
<s>
Most	O
modern	O
8051-compatible	O
microcontrollers	B-Architecture
include	O
these	O
features	O
.	O
</s>
<s>
The	O
8032	B-Architecture
had	O
these	O
same	O
features	O
as	O
the	O
8052	B-Architecture
except	O
lacked	O
internal	O
ROM	B-Device
program	B-Device
memory	I-Device
.	O
</s>
<s>
The	O
8751	B-Architecture
was	O
an	O
8051	B-Architecture
with	O
4KB	O
EPROM	B-General_Concept
instead	O
of	O
4KB	O
ROM	B-Device
.	O
</s>
<s>
This	O
part	O
was	O
available	O
in	O
a	O
ceramic	O
package	B-Algorithm
with	O
a	O
clear	O
quartz	B-General_Concept
window	O
over	O
the	O
top	O
of	O
the	O
die	O
so	O
UV	O
light	O
could	O
be	O
used	O
to	O
erase	O
the	O
EPROM	B-General_Concept
.	O
</s>
<s>
Related	O
parts	O
are	O
:	O
8752	B-Architecture
had	O
8KB	O
EPROM	B-General_Concept
,	O
8754	O
had	O
16KB	O
EPROM	B-General_Concept
,	O
8758	O
had	O
32KB	O
EPROM	B-General_Concept
.	O
</s>
<s>
The	O
80C537	B-Architecture
(	O
ROM-less	O
)	O
and	O
80C517	O
(	O
8	O
KB	O
ROM	B-Device
)	O
are	O
CMOS	B-Device
versions	O
,	O
designed	O
for	O
the	O
automotive	O
industry	O
.	O
</s>
<s>
More	O
than	O
20	O
independent	O
manufacturers	O
produce	O
MCS-51	B-Architecture
compatible	O
processors	O
.	O
</s>
<s>
Other	O
ICs	O
or	O
IPs	O
compatible	O
with	O
the	O
MCS-51	B-Architecture
have	O
been	O
developed	O
by	O
Analog	O
Devices	O
,	O
</s>
<s>
Today	O
,	O
8051s	B-Architecture
are	O
still	O
available	O
as	O
discrete	O
parts	O
,	O
but	O
they	O
are	O
mostly	O
used	O
as	O
silicon	O
intellectual	O
property	O
cores	O
.	O
</s>
<s>
Available	O
in	O
hardware	O
description	O
language	O
source	O
code	O
(	O
such	O
as	O
VHDL	B-Language
or	O
Verilog	B-Language
)	O
or	O
FPGA	B-Architecture
netlist	O
forms	O
,	O
these	O
cores	O
are	O
typically	O
integrated	O
within	O
embedded	B-Architecture
systems	I-Architecture
,	O
in	O
products	O
ranging	O
from	O
USB	B-Protocol
flash	O
drives	O
to	O
washing	O
machines	O
to	O
complex	O
wireless	O
communication	O
systems	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
.	O
</s>
<s>
Designers	O
use	O
8051	B-Architecture
silicon	O
IP	B-Architecture
cores	I-Architecture
,	O
because	O
of	O
the	O
smaller	O
size	O
,	O
and	O
lower	O
power	O
,	O
compared	O
to	O
32-bit	O
processors	O
like	O
ARM	O
Cortex-M	O
series	O
,	O
MIPS	B-Device
and	O
BA22	O
.	O
</s>
<s>
Modern	O
8051	B-Architecture
cores	O
are	O
faster	O
than	O
earlier	O
packaged	O
versions	O
.	O
</s>
<s>
Design	O
improvements	O
have	O
increased	O
8051	B-Architecture
performance	O
while	O
retaining	O
compatibility	O
with	O
the	O
original	O
MCS	B-Architecture
51	I-Architecture
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
The	O
original	O
Intel	B-Architecture
8051	I-Architecture
ran	O
at	O
12	O
clock	O
cycles	O
per	O
machine	O
cycle	O
,	O
and	O
most	O
instructions	O
executed	O
in	O
one	O
or	O
two	O
machine	O
cycles	O
.	O
</s>
<s>
A	O
typical	O
maximum	O
clock	O
frequency	O
of	O
12MHz	O
meant	O
these	O
old	O
8051s	B-Architecture
could	O
execute	O
one	O
million	O
single-cycle	O
instructions	O
,	O
or	O
500,000	O
two-cycle	O
instructions	O
,	O
per	O
second	O
.	O
</s>
<s>
In	O
contrast	O
,	O
enhanced	O
8051	B-Architecture
silicon	O
IP	B-Architecture
cores	I-Architecture
now	O
run	O
at	O
one	O
clock	O
cycle	O
per	O
machine	O
cycle	O
,	O
and	O
have	O
clock	O
frequencies	O
of	O
up	O
to	O
450MHz	O
.	O
</s>
<s>
That	O
means	O
an	O
8051-compatible	O
processor	O
can	B-Protocol
now	O
execute	O
instructions	O
per	O
second	O
.	O
</s>
<s>
Microchip	O
(	O
formerly	O
Atmel	O
)	O
:	O
AT89C51	B-Device
,	I-Device
AT89S51	I-Device
,	O
AT83C5134	O
,	O
etc	O
.	O
</s>
<s>
Several	O
variants	O
with	O
an	O
additional	O
16-bit	B-Device
digital	B-Architecture
signal	I-Architecture
processor	I-Architecture
(	O
DSP	O
)	O
(	O
for	O
example	O
for	O
MP3	B-Application
or	O
Vorbis	B-Algorithm
coding/decoding	O
)	O
with	O
up	O
to	O
675	O
million	O
instructions	O
per	O
second	O
(	O
MIPS	B-Device
)	O
and	O
integrated	O
USB	B-Protocol
2.0	O
interface	O
or	O
as	O
intellectual	O
property	O
exist	O
.	O
</s>
<s>
In	O
1996	O
Intel	O
announced	O
the	O
MCS-151	O
family	O
,	O
an	O
up	O
to	O
6	O
times	O
faster	O
variant	O
,	O
that	O
's	O
fully	O
binary	O
and	O
instruction	B-General_Concept
set	I-General_Concept
compatible	O
with	O
8051	B-Architecture
.	O
</s>
<s>
Unlike	O
their	O
8051	B-Architecture
MCS-151	O
is	O
a	O
pipelined	O
CPU	O
,	O
with	O
16-bit	B-Device
internal	O
code	O
bus	O
and	O
is	O
6x	O
the	O
speed	O
.	O
</s>
<s>
The	O
MCS-151	O
family	O
was	O
also	O
discontinued	O
by	O
Intel	O
,	O
but	O
is	O
widely	O
available	O
in	O
binary	B-General_Concept
compatible	I-General_Concept
and	O
partly	O
enhanced	O
variants	O
.	O
</s>
<s>
The	O
80251	O
8/16/32	O
-bit	O
microcontroller	B-Architecture
with	O
16MB	O
(	O
24-bit	O
)	O
address-space	O
and	O
6	O
times	O
faster	O
instruction	O
cycle	O
was	O
introduced	O
by	O
Intel	O
in	O
1996	O
.	O
</s>
<s>
It	O
can	B-Protocol
perform	O
as	O
an	O
8-bit	O
8051	B-Architecture
,	O
has	O
24-bit	O
linear	B-General_Concept
addressing	I-General_Concept
,	O
an	O
8-bit	O
ALU	O
,	O
8-bit	O
instructions	O
,	O
16-bit	B-Device
instructions	O
,	O
a	O
limited	O
set	O
of	O
32-bit	O
instructions	O
,	O
16	O
8-bit	O
registers	B-General_Concept
,	O
16	O
16-bit	B-Device
registers	B-General_Concept
(	O
8	O
16-bit	B-Device
registers	B-General_Concept
which	O
do	O
not	O
share	O
space	O
with	O
any	O
8-bit	O
registers	B-General_Concept
,	O
and	O
8	O
16-bit	B-Device
registers	B-General_Concept
which	O
contain	O
2	O
8-bit	O
registers	B-General_Concept
per	O
16-bit	B-Device
register	B-General_Concept
)	O
,	O
and	O
10	O
32-bit	O
registers	B-General_Concept
(	O
2	O
dedicated	O
32-bit	O
registers	B-General_Concept
,	O
and	O
8	O
32-bit	O
registers	B-General_Concept
which	O
contain	O
2	O
16-bit	B-Device
registers	B-General_Concept
per	O
32-bit	O
register	B-General_Concept
)	O
.	O
</s>
<s>
The	O
MCS-251	O
family	O
was	O
also	O
discontinued	O
by	O
Intel	O
,	O
but	O
is	O
widely	O
available	O
in	O
binary	B-General_Concept
compatible	I-General_Concept
and	O
partly	O
enhanced	O
variants	O
from	O
many	O
manufacturers	O
.	O
</s>
