<s>
The	O
i486SX	B-Device
was	O
a	O
microprocessor	O
originally	O
released	O
by	O
Intel	O
in	O
1991	O
.	O
</s>
<s>
It	O
was	O
a	O
modified	O
Intel	O
i486DX	B-General_Concept
microprocessor	O
with	O
its	O
floating-point	B-General_Concept
unit	I-General_Concept
(	O
FPU	O
)	O
disabled	O
.	O
</s>
<s>
However	O
,	O
unlike	O
the	O
i386SX	O
,	O
which	O
had	O
a	O
16-bit	O
external	O
data	O
bus	O
and	O
a	O
24-bit	O
external	O
address	O
bus	O
(	O
compared	O
to	O
the	O
fully	O
32-bit	O
i386	B-General_Concept
,	O
its	O
higher-cost	O
counterpoint	O
)	O
,	O
the	O
i486SX	B-Device
was	O
entirely	O
32-bit	O
.	O
</s>
<s>
In	O
the	O
early	O
1990s	O
,	O
common	O
applications	O
,	O
such	O
as	O
word	O
processors	O
and	O
database	O
applications	O
,	O
did	O
not	O
need	O
or	O
benefit	O
from	O
a	O
floating-point	B-General_Concept
unit	I-General_Concept
,	O
such	O
as	O
that	O
included	O
in	O
the	O
i486	B-General_Concept
,	O
introduced	O
in	O
1989	O
.	O
</s>
<s>
Among	O
the	O
rare	O
exceptions	O
were	O
CAD	B-Application
applications	O
,	O
which	O
could	O
often	O
simulate	O
floating	O
point	O
operations	O
in	O
software	O
,	O
but	O
benefited	O
from	O
a	O
hardware	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
immensely	O
.	O
</s>
<s>
AMD	O
had	O
begun	O
manufacturing	O
its	O
i386DX	B-General_Concept
clone	O
,	O
the	O
Am386	B-Device
,	O
which	O
was	O
faster	O
than	O
Intel	O
's	O
.	O
</s>
<s>
To	O
respond	O
to	O
this	O
new	O
situation	O
,	O
Intel	O
wanted	O
to	O
provide	O
a	O
lower	O
cost	O
i486	B-General_Concept
CPU	O
for	O
system	O
integrators	O
,	O
but	O
without	O
sacrificing	O
the	O
better	O
profit	O
margins	O
of	O
a	O
full	O
i486	B-General_Concept
.	O
</s>
<s>
Intel	O
were	O
able	O
to	O
accomplish	O
this	O
with	O
the	O
i486SX	B-Device
,	O
the	O
first	O
revisions	O
of	O
which	O
were	O
practically	O
identical	O
to	O
the	O
i486	B-General_Concept
but	O
with	O
its	O
floating-point	B-General_Concept
unit	I-General_Concept
internally	O
wired	O
to	O
be	O
disabled	O
.	O
</s>
<s>
The	O
i486SX	B-Device
was	O
introduced	O
in	O
mid-1991	O
at	O
20	O
MHz	O
in	O
a	O
pin	B-Algorithm
grid	I-Algorithm
array	I-Algorithm
(	O
PGA	O
)	O
package	B-Algorithm
.	O
</s>
<s>
Later	O
versions	O
of	O
the	O
i486SX	B-Device
,	O
from	O
1992	O
onward	O
,	O
had	O
the	O
FPU	O
entirely	O
removed	O
for	O
cost-cutting	O
reasons	O
and	O
comes	O
in	O
surface-mount	O
packages	O
as	O
well	O
.	O
</s>
<s>
The	O
first	O
computer	O
system	O
to	O
ship	O
with	O
an	O
i486SX	B-Device
on	O
its	O
motherboard	O
from	O
the	O
factory	O
was	O
Advanced	O
Logic	O
Research	O
's	O
Business	O
VEISA	O
486/20SX	O
in	O
April	O
1991	O
.	O
</s>
<s>
Initial	O
reviews	O
of	O
the	O
i486SX	B-Device
chip	O
were	O
generally	O
poor	O
among	O
technology	O
publications	O
and	O
the	O
buying	O
public	O
,	O
who	O
deemed	O
it	O
an	O
example	O
of	O
crippleware	O
.	O
</s>
<s>
Many	O
systems	O
allowed	O
the	O
user	O
to	O
upgrade	O
the	O
i486SX	B-Device
to	O
a	O
CPU	O
with	O
the	O
FPU	O
enabled	O
.	O
</s>
<s>
The	O
upgrade	O
was	O
shipped	O
as	O
the	O
i487	O
,	O
which	O
was	O
a	O
full-blown	O
i486DX	B-General_Concept
chip	O
with	O
an	O
extra	O
pin	O
.	O
</s>
<s>
Although	O
i486SX	B-Device
devices	O
were	O
not	O
used	O
at	O
all	O
when	O
the	O
i487	O
was	O
installed	O
,	O
they	O
were	O
hard	O
to	O
remove	O
because	O
the	O
i486SX	B-Device
was	O
typically	O
installed	O
in	O
non-ZIF	O
sockets	O
or	O
in	O
a	O
plastic	O
package	B-Algorithm
that	O
was	O
surface	O
mounted	O
on	O
the	O
motherboard	O
.	O
</s>
