<s>
In	O
computing	O
,	O
an	O
input	B-General_Concept
–	I-General_Concept
output	I-General_Concept
memory	I-General_Concept
management	I-General_Concept
unit	I-General_Concept
(	O
IOMMU	B-General_Concept
)	O
is	O
a	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
(	O
MMU	O
)	O
connecting	O
a	O
direct-memory-access	B-General_Concept
–	O
capable	O
(	O
DMA-capable	O
)	O
I/O	B-General_Concept
bus	I-General_Concept
to	O
the	O
main	O
memory	O
.	O
</s>
<s>
Like	O
a	O
traditional	O
MMU	O
,	O
which	O
translates	O
CPU-visible	O
virtual	O
addresses	O
to	O
physical	O
addresses	O
,	O
the	O
IOMMU	B-General_Concept
maps	O
device-visible	O
virtual	O
addresses	O
(	O
also	O
called	O
device	O
addresses	O
or	O
memory	B-Architecture
mapped	I-Architecture
I/O	I-Architecture
addresses	O
in	O
this	O
context	O
)	O
to	O
physical	O
addresses	O
.	O
</s>
<s>
Some	O
units	O
also	O
provide	O
memory	B-General_Concept
protection	I-General_Concept
from	O
faulty	O
or	O
malicious	O
devices	O
.	O
</s>
<s>
An	O
example	O
IOMMU	B-General_Concept
is	O
the	O
graphics	B-General_Concept
address	I-General_Concept
remapping	I-General_Concept
table	I-General_Concept
(	O
GART	O
)	O
used	O
by	O
AGP	B-Architecture
and	O
PCI	O
Express	O
graphics	O
cards	O
on	O
Intel	O
Architecture	O
and	O
AMD	O
computers	O
.	O
</s>
<s>
On	O
the	O
x86	O
architecture	O
,	O
prior	O
to	O
splitting	O
the	O
functionality	O
of	O
northbridge	B-Device
and	O
southbridge	B-Device
between	O
the	O
CPU	B-General_Concept
and	O
Platform	B-Device
Controller	I-Device
Hub	I-Device
(	O
PCH	O
)	O
,	O
I/O	O
virtualization	B-General_Concept
was	O
not	O
performed	O
by	O
the	O
CPU	B-General_Concept
but	O
instead	O
by	O
the	O
chipset	B-Device
.	O
</s>
<s>
The	O
advantages	O
of	O
having	O
an	O
IOMMU	B-General_Concept
,	O
compared	O
to	O
direct	O
physical	O
addressing	O
of	O
the	O
memory	O
(	O
DMA	O
)	O
,	O
include	O
:	O
</s>
<s>
Large	O
regions	O
of	O
memory	O
can	O
be	O
allocated	O
without	O
the	O
need	O
to	O
be	O
contiguous	O
in	O
physical	O
memory	O
the	O
IOMMU	B-General_Concept
maps	O
contiguous	O
virtual	O
addresses	O
to	O
the	O
underlying	O
fragmented	O
physical	O
addresses	O
.	O
</s>
<s>
Thus	O
,	O
the	O
use	O
of	O
vectored	B-General_Concept
I/O	I-General_Concept
(	O
scatter-gather	B-General_Concept
lists	O
)	O
can	O
sometimes	O
be	O
avoided	O
.	O
</s>
<s>
Devices	O
that	O
do	O
not	O
support	O
memory	O
addresses	O
long	O
enough	O
to	O
address	O
the	O
entire	O
physical	O
memory	O
can	O
still	O
address	O
the	O
entire	O
memory	O
through	O
the	O
IOMMU	B-General_Concept
,	O
avoiding	O
overheads	O
associated	O
with	O
copying	O
buffers	O
to	O
and	O
from	O
the	O
peripheral	O
's	O
addressable	O
memory	O
space	O
.	O
</s>
<s>
For	O
example	O
,	O
x86	O
computers	O
can	O
address	O
more	O
than	O
4	O
gigabytes	O
of	O
memory	O
with	O
the	O
Physical	B-General_Concept
Address	I-General_Concept
Extension	I-General_Concept
(	O
PAE	O
)	O
feature	O
in	O
an	O
x86	O
processor	O
.	O
</s>
<s>
Without	O
an	O
IOMMU	B-General_Concept
,	O
the	O
operating	O
system	O
would	O
have	O
to	O
implement	O
time-consuming	O
bounce	O
buffers	O
(	O
also	O
known	O
as	O
double	O
buffers	O
)	O
.	O
</s>
<s>
The	O
memory	B-General_Concept
protection	I-General_Concept
is	O
based	O
on	O
the	O
fact	O
that	O
OS	O
running	O
on	O
the	O
CPU	B-General_Concept
(	O
see	O
figure	O
)	O
exclusively	O
controls	O
both	O
the	O
MMU	O
and	O
the	O
IOMMU	B-General_Concept
.	O
</s>
<s>
In	O
virtualization	B-General_Concept
,	O
guest	O
operating	O
systems	O
can	O
use	O
hardware	O
that	O
is	O
not	O
specifically	O
made	O
for	O
virtualization	B-General_Concept
.	O
</s>
<s>
Higher	O
performance	O
hardware	O
such	O
as	O
graphics	O
cards	O
use	O
DMA	O
to	O
access	O
memory	O
directly	O
;	O
in	O
a	O
virtual	O
environment	O
all	O
memory	O
addresses	O
are	O
re-mapped	O
by	O
the	O
virtual	B-Architecture
machine	I-Architecture
software	O
,	O
which	O
causes	O
DMA	O
devices	O
to	O
fail	O
.	O
</s>
<s>
The	O
IOMMU	B-General_Concept
handles	O
this	O
re-mapping	O
,	O
allowing	O
the	O
native	O
device	O
drivers	O
to	O
be	O
used	O
in	O
a	O
guest	O
operating	O
system	O
.	O
</s>
<s>
In	O
some	O
architectures	O
IOMMU	B-General_Concept
also	O
performs	O
hardware	O
interrupt	O
re-mapping	O
,	O
in	O
a	O
manner	O
similar	O
to	O
standard	O
memory	O
address	O
re-mapping	O
.	O
</s>
<s>
Peripheral	O
memory	O
paging	O
can	O
be	O
supported	O
by	O
an	O
IOMMU	B-General_Concept
.	O
</s>
<s>
For	O
system	O
architectures	O
in	O
which	O
port	B-Architecture
I/O	I-Architecture
is	O
a	O
distinct	O
address	O
space	O
from	O
the	O
memory	O
address	O
space	O
,	O
an	O
IOMMU	B-General_Concept
is	O
not	O
used	O
when	O
the	O
CPU	B-General_Concept
communicates	O
with	O
devices	O
via	O
I/O	B-Architecture
ports	I-Architecture
.	O
</s>
<s>
In	O
system	O
architectures	O
in	O
which	O
port	B-Architecture
I/O	I-Architecture
and	O
memory	O
are	O
mapped	O
into	O
a	O
suitable	O
address	O
space	O
,	O
an	O
IOMMU	B-General_Concept
can	O
translate	O
port	B-Architecture
I/O	I-Architecture
accesses	O
.	O
</s>
<s>
The	O
disadvantages	O
of	O
having	O
an	O
IOMMU	B-General_Concept
,	O
compared	O
to	O
direct	O
physical	O
addressing	O
of	O
the	O
memory	O
,	O
include	O
:	O
</s>
<s>
Some	O
degradation	O
of	O
performance	O
from	O
translation	O
and	O
management	O
overhead	O
(	O
e.g.	O
,	O
page	B-General_Concept
table	I-General_Concept
walks	O
)	O
.	O
</s>
<s>
In	O
order	O
to	O
decrease	O
the	O
page	B-General_Concept
table	I-General_Concept
size	O
the	O
granularity	O
of	O
many	O
IOMMUs	B-General_Concept
is	O
equal	O
to	O
the	O
memory	O
paging	O
(	O
often	O
4096	O
bytes	O
)	O
,	O
and	O
hence	O
each	O
small	O
buffer	O
that	O
needs	O
protection	O
against	O
DMA	O
attack	O
has	O
to	O
be	O
page	O
aligned	O
and	O
zeroed	O
before	O
making	O
visible	O
to	O
the	O
device	O
.	O
</s>
<s>
When	O
an	O
operating	O
system	O
is	O
running	O
inside	O
a	O
virtual	B-Architecture
machine	I-Architecture
,	O
including	O
systems	O
that	O
use	O
paravirtualization	O
,	O
such	O
as	O
Xen	B-Operating_System
and	O
KVM	B-Application
,	O
it	O
does	O
not	O
usually	O
know	O
the	O
host-physical	O
addresses	O
of	O
memory	O
that	O
it	O
accesses	O
.	O
</s>
<s>
This	O
makes	O
providing	O
direct	O
access	O
to	O
the	O
computer	O
hardware	O
difficult	O
,	O
because	O
if	O
the	O
guest	O
OS	O
tried	O
to	O
instruct	O
the	O
hardware	O
to	O
perform	O
a	O
direct	B-General_Concept
memory	I-General_Concept
access	I-General_Concept
(	O
DMA	O
)	O
using	O
guest-physical	O
addresses	O
,	O
it	O
would	O
likely	O
corrupt	O
the	O
memory	O
,	O
as	O
the	O
hardware	O
does	O
not	O
know	O
about	O
the	O
mapping	O
between	O
the	O
guest-physical	O
and	O
host-physical	O
addresses	O
for	O
the	O
given	O
virtual	B-Architecture
machine	I-Architecture
.	O
</s>
<s>
An	O
IOMMU	B-General_Concept
solves	O
this	O
problem	O
by	O
re-mapping	O
the	O
addresses	O
accessed	O
by	O
the	O
hardware	O
according	O
to	O
the	O
same	O
(	O
or	O
a	O
compatible	O
)	O
translation	O
table	O
that	O
is	O
used	O
to	O
map	O
guest-physical	O
address	O
to	O
host-physical	O
addresses	O
.	O
</s>
<s>
AMD	O
has	O
published	O
a	O
specification	O
for	O
IOMMU	B-General_Concept
technology	O
,	O
called	O
AMD-Vi	O
.	O
</s>
<s>
IBM	O
offered	O
Extended	O
Control	O
Program	O
Support	O
:	O
Virtual	O
Storage	O
Extended	O
(	O
ECPS:VSE	O
)	O
mode	O
on	O
its	O
43xx	B-Device
line	O
;	O
channel	O
programs	O
used	O
virtual	O
addresses	O
.	O
</s>
<s>
Intel	O
has	O
published	O
a	O
specification	O
for	O
IOMMU	B-General_Concept
technology	O
as	O
Virtualization	B-General_Concept
Technology	O
for	O
Directed	O
I/O	O
,	O
abbreviated	O
VT-d	O
.	O
</s>
<s>
Information	O
about	O
the	O
Sun	O
IOMMU	B-General_Concept
has	O
been	O
published	O
in	O
the	O
Device	O
Virtual	O
Memory	O
Access	O
(	O
DVMA	O
)	O
section	O
of	O
the	O
Solaris	O
Developer	O
Connection	O
.	O
</s>
<s>
The	O
IBM	O
Translation	O
Control	O
Entry	O
(	O
TCE	O
)	O
has	O
been	O
described	O
in	O
a	O
document	O
entitled	O
Logical	O
Partition	O
Security	O
in	O
the	O
IBM	B-Application
eServer	I-Application
pSeries	O
690	O
.	O
</s>
<s>
The	O
PCI-SIG	O
has	O
relevant	O
work	O
under	O
the	O
terms	O
Single	O
Root	O
I/O	O
Virtualization	B-General_Concept
(	O
SR-IOV	O
)	O
and	O
Address	O
Translation	O
Services	O
(	O
ATS	O
)	O
.	O
</s>
<s>
ARM	B-Architecture
defines	O
its	O
version	O
of	O
IOMMU	B-General_Concept
as	O
System	B-General_Concept
Memory	I-General_Concept
Management	I-General_Concept
Unit	I-General_Concept
(	O
SMMU	O
)	O
to	O
complement	O
its	O
Virtualization	B-General_Concept
architecture	O
.	O
</s>
