<s>
Impulse	B-Language
C	I-Language
is	O
a	O
subset	O
of	O
the	O
C	B-Language
programming	I-Language
language	I-Language
combined	O
with	O
a	O
C-compatible	O
function	B-Library
library	I-Library
supporting	O
parallel	B-Operating_System
programming	I-Operating_System
,	O
in	O
particular	O
for	O
programming	O
of	O
applications	O
targeting	O
FPGA	B-Architecture
devices	O
.	O
</s>
<s>
The	O
High-level	B-General_Concept
synthesis	I-General_Concept
tool	O
CoDeveloper	O
includes	O
an	O
Impulse	B-Language
C	I-Language
compiler	B-Language
and	O
related	O
function	B-Library
library	I-Library
intended	O
for	O
development	O
of	O
FPGA-based	O
applications	O
.	O
</s>
<s>
Impulse	B-Language
C	I-Language
is	O
compatible	O
with	O
standard	O
ANSI	O
C	B-Language
,	O
allowing	O
standard	O
C	B-Language
tools	O
to	O
be	O
used	O
for	O
designing	O
and	O
debugging	O
applications	O
targeting	O
FPGAs	B-Architecture
.	O
</s>
<s>
The	O
Impulse	B-Language
C	I-Language
compiler	B-Language
accepts	O
a	O
subset	O
of	O
C	B-Language
and	O
generates	O
FPGA	B-Architecture
hardware	O
in	O
the	O
form	O
of	O
Hardware	O
Description	O
Language	O
(	O
HDL	O
)	O
files	O
.	O
</s>
<s>
Impulse	B-Language
C	I-Language
allows	O
embedded	B-Architecture
systems	I-Architecture
designers	O
and	O
software	O
programmers	O
to	O
target	O
FPGA	B-Architecture
devices	O
for	O
C-language	O
application	O
acceleration	O
.	O
</s>
<s>
Impulse	B-Language
C	I-Language
is	O
distinct	O
from	O
standard	O
C	B-Language
in	O
that	O
it	O
provides	O
a	O
parallel	B-Operating_System
programming	I-Operating_System
model	O
for	O
mixed	O
processor	O
and	O
FPGA	B-Architecture
platforms	O
.	O
</s>
<s>
For	O
this	O
purpose	O
,	O
Impulse	B-Language
C	I-Language
includes	O
extensions	O
to	O
C	B-Language
,	O
in	O
the	O
form	O
of	O
functions	O
and	O
datatypes	O
,	O
allowing	O
applications	O
written	O
in	O
standard	O
C	B-Language
to	O
be	O
mapped	O
onto	O
coarse-grained	O
parallel	B-Operating_System
architectures	I-Operating_System
that	O
may	O
include	O
standard	O
processors	O
along	O
with	O
programmable	O
FPGA	B-Architecture
hardware	O
.	O
</s>
<s>
The	O
Impulse	B-Language
C	I-Language
tools	O
include	O
hardware/software	O
co-simulation	O
tools	O
as	O
well	O
as	O
C-to-RTL	O
scheduling/optimizing	O
technology	O
used	O
to	O
map	O
application	O
elements	O
to	O
hardware	O
via	O
FPGA	B-Architecture
logic	O
synthesis	O
tools	O
.	O
</s>
<s>
Impulse	B-Language
C	I-Language
supports	O
a	O
variant	O
of	O
the	O
communicating	O
sequential	O
processes	O
(	O
CSP	O
)	O
programming	O
model	O
,	O
while	O
remaining	O
compatible	O
with	O
standard	O
C	B-Language
tools	O
such	O
as	O
debuggers	O
and	O
profilers	O
.	O
</s>
<s>
Impulse	B-Language
C	I-Language
is	O
designed	O
for	O
dataflow-oriented	O
,	O
streaming	O
applications	O
,	O
but	O
is	O
also	O
designed	O
to	O
support	O
alternate	O
programming	O
models	O
including	O
the	O
use	O
of	O
shared	O
memory	O
as	O
a	O
communication	O
mechanism	O
.	O
</s>
<s>
In	O
an	O
Impulse	B-Language
C	I-Language
streaming	O
application	O
,	O
hardware	O
and	O
software	O
processes	O
communicate	O
primarily	O
through	O
buffered	O
data	O
streams	O
that	O
are	O
implemented	O
directly	O
in	O
hardware	O
.	O
</s>
<s>
This	O
buffering	O
of	O
data	O
,	O
which	O
is	O
implemented	O
using	O
dual-clock	O
FIFOs	B-Operating_System
generated	O
by	O
the	O
compiler	B-Language
,	O
makes	O
it	O
possible	O
to	O
write	O
parallel	O
applications	O
at	O
a	O
relatively	O
high	O
level	O
of	O
abstraction	O
,	O
without	O
the	O
cycle-by-cycle	O
synchronization	O
that	O
would	O
otherwise	O
be	O
required	O
.	O
</s>
<s>
Using	O
Impulse	B-Language
C	I-Language
,	O
an	O
application	O
can	O
be	O
partitioned	O
to	O
create	O
a	O
multiple-process	O
implementation	O
that	O
is	O
partitioned	O
into	O
hardware	O
and	O
software	O
components	O
,	O
or	O
implemented	O
entirely	O
within	O
an	O
FPGA	B-Architecture
device	O
.	O
</s>
<s>
For	O
example	O
,	O
an	O
image	O
filtering	O
application	O
could	O
be	O
described	O
using	O
Impulse	B-Language
C	I-Language
as	O
a	O
collection	O
of	O
parallel	O
,	O
pipelined	O
processes	O
,	O
each	O
of	O
which	O
has	O
been	O
described	O
using	O
one	O
or	O
more	O
C	B-Language
subroutines	O
.	O
</s>
<s>
On	O
the	O
software	O
side	O
of	O
the	O
application	O
,	O
for	O
example	O
in	O
an	O
embedded	O
FPGA	B-Architecture
processor	O
,	O
Impulse	B-Language
C	I-Language
library	B-Library
functions	I-Library
are	O
used	O
to	O
open	O
and	O
close	O
data	O
streams	O
,	O
read	O
or	O
write	O
data	O
on	O
the	O
streams	O
and	O
,	O
if	O
desired	O
,	O
send	O
status	O
messages	O
or	O
poll	O
for	O
results	O
.	O
</s>
<s>
For	O
processor-to-FPGA	O
communications	O
,	O
stream	O
reads	O
and	O
writes	O
can	O
be	O
specified	O
as	O
operations	O
that	O
take	O
advantage	O
of	O
FPGA-specific	O
,	O
internal	O
or	O
external	O
bus	O
interfaces	O
.	O
</s>
<s>
On	O
the	O
hardware	O
side	O
of	O
the	O
application	O
,	O
Impulse	B-Language
C	I-Language
library	B-Library
functions	I-Library
and	O
other	O
C	B-Language
statements	O
are	O
compiled	B-Language
to	O
generate	O
equivalent	O
,	O
parallel	O
hardware	O
implementations	O
in	O
the	O
form	O
of	O
synthesizable	O
HDL	O
files	O
.	O
</s>
<s>
These	O
files	O
are	O
processed	O
by	O
FPGA	B-Architecture
tools	O
to	O
create	O
FPGA	B-Architecture
hardware	O
bitmaps	O
.	O
</s>
<s>
At	O
the	O
heart	O
of	O
the	O
Impulse	B-Language
C	I-Language
streaming	O
programming	O
model	O
are	O
processes	O
and	O
streams	O
.	O
</s>
<s>
Hardware	O
processes	O
are	O
written	O
using	O
a	O
subset	O
of	O
standard	O
C	B-Language
and	O
perform	O
the	O
work	O
of	O
an	O
application	O
by	O
accepting	O
data	O
,	O
performing	O
computations	O
and	O
generating	O
outputs	O
.	O
</s>
<s>
The	O
characteristics	O
of	O
each	O
stream	O
,	O
including	O
the	O
width	O
and	O
depth	O
of	O
the	O
generated	O
FIFOs	B-Operating_System
,	O
may	O
be	O
specified	O
in	O
the	O
C	B-Language
application	O
.	O
</s>
<s>
Impulse	B-Language
C	I-Language
is	O
used	O
for	O
applications	O
including	O
image	B-Algorithm
processing	I-Algorithm
and	O
digital	B-General_Concept
signal	I-General_Concept
processing	I-General_Concept
on	O
embedded	B-Architecture
systems	I-Architecture
,	O
as	O
well	O
as	O
for	O
acceleration	O
of	O
high-performance	O
computing	O
applications	O
including	O
financial	O
analytics	O
,	O
bioinformatics	O
and	O
scientific	O
computing	O
.	O
</s>
<s>
Impulse	B-Language
C	I-Language
supports	O
FPGAs	B-Architecture
from	O
Xilinx	O
and	O
Altera	O
,	O
including	O
their	O
available	O
soft	O
-	O
and	O
hard-core	O
processors	O
the	O
Altera	O
Nios	B-Device
II	I-Device
and	O
Xilinx	O
's	O
MicroBlaze	B-Device
and	O
PowerPC	B-Architecture
.	O
</s>
