<s>
In	O
computer	B-General_Concept
science	I-General_Concept
,	O
I/O	B-General_Concept
bound	I-General_Concept
refers	O
to	O
a	O
condition	O
in	O
which	O
the	O
time	O
it	O
takes	O
to	O
complete	O
a	O
computation	O
is	O
determined	O
principally	O
by	O
the	O
period	O
spent	O
waiting	O
for	O
input/output	B-General_Concept
operations	O
to	O
be	O
completed	O
.	O
</s>
<s>
This	O
is	O
the	O
opposite	O
of	O
a	O
task	O
being	O
CPU	B-General_Concept
bound	O
.	O
</s>
<s>
The	O
I/O	B-General_Concept
bound	I-General_Concept
state	O
has	O
been	O
identified	O
as	O
a	O
problem	O
in	O
computing	O
almost	O
since	O
its	O
inception	O
.	O
</s>
<s>
The	O
Von	B-Architecture
Neumann	I-Architecture
architecture	I-Architecture
,	O
which	O
is	O
employed	O
by	O
many	O
computing	O
devices	O
,	O
this	O
involves	O
multiple	O
possible	O
solutions	O
such	O
as	O
implementing	O
a	O
logically	O
separate	O
central	O
processor	O
unit	O
which	O
along	O
with	O
storing	O
the	O
instructions	O
of	O
the	O
program	O
also	O
retrieves	O
actual	O
data	O
usually	O
from	O
main	O
memory	O
and	O
makes	O
use	O
of	O
this	O
more	O
accessible	O
data	O
for	O
working	O
.	O
</s>
<s>
Since	O
data	O
must	O
be	O
moved	O
between	O
the	O
CPU	B-General_Concept
and	O
memory	O
along	O
a	O
bus	B-General_Concept
which	O
has	O
a	O
limited	O
data	O
transfer	O
rate	O
,	O
there	O
exists	O
a	O
condition	O
that	O
is	O
known	O
as	O
the	O
Von	O
Neumann	O
bottleneck	O
.	O
</s>
<s>
Put	O
simply	O
,	O
this	O
means	O
that	O
the	O
data	O
bandwidth	O
between	O
the	O
CPU	B-General_Concept
and	O
memory	O
tends	O
to	O
limit	O
the	O
overall	O
speed	O
of	O
computation	O
.	O
</s>
<s>
In	O
terms	O
of	O
the	O
actual	O
technology	O
that	O
makes	O
up	O
a	O
computer	O
,	O
the	O
Von	O
Neumann	O
Bottleneck	O
predicts	O
that	O
it	O
is	O
easier	O
to	O
make	O
the	O
CPU	B-General_Concept
perform	O
calculations	O
faster	O
than	O
it	O
is	O
to	O
supply	O
it	O
with	O
data	O
at	O
the	O
necessary	O
rate	O
for	O
this	O
to	O
be	O
possible	O
.	O
</s>
<s>
The	O
design	O
philosophy	O
of	O
modern	O
computers	O
is	O
based	O
upon	O
a	O
physically	O
separate	O
CPU	B-General_Concept
and	O
main	O
memory	O
.	O
</s>
<s>
It	O
is	O
possible	O
to	O
make	O
the	O
CPU	B-General_Concept
run	O
at	O
a	O
high	O
data	O
transfer	O
rate	O
because	O
data	O
is	O
moved	O
between	O
locations	O
inside	O
them	O
across	O
tiny	O
distances	O
.	O
</s>
<s>
The	O
problem	O
of	O
making	O
this	O
part	O
of	O
the	O
system	O
operate	O
sufficiently	O
fast	O
to	O
keep	O
up	O
with	O
the	O
CPU	B-General_Concept
has	O
been	O
a	O
great	O
challenge	O
to	O
designers	O
.	O
</s>
<s>
The	O
I/O	B-General_Concept
bound	I-General_Concept
state	O
is	O
considered	O
undesirable	O
because	O
it	O
means	O
that	O
the	O
CPU	B-General_Concept
must	O
stall	O
its	O
operation	O
while	O
waiting	O
for	O
data	O
to	O
be	O
loaded	O
or	O
unloaded	O
from	O
main	O
memory	O
or	O
secondary	O
storage	O
.	O
</s>
<s>
With	O
faster	O
computation	O
speed	O
being	O
the	O
primary	O
goal	O
of	O
new	O
computer	O
designs	O
and	O
components	O
such	O
as	O
the	O
CPU	B-General_Concept
and	O
memory	O
being	O
expensive	O
,	O
there	O
is	O
a	O
strong	O
imperative	O
to	O
avoid	O
I/O	B-General_Concept
bound	I-General_Concept
states	O
and	O
eliminating	O
them	O
can	O
yield	O
a	O
more	O
economic	O
improvement	O
in	O
performance	O
than	O
upgrading	O
the	O
CPU	B-General_Concept
or	O
memory	O
.	O
</s>
<s>
As	O
CPU	B-General_Concept
gets	O
faster	O
,	O
processes	O
tend	O
to	O
not	O
increase	O
in	O
speed	O
in	O
proportion	O
to	O
CPU	B-General_Concept
speed	O
because	O
they	O
get	O
more	O
I/O	B-General_Concept
-bound	I-General_Concept
.	O
</s>
<s>
This	O
means	O
that	O
I/O	B-General_Concept
bound	I-General_Concept
processes	O
are	O
slower	O
than	O
non-I/O	O
bound	O
processes	O
,	O
not	O
faster	O
.	O
</s>
<s>
As	O
CPU	B-General_Concept
clock	O
speed	O
increases	O
,	O
allowing	O
more	O
instructions	O
to	O
be	O
executed	O
in	O
a	O
given	O
time	O
window	O
,	O
the	O
limiting	O
factor	O
of	O
effective	O
execution	O
is	O
the	O
rate	O
at	O
which	O
instructions	O
can	O
be	O
delivered	O
to	O
the	O
processor	O
from	O
storage	O
,	O
and	O
sent	O
from	O
the	O
processor	O
to	O
their	O
destination	O
.	O
</s>
<s>
In	O
short	O
,	O
programs	O
naturally	O
shift	O
to	O
being	O
more	O
and	O
more	O
I/O	B-General_Concept
bound	I-General_Concept
.	O
</s>
<s>
Assume	O
we	O
have	O
one	O
CPU-bound	O
process	O
and	O
many	O
I/O	B-General_Concept
-bound	I-General_Concept
processes	O
.	O
</s>
<s>
The	O
CPU-bound	O
process	O
will	O
get	O
and	O
hold	O
the	O
CPU	B-General_Concept
.	O
</s>
<s>
During	O
this	O
time	O
,	O
all	O
the	O
other	O
processes	O
will	O
finish	O
their	O
I/O	B-General_Concept
and	O
will	O
move	O
into	O
the	O
ready	O
queue	O
,	O
waiting	O
for	O
the	O
CPU	B-General_Concept
.	O
</s>
<s>
While	O
the	O
processes	O
wait	O
in	O
the	O
ready	O
queue	O
,	O
the	O
I/O	B-General_Concept
devices	I-General_Concept
are	O
idle	O
.	O
</s>
<s>
Eventually	O
,	O
the	O
CPU-bound	O
process	O
finishes	O
its	O
CPU	B-General_Concept
burst	O
and	O
moves	O
to	O
an	O
I/O	B-General_Concept
device	I-General_Concept
.	O
</s>
<s>
All	O
the	O
I/O	B-General_Concept
-bound	I-General_Concept
processes	O
,	O
which	O
have	O
short	O
CPU	B-General_Concept
bursts	O
,	O
execute	O
quickly	O
and	O
move	O
back	O
to	O
the	O
I/O	B-General_Concept
queues	O
.	O
</s>
<s>
At	O
this	O
point	O
,	O
the	O
CPU	B-General_Concept
sits	O
idle	O
.	O
</s>
<s>
The	O
CPU-bound	O
process	O
will	O
then	O
move	O
back	O
to	O
the	O
ready	O
queue	O
and	O
be	O
allocated	O
the	O
CPU	B-General_Concept
.	O
</s>
<s>
Again	O
,	O
all	O
the	O
I/O	B-General_Concept
processes	O
end	O
up	O
waiting	O
in	O
the	O
ready	O
queue	O
until	O
the	O
CPU-bound	O
process	O
is	O
done	O
.	O
</s>
<s>
There	O
is	O
a	O
convoy	B-Operating_System
effect	I-Operating_System
as	O
all	O
the	O
other	O
processes	O
wait	O
for	O
the	O
one	O
big	O
process	O
to	O
get	O
off	O
the	O
CPU	B-General_Concept
.	O
</s>
<s>
This	O
effect	O
results	O
in	O
lower	O
CPU	B-General_Concept
and	O
device	O
utilization	O
than	O
might	O
be	O
possible	O
if	O
the	O
shorter	O
processes	O
were	O
allowed	O
to	O
go	O
first	O
.	O
</s>
