<s>
The	O
IXP1200	B-Device
is	O
a	O
network	B-General_Concept
processor	I-General_Concept
fabricated	O
by	O
Intel	O
Corporation	O
.	O
</s>
<s>
The	O
processor	O
was	O
later	O
succeeded	O
by	O
the	O
IXP2000	O
,	O
an	O
XScale-based	O
family	O
developed	O
entirely	O
by	O
Intel	O
.	O
</s>
<s>
The	O
processor	O
was	O
intended	O
to	O
replace	O
the	O
general-purpose	O
embedded	O
microprocessors	O
and	O
specialized	O
application-specific	O
integrated	O
circuit	O
(	O
ASIC	O
)	O
combinations	O
used	O
in	O
network	B-Protocol
routers	I-Protocol
.	O
</s>
<s>
The	O
IXP1200	B-Device
was	O
designed	O
for	O
mid-range	O
and	O
high-end	O
routers	B-Protocol
.	O
</s>
<s>
For	O
high-end	O
models	O
,	O
the	O
processor	O
could	O
be	O
combined	O
with	O
others	O
to	O
increase	O
the	O
capability	O
and	O
performance	O
of	O
the	O
router	B-Protocol
.	O
</s>
<s>
The	O
IXP1200	B-Device
integrates	O
a	O
StrongARM	B-Device
SA-1100-derived	O
core	O
and	O
six	O
microengines	O
,	O
which	O
were	O
RISC	O
microprocessors	O
with	O
an	O
instruction	O
set	O
optimized	O
for	O
network	B-Protocol
packet	I-Protocol
workloads	O
.	O
</s>
<s>
The	O
StrongARM	B-Device
core	O
performed	O
non-real-time	O
functions	O
while	O
the	O
microengines	O
manipulated	O
network	B-Protocol
packets	I-Protocol
.	O
</s>
<s>
The	O
processor	O
also	O
integrates	O
static	B-Architecture
random	I-Architecture
access	I-Architecture
memory	I-Architecture
(	O
SRAM	O
)	O
and	O
synchronous	O
dynamic	O
random	O
access	O
memory	O
(	O
SDRAM	O
)	O
controllers	O
,	O
a	O
PCI	B-Protocol
interface	O
and	O
an	O
IX	O
bus	O
interface	O
.	O
</s>
<s>
The	O
IXP1200	B-Device
contains	O
6.5	O
million	O
transistors	O
and	O
measures	O
126mm2	O
.	O
</s>
<s>
It	O
was	O
packaged	O
in	O
a	O
432-ball	O
enhanced	O
ball	B-Algorithm
grid	I-Algorithm
array	I-Algorithm
(	O
EBGA	B-Algorithm
)	O
.	O
</s>
<s>
The	O
IXP1200	B-Device
was	O
fabricated	O
at	O
DEC	O
's	O
former	O
Hudson	O
,	O
Massachusetts	O
plant	O
.	O
</s>
