<s>
The	O
IMP-16	B-Device
,	O
by	O
National	O
Semiconductor	O
,	O
was	O
the	O
first	O
multi-chip	O
16-bit	B-Device
microprocessor	B-Architecture
,	O
released	O
in	O
1973	O
.	O
</s>
<s>
It	O
consisted	O
of	O
five	O
PMOS	B-Algorithm
integrated	O
circuits	O
:	O
four	O
identical	O
RALU	O
chips	O
,	O
short	O
for	O
register	B-General_Concept
and	O
ALU	B-General_Concept
,	O
providing	O
the	O
data	O
path	O
,	O
and	O
one	O
CROM	O
,	O
Control	O
and	O
ROM	B-Device
,	O
providing	O
control	O
sequencing	O
and	O
microcode	B-Device
storage	O
.	O
</s>
<s>
The	O
IMP-16	B-Device
is	O
a	O
bit-slice	B-General_Concept
processor	I-General_Concept
;	O
each	O
RALU	O
chip	O
provides	O
a	O
4-bit	O
slice	O
of	O
the	O
register	B-General_Concept
and	O
arithmetic	O
that	O
work	O
in	O
parallel	O
to	O
produce	O
a	O
16-bit	B-Device
word	O
length	O
.	O
</s>
<s>
Each	O
RALU	O
chip	O
stores	O
its	O
own	O
4	O
bits	O
of	O
the	O
program	O
counter	O
,	O
several	O
registers	O
,	O
the	O
ALU	B-General_Concept
,	O
a	O
16-word	O
LIFO	O
stack	O
,	O
and	O
status	O
flags	O
.	O
</s>
<s>
There	O
were	O
four	O
16-bit	B-Device
accumulators	O
,	O
two	O
of	O
which	O
could	O
be	O
used	O
as	O
index	O
registers	O
.	O
</s>
<s>
The	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
was	O
similar	O
to	O
that	O
of	O
the	O
Data	B-Device
General	I-Device
Nova	I-Device
.	O
</s>
<s>
The	O
chip	O
set	O
could	O
be	O
extended	O
with	O
the	O
CROM	O
chip	O
(	O
IMP-16A	O
/	O
522D	O
)	O
that	O
implemented	O
16-bit	B-Device
multiply	O
and	O
divide	O
routines	O
.	O
</s>
<s>
An	O
integral	O
part	O
of	O
the	O
architecture	O
was	O
a	O
16-bit	B-Device
input	O
mux	O
that	O
provided	O
various	O
condition	O
bits	O
from	O
the	O
ALUs	O
such	O
as	O
zero	O
,	O
carry	O
,	O
overflow	O
along	O
with	O
general	O
purpose	O
inputs	O
.	O
</s>
<s>
The	O
microprocessor	B-Architecture
was	O
used	O
in	O
the	O
IMP-16P	O
microcomputer	O
and	O
Jacquard	O
Systems	O
 '	O
J100	O
but	O
saw	O
little	O
other	O
use	O
.	O
</s>
<s>
The	O
IMP-16	B-Device
was	O
later	O
superseded	O
by	O
the	O
PACE	B-Device
and	O
INS8900	B-General_Concept
single-chip	O
16-bit	B-Device
microprocessors	B-Architecture
,	O
which	O
had	O
a	O
similar	O
architecture	O
but	O
were	O
not	O
binary	O
compatible	O
.	O
</s>
