<s>
The	O
ILLIAC	B-Device
IV	I-Device
was	O
the	O
first	O
massively	B-Operating_System
parallel	I-Operating_System
computer	I-Operating_System
.	O
</s>
<s>
The	O
system	O
was	O
originally	O
designed	O
to	O
have	O
256	O
64-bit	B-Device
floating	B-General_Concept
point	I-General_Concept
units	I-General_Concept
(	O
FPUs	O
)	O
and	O
four	O
central	B-General_Concept
processing	I-General_Concept
units	I-General_Concept
(	O
CPUs	O
)	O
able	O
to	O
process	O
1	O
billion	O
operations	O
per	O
second	O
.	O
</s>
<s>
–	O
in	O
modern	O
terminology	O
the	O
design	O
would	O
be	O
considered	O
to	O
be	O
single	B-Device
instruction	I-Device
,	I-Device
multiple	I-Device
data	I-Device
,	O
or	O
SIMD	B-Device
.	O
</s>
<s>
The	O
concept	O
of	O
building	O
a	O
computer	O
using	O
an	O
array	O
of	O
processors	O
came	O
to	O
Daniel	O
Slotnick	O
while	O
working	O
as	O
a	O
programmer	O
on	O
the	O
IAS	B-Device
machine	I-Device
in	O
1952	O
.	O
</s>
<s>
When	O
that	O
funding	O
ended	O
in	O
1964	O
,	O
Slotnick	O
moved	O
to	O
the	O
University	O
of	O
Illinois	O
and	O
joined	O
the	O
Illinois	B-Device
Automatic	I-Device
Computer	I-Device
(	O
ILLIAC	B-Device
)	O
team	O
.	O
</s>
<s>
With	O
funding	O
from	O
Advanced	O
Research	O
Projects	O
Agency	O
(	O
ARPA	O
)	O
,	O
they	O
began	O
the	O
design	O
of	O
a	O
newer	O
concept	O
with	O
256	O
64-bit	B-Device
processors	I-Device
instead	O
of	O
the	O
original	O
concept	O
with	O
1,024	O
1-bit	O
processors	O
.	O
</s>
<s>
After	O
three	O
years	O
of	O
thorough	O
modification	O
to	O
fix	O
various	O
flaws	O
,	O
ILLIAC	B-Device
IV	I-Device
was	O
connected	O
to	O
the	O
ARPANET	O
for	O
distributed	O
use	O
in	O
November	O
1975	O
,	O
becoming	O
the	O
first	O
network-available	O
supercomputer	O
,	O
beating	O
the	O
Cray-1	B-Device
by	O
nearly	O
12	O
months	O
.	O
</s>
<s>
Running	O
at	O
half	O
its	O
design	O
speed	O
,	O
the	O
one-quadrant	O
ILLIAC	B-Device
IV	I-Device
delivered	O
50MFLOP	O
peak	O
,	O
making	O
it	O
the	O
fastest	O
computer	O
in	O
the	O
world	O
at	O
that	O
time	O
.	O
</s>
<s>
In	O
the	O
1980s	O
,	O
several	O
machines	O
based	O
on	O
ILLIAC	B-Device
IV	I-Device
concepts	O
were	O
successfully	O
delivered	O
.	O
</s>
<s>
In	O
June	O
1952	O
,	O
Daniel	O
Slotnick	O
began	O
working	O
on	O
the	O
IAS	B-Device
machine	I-Device
at	O
the	O
Institute	O
for	O
Advanced	O
Study	O
(	O
IAS	B-Device
)	O
at	O
Princeton	O
University	O
.	O
</s>
<s>
The	O
IAS	B-Device
machine	I-Device
featured	O
a	O
bit-parallel	O
math	O
unit	O
that	O
operated	O
on	O
40-bit	O
words	O
.	O
</s>
<s>
Originally	O
equipped	O
with	O
Williams	B-General_Concept
tube	I-General_Concept
memory	O
,	O
a	O
magnetic	B-General_Concept
drum	I-General_Concept
from	O
Engineering	O
Research	O
Associates	O
was	O
later	O
added	O
.	O
</s>
<s>
Slotnick	O
raised	O
the	O
idea	O
at	O
the	O
IAS	B-Device
,	O
but	O
John	O
von	O
Neumann	O
dismissed	O
it	O
as	O
requiring	O
"	O
too	O
many	O
tubes	O
"	O
.	O
</s>
<s>
Slotnick	O
left	O
the	O
IAS	B-Device
in	O
February	O
1954	O
to	O
return	O
to	O
school	O
for	O
his	O
PhD	O
and	O
the	O
matter	O
was	O
forgotten	O
.	O
</s>
<s>
By	O
this	O
time	O
,	O
for	O
scientific	O
computing	O
at	O
least	O
,	O
tubes	O
and	O
drums	O
had	O
been	O
replaced	O
with	O
transistors	O
and	O
core	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
After	O
a	O
short	O
time	O
at	O
IBM	O
and	O
then	O
another	O
at	O
Aeronca	O
Aircraft	O
,	O
Slotnick	O
ended	O
up	O
at	O
Westinghouse	O
's	O
Air	O
Arm	O
division	O
,	O
which	O
worked	O
on	O
radar	B-Application
and	O
similar	O
systems	O
.	O
</s>
<s>
The	O
PE	O
's	O
would	O
be	O
fed	O
instructions	O
from	O
a	O
single	O
master	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
,	O
the	O
"	O
control	B-General_Concept
unit	I-General_Concept
"	O
or	O
CU	B-General_Concept
.	O
</s>
<s>
SOLOMON	O
's	O
CU	B-General_Concept
would	O
read	O
instructions	O
from	O
memory	O
,	O
decode	O
them	O
,	O
and	O
then	O
hand	O
them	O
off	O
to	O
the	O
PE	O
's	O
for	O
processing	O
.	O
</s>
<s>
The	O
CU	B-General_Concept
could	O
access	O
the	O
entire	O
memory	O
via	O
a	O
dedicated	O
memory	O
bus	O
,	O
whereas	O
the	O
PE	O
's	O
could	O
only	O
access	O
their	O
own	O
PEM	O
.	O
</s>
<s>
They	O
were	O
very	O
interested	O
in	O
the	O
design	O
but	O
convinced	O
him	O
to	O
upgrade	O
the	O
current	O
design	O
's	O
fixed	O
point	O
math	O
units	O
to	O
true	O
floating	B-Algorithm
point	I-Algorithm
,	O
which	O
resulted	O
in	O
the	O
SOLOMON.2	O
design	O
.	O
</s>
<s>
Livermore	O
would	O
later	O
select	O
the	O
CDC	B-Device
STAR-100	I-Device
for	O
this	O
role	O
,	O
as	O
CDC	O
was	O
willing	O
to	O
take	O
on	O
the	O
development	O
costs	O
.	O
</s>
<s>
When	O
SOLOMON	O
ended	O
,	O
Slotnick	O
joined	O
the	O
Illinois	B-Device
Automatic	I-Device
Computer	I-Device
design	O
(	O
ILLIAC	B-Device
)	O
team	O
at	O
the	O
University	O
of	O
Illinois	O
at	O
Urbana-Champaign	O
.	O
</s>
<s>
In	O
1964	O
the	O
University	O
signed	O
a	O
contract	O
with	O
ARPA	O
to	O
fund	O
the	O
effort	O
,	O
which	O
became	O
known	O
as	O
ILLIAC	B-Device
IV	I-Device
,	O
since	O
it	O
was	O
the	O
fourth	O
computer	O
designed	O
and	O
created	O
at	O
the	O
University	O
.	O
</s>
<s>
In	O
contrast	O
to	O
the	O
bit-serial	O
concept	O
of	O
SOLOMON	O
,	O
in	O
ILLIAC	B-Device
IV	I-Device
the	O
PE	O
's	O
were	O
upgraded	O
to	O
be	O
full	O
64-bit	B-Device
(	O
bit-parallel	O
)	O
processors	O
,	O
using	O
12,000	O
gates	O
and	O
2048-words	O
of	O
thin-film	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
The	O
PEs	O
had	O
five	O
64-bit	B-Device
registers	B-General_Concept
,	O
each	O
with	O
a	O
special	O
purpose	O
.	O
</s>
<s>
The	O
PEs	O
were	O
designed	O
to	O
work	O
as	O
a	O
single	O
64-bit	B-Device
FPU	O
,	O
two	O
32-bit	O
half-precision	O
FPUs	O
,	O
or	O
eight	O
8-bit	O
fixed-point	O
processors	O
.	O
</s>
<s>
Instead	O
of	O
1,024	O
PEs	O
and	O
a	O
single	O
CU	B-General_Concept
,	O
the	O
new	O
design	O
had	O
a	O
total	O
of	O
256	O
PEs	O
arranged	O
into	O
four	O
64-PE	O
"	O
quadrants	O
"	O
,	O
each	O
with	O
its	O
own	O
CU	B-General_Concept
.	O
</s>
<s>
The	O
CU	B-General_Concept
's	O
were	O
also	O
64-bit	B-Device
designs	O
,	O
with	O
sixty-four	O
64-bit	B-Device
registers	B-General_Concept
and	O
another	O
four	O
64-bit	B-Device
accumulators	B-General_Concept
.	O
</s>
<s>
Based	O
on	O
a	O
25MHz	O
clock	O
,	O
with	O
all	O
256-PEs	O
running	O
on	O
a	O
single	O
program	O
,	O
the	O
machine	O
was	O
designed	O
to	O
deliver	O
1	O
billion	O
floating	B-Algorithm
point	I-Algorithm
operations	O
per	O
second	O
,	O
or	O
in	O
today	O
's	O
terminology	O
,	O
1GFLOPS	O
.	O
</s>
<s>
This	O
made	O
it	O
much	O
faster	O
than	O
any	O
machine	O
in	O
the	O
world	O
;	O
the	O
contemporary	O
CDC	B-Device
7600	I-Device
had	O
a	O
clock	O
cycle	O
of	O
27.5nanoseconds	O
,	O
or	O
36MIPS	O
,	O
although	O
for	O
a	O
variety	O
of	O
reasons	O
it	O
generally	O
offered	O
performance	O
closer	O
to	O
10MIPS	O
.	O
</s>
<s>
In	O
order	O
to	O
make	O
this	O
as	O
easy	O
as	O
possible	O
,	O
several	O
new	O
computer	B-Language
languages	I-Language
were	O
created	O
;	O
IVTRAN	O
and	O
TRANQUIL	O
were	O
parallelized	O
versions	O
of	O
FORTRAN	B-Application
,	O
and	O
Glypnir	O
was	O
a	O
similar	O
conversion	O
of	O
ALGOL	B-Language
.	O
</s>
<s>
Several	O
of	O
the	O
responses	O
,	O
including	O
Control	O
Data	O
,	O
attempted	O
to	O
interest	O
them	O
in	O
a	O
vector	B-Operating_System
processor	I-Operating_System
design	O
instead	O
,	O
but	O
as	O
these	O
were	O
already	O
being	O
designed	O
the	O
team	O
was	O
not	O
interested	O
in	O
building	O
another	O
.	O
</s>
<s>
Burroughs	O
was	O
offering	O
to	O
build	O
a	O
new	O
and	O
much	O
faster	O
version	O
of	O
thin-film	B-General_Concept
memory	I-General_Concept
which	O
would	O
improve	O
performance	O
.	O
</s>
<s>
TI	O
was	O
offering	O
to	O
build	O
64-pin	O
emitter-coupled	B-General_Concept
logic	I-General_Concept
(	O
ECL	O
)	O
integrated	O
circuits	O
(	O
ICs	O
)	O
with	O
20	O
logic	O
gates	O
each	O
.	O
</s>
<s>
Burroughs	O
also	O
supplied	O
the	O
specialized	O
disk	B-Device
drives	I-Device
,	O
which	O
featured	O
a	O
separate	O
stationary	O
head	O
for	O
every	O
track	O
and	O
could	O
offer	O
speeds	O
up	O
to	O
500Mbit/s	O
and	O
stored	O
about	O
80	O
MB	O
per	O
36	O
"	O
disk	B-Device
.	O
</s>
<s>
Instead	O
,	O
the	O
ILLIAC	B-Device
team	O
chose	O
to	O
redesign	O
the	O
machine	O
based	O
on	O
available	O
16-pin	O
ICs	O
.	O
</s>
<s>
TI	O
was	O
able	O
to	O
get	O
the	O
64-pin	O
design	O
working	O
after	O
just	O
over	O
another	O
year	O
,	O
and	O
began	O
offering	O
them	O
on	O
the	O
market	O
before	O
ILLIAC	B-Device
was	O
complete	O
.	O
</s>
<s>
This	O
doomed	O
Burroughs	O
 '	O
efforts	O
to	O
produce	O
a	O
thin-film	B-General_Concept
memory	I-General_Concept
for	O
the	O
machine	O
,	O
because	O
there	O
was	O
now	O
no	O
longer	O
enough	O
space	O
for	O
the	O
memory	O
to	O
fit	O
within	O
the	O
design	O
's	O
cabinets	O
.	O
</s>
<s>
By	O
1969	O
,	O
the	O
project	O
was	O
spending	O
$1	O
million	O
a	O
month	O
,	O
and	O
had	O
to	O
be	O
spun	O
out	O
of	O
the	O
original	O
ILLIAC	B-Device
team	O
who	O
were	O
becoming	O
increasingly	O
vocal	O
in	O
their	O
opposition	O
to	O
the	O
project	O
.	O
</s>
<s>
NASA	O
also	O
decided	O
to	O
replace	O
the	O
B6500	O
front-end	O
machine	O
with	O
a	O
PDP-10	B-Device
,	O
which	O
were	O
in	O
common	O
use	O
at	O
Ames	O
and	O
would	O
make	O
it	O
much	O
easier	O
to	O
connect	O
to	O
the	O
ARPAnet	O
.	O
</s>
<s>
This	O
required	O
the	O
development	O
of	O
new	O
software	O
,	O
especially	O
compilers	O
,	O
on	O
the	O
PDP-10	B-Device
.	O
</s>
<s>
The	O
Illiac	B-Device
IV	I-Device
was	O
contracted	O
to	O
be	O
managed	O
by	O
ACTS	O
Computing	O
Corporation	O
headquartered	O
in	O
Southfield	O
,	O
MI	O
,	O
a	O
Timesharing	O
and	O
Remote	O
Job	O
Entry	O
(	O
RJE	O
)	O
company	O
that	O
had	O
recently	O
been	O
acquired	O
by	O
the	O
conglomerate	O
,	O
Lear	O
Siegler	O
Corporation	O
.	O
</s>
<s>
This	O
unusual	O
arrangement	O
was	O
due	O
to	O
the	O
constraint	O
that	O
no	O
government	O
employee	O
could	O
be	O
paid	O
more	O
than	O
a	O
Congress	O
person	O
and	O
many	O
Illiac	B-Device
IV	I-Device
personnel	O
made	O
more	O
than	O
that	O
limit	O
.	O
</s>
<s>
Dr.	O
Mel	O
Pirtle	O
,	O
with	O
a	O
background	O
from	O
the	O
University	O
of	O
California	O
,	O
Berkeley	O
and	O
the	O
Berkeley	O
Computer	O
Corporation	O
(	O
BCC	O
)	O
was	O
engaged	O
as	O
the	O
Illiac	B-Device
IV	I-Device
's	O
director	O
.	O
</s>
<s>
At	O
first	O
,	O
performance	O
was	O
dismal	O
,	O
with	O
most	O
programs	O
running	O
at	O
about	O
15MFLOPS	O
,	O
about	O
three	O
times	O
the	O
average	O
for	O
the	O
CDC	B-Device
7600	I-Device
.	O
</s>
<s>
Over	O
time	O
this	O
improved	O
,	O
notably	O
after	O
Ames	O
programmers	O
wrote	O
their	O
own	O
version	O
of	O
FORTRAN	B-Application
,	O
CFD	O
,	O
and	O
learned	O
how	O
to	O
parallel	O
I/O	B-General_Concept
into	O
the	O
limited	O
PEMs	O
.	O
</s>
<s>
On	O
problems	O
that	O
could	O
be	O
parallelized	O
the	O
machine	O
was	O
still	O
the	O
fastest	O
in	O
the	O
world	O
,	O
outperforming	O
the	O
CDC	B-Device
7600	I-Device
by	O
two	O
to	O
six	O
times	O
,	O
and	O
it	O
is	O
generally	O
credited	O
as	O
the	O
fastest	O
machine	O
in	O
the	O
world	O
until	O
1981	O
.	O
</s>
<s>
On	O
7	O
September	O
1981	O
,	O
after	O
nearly	O
10	O
years	O
of	O
operation	O
,	O
the	O
ILLIAC	B-Device
IV	I-Device
was	O
turned	O
off	O
.	O
</s>
<s>
One	O
control	B-General_Concept
unit	I-General_Concept
and	O
one	O
processing	O
element	O
chassis	O
from	O
the	O
machine	O
is	O
now	O
on	O
display	O
at	O
the	O
Computer	O
History	O
Museum	O
in	O
Mountain	O
View	O
,	O
less	O
than	O
a	O
mile	O
from	O
its	O
operational	O
site	O
.	O
</s>
<s>
ILLIAC	B-Device
was	O
very	O
late	O
,	O
very	O
expensive	O
,	O
and	O
never	O
met	O
its	O
goal	O
of	O
producing	O
1GFLOP	O
.	O
</s>
<s>
It	O
was	O
widely	O
considered	O
a	O
failure	O
even	O
by	O
those	O
who	O
worked	O
on	O
it	O
;	O
one	O
stated	O
simply	O
that	O
"	O
any	O
impartial	O
observer	O
has	O
to	O
regard	O
Illiac	B-Device
IV	I-Device
as	O
a	O
failure	O
in	O
a	O
technical	O
sense.	O
"	O
</s>
<s>
Among	O
the	O
indirect	O
effects	O
was	O
the	O
rapid	O
update	O
of	O
semiconductor	O
memory	O
after	O
the	O
ILLIAC	B-Device
project	O
.	O
</s>
<s>
ILLIAC	B-Device
is	O
considered	O
to	O
have	O
dealt	O
a	O
death	O
blow	O
to	O
core	B-General_Concept
memory	I-General_Concept
and	O
related	O
systems	O
like	O
thin-film	O
.	O
</s>
<s>
This	O
was	O
a	O
major	O
step	O
forward	O
in	O
computer	B-Application
aided	I-Application
design	I-Application
,	O
and	O
by	O
the	O
mid-1970s	O
such	O
tools	O
were	O
commonplace	O
.	O
</s>
<s>
ILLIAC	B-Device
also	O
led	O
to	O
major	O
research	O
into	O
the	O
topic	O
of	O
parallel	O
processing	O
that	O
had	O
wide-ranging	O
effects	O
.	O
</s>
<s>
During	O
the	O
1980s	O
,	O
with	O
the	O
price	O
of	O
microprocessors	O
falling	O
according	O
to	O
Moore	O
's	O
Law	O
,	O
a	O
number	O
of	O
companies	O
created	O
MIMD	B-Operating_System
(	O
Multiple	B-Operating_System
Instruction	I-Operating_System
,	I-Operating_System
Multiple	I-Operating_System
Data	I-Operating_System
)	O
to	O
build	O
even	O
more	O
parallel	O
machines	O
,	O
with	O
compilers	O
that	O
could	O
make	O
better	O
use	O
of	O
the	O
parallelism	O
.	O
</s>
<s>
The	O
Thinking	O
Machines	O
CM-5	B-Device
is	O
an	O
excellent	O
example	O
of	O
the	O
MIMD	B-Operating_System
concept	O
.	O
</s>
<s>
It	O
was	O
the	O
better	O
understanding	O
of	O
parallelism	O
on	O
ILLIAC	B-Device
that	O
led	O
to	O
the	O
improved	O
compilers	O
and	O
programs	O
that	O
could	O
take	O
advantage	O
of	O
these	O
designs	O
.	O
</s>
<s>
As	O
one	O
ILLIAC	B-Device
programmer	O
put	O
it	O
,	O
"	O
If	O
anybody	O
builds	O
a	O
fast	O
computer	O
out	O
of	O
a	O
lot	O
of	O
microprocessors	O
,	O
Illiac	B-Device
IV	I-Device
will	O
have	O
done	O
its	O
bit	O
in	O
the	O
broad	O
scheme	O
of	O
things.	O
"	O
</s>
<s>
Most	O
supercomputers	O
of	O
the	O
era	O
took	O
another	O
approach	O
to	O
higher	O
performance	O
,	O
using	O
a	O
single	O
very	O
high	O
speed	O
vector	B-Operating_System
processor	I-Operating_System
.	O
</s>
<s>
Similar	O
to	O
the	O
ILLIAC	B-Device
in	O
some	O
ways	O
,	O
these	O
processor	O
designs	O
loaded	O
up	O
many	O
data	O
elements	O
into	O
a	O
single	O
custom	O
processor	O
instead	O
of	O
a	O
large	O
number	O
of	O
specialized	O
ones	O
.	O
</s>
<s>
The	O
classic	O
example	O
of	O
this	O
design	O
is	O
the	O
Cray-1	B-Device
,	O
which	O
had	O
performance	O
similar	O
to	O
the	O
ILLIAC	B-Device
.	O
</s>
<s>
There	O
was	O
more	O
than	O
a	O
little	O
"	O
backlash	O
"	O
against	O
the	O
ILLIAC	B-Device
design	O
as	O
a	O
result	O
,	O
and	O
for	O
some	O
time	O
the	O
supercomputer	O
market	O
looked	O
on	O
massively	B-Operating_System
parallel	I-Operating_System
designs	O
with	O
disdain	O
,	O
even	O
when	O
they	O
were	O
successful	O
.	O
</s>
<s>
Arranged	O
beside	O
the	O
quadrant	O
was	O
its	O
input/output	B-General_Concept
(	O
I/O	B-General_Concept
)	O
system	O
,	O
whose	O
disk	B-Device
system	O
stored	O
2.5GiB	O
and	O
could	O
read	O
and	O
write	O
data	O
at	O
1billionbits	O
per	O
second	O
,	O
along	O
with	O
the	O
B6700	O
computer	O
that	O
connected	O
to	O
the	O
machine	O
through	O
the	O
same	O
1,024	O
-bit-wide	O
interface	O
as	O
the	O
disk	B-Device
system	O
.	O
</s>
<s>
The	O
majority	O
of	O
these	O
were	O
the	O
Processing	O
Units	O
(	O
PUs	O
)	O
,	O
which	O
contained	O
the	O
modules	O
for	O
a	O
single	O
PE	O
,	O
its	O
PEM	O
,	O
and	O
the	O
Memory	O
Logic	O
Unit	O
that	O
handled	O
address	O
translation	O
and	O
I/O	B-General_Concept
.	O
</s>
<s>
Each	O
CU	B-General_Concept
had	O
about	O
30	O
to	O
40,000	O
gates	O
.	O
</s>
<s>
The	O
CU	B-General_Concept
had	O
sixteen	O
64-bit	B-Device
registers	B-General_Concept
and	O
a	O
separate	O
sixty-four	O
slot	O
64-bit	B-Device
"	O
scratchpad	O
"	O
,	O
LDB	O
.	O
</s>
<s>
There	O
were	O
four	O
accumulators	B-General_Concept
,	O
AC0	O
through	O
AC3	O
,	O
a	O
program	B-General_Concept
counter	I-General_Concept
ILR	O
,	O
and	O
various	O
control	O
registers	B-General_Concept
.	O
</s>
<s>
The	O
system	O
had	O
a	O
short	O
instruction	B-General_Concept
pipeline	I-General_Concept
and	O
implemented	O
instruction	O
look	O
ahead	O
.	O
</s>
<s>
It	O
included	O
four	O
64-bit	B-Device
registers	B-General_Concept
,	O
using	O
an	O
accumulator	B-General_Concept
A	O
,	O
an	O
operand	O
buffer	O
B	O
and	O
a	O
secondary	O
scratchpad	O
S	O
.	O
The	O
fourth	O
,	O
R	O
,	O
was	O
used	O
to	O
broadcast	O
or	O
receive	O
data	O
from	O
the	O
other	O
PEs	O
.	O
</s>
<s>
The	O
PEs	O
used	O
a	O
carry-lookahead	O
adder	O
,	O
a	O
leading-one	B-General_Concept
detector	I-General_Concept
for	O
boolean	O
operations	O
,	O
and	O
a	O
barrel	O
shifter	O
.	O
</s>
<s>
64-bit	B-Device
additions	O
took	O
about	O
200ns	O
and	O
multiplications	O
about	O
400ns	O
.	O
</s>
<s>
The	O
PE	O
's	O
were	O
connected	O
to	O
a	O
private	O
memory	O
bank	O
,	O
the	O
PEM	O
,	O
which	O
held	O
2,048	O
64-bit	B-Device
words	O
.	O
</s>
<s>
Access	O
time	O
was	O
on	O
the	O
order	O
of	O
250ns	O
The	O
PEs	O
used	O
a	O
load/store	B-Architecture
architecture	I-Architecture
.	O
</s>
<s>
The	O
instruction	B-General_Concept
set	I-General_Concept
(	O
ISA	O
)	O
contained	O
two	O
separate	O
sets	O
of	O
instructions	O
,	O
one	O
for	O
the	O
CU	B-General_Concept
(	O
or	O
a	O
unit	O
within	O
it	O
,	O
ADVAST	O
)	O
and	O
another	O
for	O
the	O
PEs	O
.	O
</s>
<s>
The	O
ADVAST	O
instructions	O
were	O
decoded	O
and	O
entered	O
the	O
CU	B-General_Concept
's	O
processing	O
pipeline	O
.	O
</s>
<s>
Each	O
quadrant	O
contained	O
64	O
PEs	O
and	O
one	O
CU	B-General_Concept
.	O
</s>
<s>
The	O
CU	B-General_Concept
had	O
access	O
to	O
the	O
entire	O
I/O	B-General_Concept
bus	O
and	O
could	O
address	O
all	O
of	O
the	O
machine	O
's	O
memory	O
.	O
</s>
<s>
The	O
PEs	O
could	O
only	O
access	O
their	O
own	O
local	O
store	O
,	O
the	O
PEM	O
,	O
of	O
2,048	O
64-bit	B-Device
words	O
.	O
</s>
<s>
Both	O
the	O
PEs	O
and	O
CU	B-General_Concept
could	O
use	O
load	O
and	O
store	O
operations	O
to	O
access	O
the	O
disk	B-Device
system	O
.	O
</s>
<s>
For	O
this	O
reason	O
,	O
the	O
CU	B-General_Concept
could	O
not	O
be	O
used	O
to	O
coordinate	O
actions	O
,	O
instead	O
,	O
the	O
entire	O
system	O
was	O
clock-synchronous	O
with	O
all	O
operations	O
in	O
the	O
PEs	O
guaranteed	O
to	O
take	O
the	O
same	O
amount	O
of	O
time	O
no	O
matter	O
what	O
the	O
operands	O
were	O
.	O
</s>
<s>
That	O
way	O
the	O
CU	B-General_Concept
could	O
be	O
sure	O
that	O
the	O
operations	O
were	O
complete	O
without	O
having	O
to	O
wait	O
for	O
results	O
or	O
status	O
codes	O
.	O
</s>
<s>
The	O
system	O
used	O
a	O
one-address	O
format	O
,	O
in	O
which	O
the	O
instructions	O
included	O
the	O
address	O
of	O
one	O
of	O
the	O
operands	O
and	O
the	O
other	O
operand	O
was	O
in	O
the	O
PE	O
's	O
accumulator	B-General_Concept
(	O
the	O
A	O
register	O
)	O
.	O
</s>
<s>
Depending	O
on	O
the	O
instruction	O
,	O
the	O
value	O
on	O
the	O
bus	O
might	O
refer	O
to	O
a	O
memory	O
location	O
in	O
the	O
PE	O
's	O
PEM	O
,	O
a	O
value	O
in	O
one	O
of	O
the	O
PE	O
registers	B-General_Concept
,	O
or	O
a	O
numeric	B-Algorithm
constant	O
.	O
</s>
<s>
Since	O
each	O
PE	O
had	O
its	O
own	O
memory	O
,	O
while	O
the	O
instruction	O
format	O
and	O
the	O
CUs	O
saw	O
the	O
entire	O
address	O
space	O
,	O
the	O
system	O
included	O
an	O
index	B-General_Concept
register	I-General_Concept
(	O
X	O
)	O
to	O
offset	O
the	O
base	O
address	O
.	O
</s>
<s>
Normally	O
,	O
when	O
the	O
CPU	O
completes	O
processing	O
an	O
instruction	O
,	O
the	O
program	B-General_Concept
counter	I-General_Concept
(	O
PC	O
)	O
is	O
incremented	O
by	O
one	O
word	O
and	O
the	O
next	B-General_Concept
instruction	I-General_Concept
is	O
read	O
.	O
</s>
<s>
This	O
process	O
is	O
interrupted	O
by	O
branches	B-General_Concept
,	O
which	O
causes	O
the	O
PC	O
to	O
jump	O
to	O
one	O
of	O
two	O
locations	O
depending	O
on	O
a	O
test	O
,	O
like	O
whether	O
a	O
given	O
memory	O
address	O
holds	O
a	O
non-zero	O
value	O
.	O
</s>
<s>
In	O
the	O
ILLIAC	B-Device
design	O
,	O
each	O
PE	O
would	O
be	O
applying	O
this	O
test	O
to	O
different	O
values	O
,	O
and	O
thus	O
have	O
different	O
outcomes	O
.	O
</s>
<s>
To	O
avoid	O
the	O
delays	O
reloading	O
the	O
PE	O
instructions	O
would	O
cause	O
,	O
the	O
ILLIAC	B-Device
loaded	O
the	O
PEMs	O
with	O
the	O
instructions	O
on	O
both	O
sides	O
of	O
the	O
branch	O
.	O
</s>
