<s>
Elastic	O
interface	O
buses	O
,	O
abbreviated	O
as	O
EI	O
bus	B-General_Concept
connections	I-General_Concept
,	O
can	O
be	O
generalized	O
as	O
bus	B-General_Concept
connections	I-General_Concept
which	O
are	O
high	O
speed	O
interfaces	O
that	O
send	O
clock	O
signals	O
with	O
data	O
.	O
</s>
<s>
The	O
data	O
bits	O
that	O
are	O
sent	O
through	O
EI	O
bus	B-General_Concept
connections	I-General_Concept
are	O
aligned	O
to	O
the	O
clock	O
so	O
that	O
they	O
latch	O
to	O
the	O
data	O
at	O
the	O
high	O
speeds	O
.	O
</s>
<s>
EI	O
bus	B-General_Concept
connections	I-General_Concept
require	O
that	O
the	O
net	B-Architecture
topology	I-Architecture
and	O
timing	O
characteristics	O
for	O
each	O
net	O
on	O
the	O
bus	O
are	O
at	O
least	O
similar	O
to	O
each	O
other	O
in	O
order	O
to	O
make	O
lining	O
up	O
the	O
edges	O
of	O
the	O
data	O
to	O
the	O
clock	O
signals	O
possible	O
.	O
</s>
<s>
In	O
this	O
environment	O
,	O
re-working	O
connections	O
in	O
the	O
connection	O
module	O
was	O
not	O
easily	O
possible	O
because	O
all	O
nets	O
needed	O
to	O
have	O
similar	O
topology	B-Architecture
and	O
timing	O
characteristics	O
.	O
</s>
<s>
This	O
increased	O
the	O
difficulty	O
of	O
a	O
re-work	O
solution	O
or	O
made	O
it	O
impossible	O
and	O
increased	O
the	O
modules	B-Algorithm
that	O
needed	O
to	O
be	O
scrapped	O
as	O
unusable	O
.	O
</s>
<s>
Elastic	O
Interface	O
repair	O
involves	O
a	O
spare	O
wire	O
that	O
is	O
built	O
into	O
the	O
bus	O
interface	O
in	O
the	O
connection	O
module	O
that	O
has	O
the	O
same	O
topology	B-Architecture
and	O
characteristics	O
of	O
the	O
rest	O
of	O
the	O
nets	O
in	O
the	O
bus	O
.	O
</s>
<s>
IBM	O
,	O
inventor	O
of	O
the	O
elastic	B-Architecture
interface	I-Architecture
bus	I-Architecture
,	O
uses	O
it	O
in	O
many	O
high	O
end	O
processors	O
:	O
</s>
<s>
Mai	O
Logic	O
was	O
a	O
licensee	O
of	O
the	O
Elastic	O
Interface	O
technology	O
for	O
PowerPC	B-General_Concept
970	I-General_Concept
applications	O
.	O
</s>
