<s>
The	O
801	O
was	O
an	O
experimental	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
design	O
developed	O
by	O
IBM	O
during	O
the	O
1970s	O
.	O
</s>
<s>
It	O
is	O
considered	O
to	O
be	O
the	O
first	O
modern	O
RISC	B-Architecture
design	O
,	O
relying	O
on	O
processor	B-General_Concept
registers	I-General_Concept
for	O
all	O
computations	O
and	O
eliminating	O
the	O
many	O
variant	O
addressing	B-Language
modes	I-Language
found	O
in	O
CISC	B-Architecture
designs	O
.	O
</s>
<s>
Originally	O
developed	O
as	O
the	O
processor	O
for	O
a	O
telephone	O
switch	O
,	O
it	O
was	O
later	O
used	O
as	O
the	O
basis	O
for	O
a	O
minicomputer	B-Architecture
and	O
a	O
number	O
of	O
products	O
for	O
their	O
mainframe	B-Architecture
line	O
.	O
</s>
<s>
Armed	O
with	O
huge	O
amounts	O
of	O
performance	O
data	O
,	O
IBM	O
was	O
able	O
to	O
demonstrate	O
that	O
the	O
simple	O
design	O
was	O
able	O
to	O
easily	O
outperform	O
even	O
the	O
most	O
powerful	O
classic	O
CPU	O
designs	O
,	O
while	O
at	O
the	O
same	O
time	O
producing	O
machine	B-Language
code	I-Language
that	O
was	O
only	O
marginally	O
larger	O
than	O
the	O
heavily	O
optimized	O
CISC	B-Architecture
instructions	O
.	O
</s>
<s>
Applying	O
these	O
same	O
techniques	O
even	O
to	O
existing	O
processors	O
like	O
the	O
System/370	B-Device
generally	O
doubled	O
the	O
performance	O
of	O
those	O
systems	O
as	O
well	O
.	O
</s>
<s>
This	O
demonstrated	O
the	O
value	O
of	O
the	O
RISC	B-Architecture
concept	O
,	O
and	O
all	O
of	O
IBM	O
's	O
future	O
systems	O
were	O
based	O
on	O
the	O
principles	O
developed	O
during	O
the	O
801	O
project	O
.	O
</s>
<s>
This	O
would	O
require	O
a	O
significant	O
advance	O
in	O
performance	O
;	O
their	O
current	O
top-of-the-line	O
machine	O
,	O
the	O
IBM	B-Device
System/370	I-Device
Model	I-Device
168	I-Device
of	O
late	O
1972	O
,	O
offered	O
about	O
3	O
MIPS	O
.	O
</s>
<s>
This	O
led	O
to	O
the	O
removal	O
of	O
a	O
floating-point	B-General_Concept
unit	I-General_Concept
for	O
instance	O
,	O
which	O
would	O
not	O
be	O
needed	O
in	O
this	O
application	O
.	O
</s>
<s>
More	O
critically	O
,	O
they	O
also	O
removed	O
many	O
of	O
the	O
instructions	O
that	O
worked	O
on	O
data	O
in	O
main	O
memory	O
and	O
left	O
only	O
those	O
instructions	O
that	O
worked	O
on	O
the	O
internal	O
processor	B-General_Concept
registers	I-General_Concept
,	O
as	O
these	O
were	O
much	O
faster	O
to	O
use	O
and	O
the	O
simple	O
code	O
in	O
a	O
telephone	O
switch	O
could	O
be	O
written	O
to	O
use	O
only	O
these	O
types	O
instructions	O
.	O
</s>
<s>
For	O
the	O
general-purpose	O
role	O
,	O
the	O
team	O
began	O
to	O
consider	O
real-world	O
programs	O
that	O
would	O
be	O
run	O
on	O
a	O
typical	O
minicomputer	B-Architecture
.	O
</s>
<s>
This	O
suggested	O
that	O
the	O
same	O
simplified	O
processor	O
design	O
would	O
work	O
just	O
as	O
well	O
for	O
a	O
general-purpose	O
minicomputer	B-Architecture
as	O
a	O
special-purpose	O
switch	O
.	O
</s>
<s>
This	O
conclusion	O
flew	O
in	O
the	O
face	O
of	O
contemporary	O
processor	O
design	O
,	O
which	O
was	O
based	O
on	O
the	O
concept	O
of	O
using	O
microcode	B-Device
.	O
</s>
<s>
IBM	O
had	O
been	O
among	O
the	O
first	O
to	O
make	O
widespread	O
use	O
of	O
this	O
technique	O
as	O
part	O
of	O
their	O
System/360	B-Application
series	O
.	O
</s>
<s>
The	O
360s	O
,	O
and	O
370s	O
,	O
came	O
in	O
a	O
variety	O
of	O
performance	O
levels	O
that	O
all	O
ran	O
the	O
same	O
machine	B-Language
language	I-Language
code	O
.	O
</s>
<s>
On	O
the	O
high-end	O
machines	O
,	O
many	O
of	O
these	O
instructions	O
were	O
implemented	O
directly	O
in	O
hardware	O
,	O
like	O
a	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
,	O
while	O
low-end	O
machines	O
could	O
instead	O
simulate	O
those	O
instructions	O
using	O
a	O
sequence	O
of	O
other	O
instructions	O
encoded	O
in	O
microcode	B-Device
.	O
</s>
<s>
This	O
allowed	O
a	O
single	O
application	B-Operating_System
binary	I-Operating_System
interface	I-Operating_System
to	O
run	O
across	O
the	O
entire	O
lineup	O
and	O
allowed	O
the	O
customers	O
to	O
feel	O
confident	O
that	O
if	O
more	O
performance	O
was	O
ever	O
needed	O
they	O
could	O
move	O
up	O
to	O
a	O
faster	O
machine	O
without	O
any	O
other	O
changes	O
.	O
</s>
<s>
Microcode	B-Device
allowed	O
a	O
simple	O
processor	O
to	O
offer	O
many	O
instructions	O
,	O
which	O
had	O
been	O
used	O
by	O
the	O
designers	O
to	O
implement	O
a	O
wide	O
variety	O
of	O
addressing	B-Language
modes	I-Language
.	O
</s>
<s>
The	O
processor	O
would	O
read	O
that	O
instruction	O
and	O
use	O
microcode	B-Device
to	O
break	O
it	O
into	O
a	O
series	O
of	O
internal	O
instructions	O
.	O
</s>
<s>
The	O
idea	O
of	O
offering	O
all	O
possible	O
addressing	B-Language
modes	I-Language
for	O
all	O
instructions	O
became	O
a	O
goal	O
of	O
processor	O
designers	O
,	O
the	O
concept	O
becoming	O
known	O
as	O
an	O
orthogonal	B-General_Concept
instruction	I-General_Concept
set	I-General_Concept
.	O
</s>
<s>
The	O
801	O
team	O
noticed	O
a	O
side-effect	O
of	O
this	O
concept	O
;	O
when	O
faced	O
with	O
the	O
plethora	O
of	O
possible	O
versions	O
of	O
a	O
given	O
instruction	O
,	O
compiler	B-Language
authors	O
would	O
almost	O
always	O
pick	O
a	O
single	O
version	O
.	O
</s>
<s>
That	O
ensured	O
that	O
the	O
machine	B-Language
code	I-Language
generated	O
by	O
the	O
compiler	B-Language
would	O
run	O
as	O
fast	O
as	O
possible	O
on	O
the	O
entire	O
lineup	O
.	O
</s>
<s>
While	O
using	O
other	O
versions	O
of	O
instructions	O
might	O
run	O
even	O
faster	O
on	O
a	O
machine	O
that	O
implemented	O
them	O
in	O
hardware	O
,	O
the	O
complexity	O
of	O
knowing	O
which	O
one	O
to	O
pick	O
on	O
an	O
ever-changing	O
list	O
of	O
machines	O
made	O
this	O
extremely	O
unattractive	O
,	O
and	O
compiler	B-Language
authors	O
largely	O
ignored	O
these	O
possibilities	O
.	O
</s>
<s>
As	O
a	O
result	O
,	O
the	O
majority	O
of	O
the	O
instructions	O
available	O
in	O
the	O
instruction	O
set	O
were	O
never	O
used	O
in	O
compiled	B-Language
programs	O
.	O
</s>
<s>
Imposing	O
microcode	B-Device
between	O
a	O
computer	O
and	O
its	O
users	O
imposes	O
an	O
expensive	O
overhead	O
in	O
performing	O
the	O
most	O
frequently	O
executed	O
instructions	O
.	O
</s>
<s>
Microcode	B-Device
takes	O
a	O
non-zero	O
time	O
to	O
examine	O
the	O
instruction	O
before	O
it	O
is	O
performed	O
.	O
</s>
<s>
The	O
same	O
underlying	O
processor	O
with	O
the	O
microcode	B-Device
removed	O
would	O
eliminate	O
this	O
overhead	O
and	O
run	O
those	O
instructions	O
faster	O
.	O
</s>
<s>
Since	O
microcode	B-Device
essentially	O
ran	O
small	O
subroutines	O
dedicated	O
to	O
a	O
particular	O
hardware	O
implementation	O
,	O
it	O
was	O
ultimately	O
performing	O
the	O
same	O
basic	O
task	O
that	O
the	O
compiler	B-Language
was	O
,	O
implementing	O
higher-level	O
instructions	O
as	O
a	O
sequence	O
of	O
machine-specific	O
instructions	O
.	O
</s>
<s>
Simply	O
removing	O
the	O
microcode	B-Device
and	O
implementing	O
that	O
in	O
the	O
compiler	B-Language
could	O
result	O
in	O
a	O
faster	O
machine	O
.	O
</s>
<s>
As	O
they	O
continued	O
work	O
on	O
the	O
design	O
and	O
improved	O
their	O
compilers	B-Language
,	O
they	O
found	O
that	O
overall	O
program	O
length	O
continued	O
to	O
fall	O
,	O
eventually	O
becoming	O
roughly	O
the	O
same	O
length	O
as	O
those	O
written	O
for	O
the	O
370	O
.	O
</s>
<s>
The	O
initially	O
proposed	O
architecture	O
was	O
a	O
machine	O
with	O
sixteen	O
24-bit	O
registers	O
and	O
without	O
virtual	B-Architecture
memory	I-Architecture
.	O
</s>
<s>
The	O
801	O
architecture	O
was	O
used	O
in	O
a	O
variety	O
of	O
IBM	O
devices	O
,	O
including	O
channel	B-Device
controllers	I-Device
for	O
their	O
S/370	B-Device
mainframes	B-Architecture
(	O
such	O
as	O
the	O
IBM	B-Device
3090	I-Device
)	O
,	O
various	O
networking	O
devices	O
,	O
and	O
as	O
a	O
vertical	O
microcode	B-Device
execution	O
unit	O
in	O
the	O
9373	O
and	O
9375	O
processors	O
of	O
the	O
IBM	B-Device
9370	I-Device
mainframe	B-Architecture
family	O
.	O
</s>
<s>
The	O
original	O
version	O
of	O
the	O
801	O
architecture	O
was	O
the	O
basis	O
for	O
the	O
architecture	O
of	O
the	O
IBM	B-Device
ROMP	I-Device
microprocessor	B-Architecture
used	O
in	O
the	O
IBM	B-Device
RT	I-Device
PC	I-Device
workstation	B-Device
computer	I-Device
and	O
several	O
experimental	O
computers	O
from	O
IBM	O
Research	O
.	O
</s>
<s>
Notable	O
among	O
these	O
was	O
the	O
lack	O
of	O
hardware	O
support	O
for	O
virtual	B-Architecture
memory	I-Architecture
,	O
which	O
was	O
not	O
needed	O
for	O
the	O
controller	O
role	O
and	O
had	O
been	O
implemented	O
in	O
software	O
on	O
early	O
801	O
systems	O
that	O
needed	O
it	O
.	O
</s>
<s>
Other	O
desirable	O
additions	O
include	O
instructions	O
for	O
working	O
with	O
string	O
data	O
that	O
was	O
encoded	O
in	O
"	O
packed	O
"	O
format	O
with	O
several	O
ASCII	B-Protocol
characters	I-Protocol
in	O
a	O
single	O
memory	O
word	O
,	O
and	O
additions	O
for	O
working	O
with	O
binary-coded	O
decimal	O
,	O
including	O
an	O
adder	O
that	O
could	O
carry	O
across	O
four-bit	O
decimal	O
numbers	O
.	O
</s>
<s>
When	O
the	O
new	O
version	O
of	O
the	O
801	O
was	O
run	O
as	O
a	O
simulator	O
on	O
the	O
370	O
,	O
the	O
team	O
was	O
surprised	O
to	O
find	O
that	O
code	O
compiled	B-Language
to	O
the	O
801	O
and	O
run	O
in	O
the	O
simulator	O
would	O
often	O
run	O
faster	O
than	O
the	O
same	O
source	O
code	O
compiled	B-Language
directly	O
to	O
370	O
machine	B-Language
code	I-Language
using	O
the	O
370	O
's	O
PL/1	B-Language
compiler	B-Language
.	O
</s>
<s>
When	O
they	O
ported	O
their	O
experimental	O
"	O
PL.8	O
"	O
language	O
back	O
to	O
the	O
370	O
and	O
compiled	B-Language
applications	O
using	O
it	O
,	O
they	O
also	O
ran	O
faster	O
than	O
existing	O
PL/1	B-Language
code	O
,	O
as	O
much	O
as	O
three	O
times	O
as	O
fast	O
.	O
</s>
<s>
This	O
was	O
due	O
to	O
the	O
compiler	B-Language
making	O
RISC-like	O
decisions	O
about	O
how	O
to	O
compile	B-Language
the	O
code	O
to	O
internal	O
registers	O
,	O
thereby	O
optimizing	O
out	O
as	O
many	O
memory	O
accesses	O
as	O
possible	O
.	O
</s>
<s>
These	O
were	O
just	O
as	O
expensive	O
on	O
the	O
370	O
as	O
the	O
801	O
,	O
but	O
this	O
cost	O
was	O
normally	O
hidden	O
by	O
the	O
simplicity	O
of	O
a	O
single	O
line	O
of	O
CISC	B-Architecture
code	O
.	O
</s>
<s>
The	O
PL.8	O
compiler	B-Language
was	O
much	O
more	O
aggressive	O
about	O
avoiding	O
loads	O
and	O
saves	O
,	O
and	O
thereby	O
resulting	O
in	O
higher	O
performance	O
even	O
on	O
a	O
CISC	B-Architecture
processor	I-Architecture
.	O
</s>
<s>
In	O
the	O
early	O
1980s	O
,	O
the	O
lessons	O
learned	O
on	O
the	O
801	O
were	O
combined	O
with	O
those	O
from	O
the	O
IBM	B-Device
Advanced	I-Device
Computer	I-Device
Systems	I-Device
project	I-Device
,	O
resulting	O
in	O
an	O
experimental	O
processor	O
called	O
"	O
Cheetah	O
"	O
.	O
</s>
<s>
Cheetah	O
was	O
a	O
2-way	O
superscalar	B-General_Concept
processor	I-General_Concept
,	O
which	O
evolved	O
into	O
a	O
processor	O
called	O
"	O
Panther	O
"	O
in	O
1985	O
,	O
and	O
finally	O
into	O
a	O
4-way	O
superscalar	B-General_Concept
design	O
called	O
"	O
America	O
"	O
in	O
1986	O
.	O
</s>
<s>
This	O
was	O
a	O
three-chip	O
processor	O
set	O
including	O
an	O
instruction	O
processor	O
that	O
fetches	O
and	O
decodes	O
instructions	O
,	O
a	O
fixed-point	O
processor	O
that	O
shares	O
duty	O
with	O
the	O
instruction	O
processor	O
,	O
and	O
a	O
floating-point	B-General_Concept
processor	I-General_Concept
for	O
those	O
systems	O
that	O
require	O
it	O
.	O
</s>
<s>
Designed	O
by	O
the	O
801	O
team	O
,	O
the	O
final	O
design	O
was	O
sent	O
to	O
IBM	O
's	O
Austin	O
office	O
in	O
1986	O
,	O
where	O
it	O
was	O
developed	O
into	O
the	O
IBM	B-Device
RS/6000	I-Device
system	O
.	O
</s>
<s>
The	O
RS/6000	B-Device
running	O
at	O
25MHz	O
was	O
one	O
of	O
the	O
fastest	O
machines	O
of	O
its	O
era	O
.	O
</s>
<s>
It	O
outperformed	O
other	O
RISC	B-Architecture
machines	O
by	O
two	O
to	O
three	O
times	O
on	O
common	O
tests	O
,	O
and	O
trivially	O
outperformed	O
older	O
CISC	B-Architecture
systems	O
.	O
</s>
<s>
After	O
the	O
RS/6000	B-Device
,	O
the	O
company	O
turned	O
its	O
attention	O
to	O
a	O
version	O
of	O
the	O
801	O
concepts	O
that	O
could	O
be	O
efficiently	O
fabricated	O
at	O
various	O
scales	O
.	O
</s>
<s>
The	O
result	O
was	O
the	O
IBM	B-Architecture
POWER	I-Architecture
instruction	I-Architecture
set	I-Architecture
architecture	I-Architecture
and	O
the	O
PowerPC	B-Architecture
offshoot	O
.	O
</s>
<s>
Michael	O
J	O
.	O
Flynn	O
views	O
the	O
801	O
as	O
the	O
first	O
RISC	B-Architecture
.	O
</s>
