<s>
The	O
Intel	B-General_Concept
486	I-General_Concept
,	O
officially	O
named	O
i486	B-General_Concept
and	O
also	O
known	O
as	O
80486	B-General_Concept
,	O
is	O
a	B-Application
microprocessor	B-Architecture
.	O
</s>
<s>
It	O
is	O
a	B-Application
higher-performance	O
follow-up	O
to	O
the	O
Intel	B-General_Concept
386	I-General_Concept
.	O
</s>
<s>
The	O
i486	B-General_Concept
was	O
introduced	O
in	O
1989	O
.	O
</s>
<s>
It	O
represents	O
the	O
fourth	O
generation	O
of	O
binary	B-General_Concept
compatible	I-General_Concept
CPUs	O
following	O
the	O
8086	B-General_Concept
of	O
1978	O
,	O
the	O
Intel	B-General_Concept
80286	I-General_Concept
of	O
1982	O
,	O
and	O
1985	O
's	O
i386	B-General_Concept
.	O
</s>
<s>
It	O
was	O
the	O
first	O
tightly-pipelined	O
x86	B-Operating_System
design	O
as	O
well	O
as	O
the	O
first	O
x86	B-Operating_System
chip	O
to	O
include	O
more	O
than	O
one	O
million	O
transistors	O
.	O
</s>
<s>
It	O
offered	O
a	B-Application
large	O
on-chip	B-General_Concept
cache	I-General_Concept
and	O
an	O
integrated	O
floating-point	B-General_Concept
unit	I-General_Concept
.	O
</s>
<s>
A	B-Application
typical	O
50MHz	O
i486	B-General_Concept
executes	O
around	O
40million	O
instructions	O
per	O
second	O
(	O
MIPS	O
)	O
,	O
reaching	O
50MIPS	O
peak	O
performance	O
.	O
</s>
<s>
It	O
is	O
approximately	O
twice	O
as	O
fast	O
as	O
the	O
i386	B-General_Concept
or	O
i286	B-General_Concept
per	O
clock	O
cycle	O
.	O
</s>
<s>
The	O
i486	B-General_Concept
's	O
improved	O
performance	O
is	O
thanks	O
to	O
its	O
five-stage	O
pipeline	O
with	O
all	O
stages	O
bound	O
to	O
a	B-Application
single	O
cycle	O
.	O
</s>
<s>
The	O
enhanced	O
FPU	B-General_Concept
unit	O
on	O
the	O
chip	O
was	O
significantly	O
faster	O
than	O
the	O
i387	O
FPU	B-General_Concept
per	O
cycle	O
.	O
</s>
<s>
The	O
intel	O
80387	O
FPU	B-General_Concept
(	O
"	O
i387	O
"	O
)	O
was	O
a	B-Application
separate	O
,	O
optional	O
math	B-General_Concept
coprocessor	I-General_Concept
that	O
was	O
installed	O
in	O
a	B-Application
motherboard	B-Device
socket	O
alongside	O
the	O
i386	B-General_Concept
.	O
</s>
<s>
The	O
i486	B-General_Concept
was	O
succeeded	O
by	O
the	O
original	B-General_Concept
Pentium	I-General_Concept
.	O
</s>
<s>
The	O
i486	B-General_Concept
was	O
announced	O
at	O
Spring	O
Comdex	O
in	O
April	O
1989	O
.	O
</s>
<s>
The	O
first	O
i486-based	O
PCs	B-Device
were	O
announced	O
in	O
late	O
1989	O
.	O
</s>
<s>
The	O
first	O
major	O
update	O
to	O
the	O
i486	B-General_Concept
design	O
came	O
in	O
March	O
1992	O
with	O
the	O
release	O
of	O
the	O
clock-doubled	O
486DX2	B-Device
series	O
.	O
</s>
<s>
It	O
was	O
the	O
first	O
time	O
that	O
the	O
CPU	O
core	O
clock	O
frequency	O
was	O
separated	O
from	O
the	O
system	B-Architecture
bus	I-Architecture
clock	O
frequency	O
by	O
using	O
a	B-Application
dual	O
clock	O
multiplier	O
,	O
supporting	O
486DX2	B-Device
chips	O
at	O
40	O
and	O
50	O
MHz	O
.	O
</s>
<s>
The	O
faster	O
66	O
MHz	O
486DX2-66	O
was	O
released	O
that	O
August	O
.	O
</s>
<s>
The	O
fifth-generation	O
Pentium	B-General_Concept
processor	O
launched	O
in	O
1993	O
,	O
while	O
Intel	O
continued	O
to	O
produce	O
i486	B-General_Concept
processors	O
,	O
including	O
the	O
triple-clock-rate	O
486DX4-100	B-Device
with	O
a	B-Application
100	O
MHz	O
clock	O
speed	O
and	O
a	B-Application
L1	O
cache	B-General_Concept
doubled	O
to	O
16	O
KB	O
.	O
</s>
<s>
Earlier	O
,	O
Intel	O
had	O
decided	O
not	O
to	O
share	O
its	O
80386	B-General_Concept
and	O
80486	B-General_Concept
technologies	O
with	O
AMD	O
.	O
</s>
<s>
However	O
,	O
AMD	O
believed	O
that	O
their	O
technology	O
sharing	O
agreement	O
extended	O
to	O
the	O
80386	B-General_Concept
as	O
a	B-Application
derivative	O
of	O
the	O
80286	B-General_Concept
.	O
</s>
<s>
AMD	O
reverse-engineered	O
the	O
386	B-General_Concept
and	O
produced	O
the	O
40	O
MHz	O
Am386DX-40	B-Device
chip	O
,	O
which	O
was	O
cheaper	O
and	O
had	O
lower	O
power	O
consumption	O
than	O
Intel	O
's	O
best	O
33	O
MHz	O
version	O
.	O
</s>
<s>
Intel	O
attempted	O
to	O
prevent	O
AMD	O
from	O
selling	O
the	O
processor	O
,	O
but	O
AMD	O
won	O
in	O
court	O
,	O
which	O
allowed	O
it	O
to	O
establish	O
itself	O
as	O
a	B-Application
competitor	O
.	O
</s>
<s>
AMD	O
continued	O
to	O
create	O
clones	O
,	O
releasing	O
the	O
first-generation	O
Am486	B-Device
chip	O
in	O
April	O
1993	O
with	O
clock	O
frequencies	O
of	O
25	O
,	O
33	O
and	O
40	O
MHz	O
.	O
</s>
<s>
The	O
Am486	B-Device
series	O
was	O
completed	O
with	O
a	B-Application
120	B-Device
MHz	O
DX4	B-Device
chip	O
in	O
1995	O
.	O
</s>
<s>
AMD	O
's	O
long-running	O
1987	O
arbitration	O
lawsuit	O
against	O
Intel	O
was	O
settled	O
in	O
1995	O
,	O
and	O
AMD	O
gained	O
access	O
to	O
Intel	O
's	O
80486	B-General_Concept
microcode	B-Device
.	O
</s>
<s>
This	O
led	O
to	O
the	O
creation	O
of	O
two	O
versions	O
of	O
AMD	O
's	O
486	B-General_Concept
processor	I-General_Concept
-	O
one	O
reverse-engineered	O
from	O
Intel	O
's	O
microcode	B-Device
,	O
while	O
the	O
other	O
used	O
AMD	O
's	O
microcode	B-Device
in	O
a	B-Application
clean	O
room	O
design	O
process	O
.	O
</s>
<s>
However	O
,	O
the	O
settlement	O
also	O
concluded	O
that	O
the	O
80486	B-General_Concept
would	O
be	O
AMD	O
's	O
last	O
Intel	B-Operating_System
clone	I-Operating_System
.	O
</s>
<s>
Another	O
486	B-General_Concept
clone	O
manufacturer	O
was	O
Cyrix	O
,	O
which	O
was	O
a	B-Application
fabless	B-Algorithm
co-processor	O
chip	O
maker	O
for	O
80286/386	O
systems	O
.	O
</s>
<s>
The	O
first	O
Cyrix	B-Device
486	I-Device
processors	O
,	O
the	O
486SLC	O
and	O
486DLC	O
,	O
were	O
released	O
in	O
1992	O
and	O
used	O
the	O
80386	B-General_Concept
package	O
.	O
</s>
<s>
However	O
,	O
these	O
chips	O
could	O
not	O
match	O
the	O
Intel	B-General_Concept
486	I-General_Concept
processors	O
,	O
having	O
only	O
1	O
KB	O
of	O
cache	B-General_Concept
memory	I-General_Concept
and	O
no	O
built-in	O
math	B-General_Concept
coprocessor	I-General_Concept
.	O
</s>
<s>
In	O
1993	O
,	O
Cyrix	O
released	O
its	O
own	O
Cx486DX	O
and	O
DX2	O
processors	O
,	O
which	O
were	O
closer	O
in	O
performance	O
to	O
Intel	O
's	O
counterparts	O
.	O
</s>
<s>
In	O
1995	O
,	O
both	O
Cyrix	O
and	O
AMD	O
began	O
looking	O
at	O
a	B-Application
ready	O
market	O
for	O
users	O
wanting	O
to	O
upgrade	O
their	O
processors	O
.	O
</s>
<s>
Cyrix	O
released	O
a	B-Application
derivative	O
486	B-General_Concept
processor	I-General_Concept
called	O
the	O
5x86	B-Device
,	O
based	O
on	O
the	O
Cyrix	O
M1	O
core	O
,	O
which	O
was	O
clocked	O
up	O
to	O
120	B-Device
MHz	O
and	O
was	O
an	O
option	O
for	O
486	B-General_Concept
Socket	B-General_Concept
3	I-General_Concept
motherboards	B-Device
.	O
</s>
<s>
AMD	O
released	O
a	B-Application
133	O
MHz	O
Am5x86	B-Device
upgrade	O
chip	O
,	O
which	O
was	O
essentially	O
an	O
improved	O
80486	B-General_Concept
with	O
double	O
the	O
cache	B-General_Concept
and	O
a	B-Application
quad	O
multiplier	O
that	O
also	O
worked	O
with	O
the	O
original	O
486DX	B-General_Concept
motherboards	B-Device
.	O
</s>
<s>
Am5x86	B-Device
was	O
the	O
first	O
processor	O
to	O
use	O
AMD	O
's	O
performance	O
rating	O
and	O
was	O
marketed	O
as	O
Am5x86-P75	O
,	O
with	O
claims	O
that	O
it	O
was	O
equivalent	O
to	O
the	O
Pentium	B-General_Concept
75	O
.	O
</s>
<s>
Kingston	O
Technology	O
launched	O
a	B-Application
'	O
TurboChip	O
 '	O
486	B-General_Concept
system	O
upgrade	O
that	O
used	O
a	B-Application
133	O
MHz	O
Am5x86	B-Device
.	O
</s>
<s>
Intel	O
responded	O
by	O
making	O
a	B-Application
Pentium	B-Device
OverDrive	I-Device
upgrade	O
chip	O
for	O
486	B-General_Concept
motherboards	B-Device
,	O
which	O
was	O
a	B-Application
modified	O
Pentium	B-General_Concept
core	O
that	O
ran	O
up	O
to	O
83	O
MHz	O
on	O
boards	O
with	O
a	B-Application
25	O
or	O
33	O
MHz	O
front-side	O
bus	B-General_Concept
clock	O
.	O
</s>
<s>
OverDrive	O
was	O
n't	O
popular	O
due	O
to	O
speed	O
and	O
price	O
.	O
</s>
<s>
The	O
486	B-General_Concept
was	O
declared	O
obsolete	O
as	O
early	O
as	O
1996	O
,	O
with	O
a	B-Application
Florida	O
school	O
district	O
's	O
purchase	O
of	O
a	B-Application
fleet	O
of	O
486DX4	B-Device
machines	O
in	O
that	O
year	O
sparking	O
controversy	O
.	O
</s>
<s>
New	O
computers	O
equipped	O
with	O
486	B-General_Concept
processors	I-General_Concept
in	O
discount	O
warehouses	O
became	O
scarce	O
,	O
and	O
an	O
IBM	O
spokesperson	O
called	O
it	O
a	B-Application
"	O
dinosaur	O
"	O
.	O
</s>
<s>
Even	O
after	O
the	O
Pentium	B-General_Concept
series	O
of	O
processors	O
gained	O
a	B-Application
foothold	O
in	O
the	O
market	O
,	O
however	O
,	O
Intel	O
continued	O
to	O
produce	O
486	B-General_Concept
cores	O
for	O
industrial	O
embedded	O
applications	O
.	O
</s>
<s>
Intel	O
discontinued	O
production	O
of	O
i486	B-General_Concept
processors	O
in	O
late	O
2007	O
.	O
</s>
<s>
The	O
instruction	B-General_Concept
set	I-General_Concept
of	O
the	O
i486	B-General_Concept
is	O
very	O
similar	O
to	O
the	O
i386	B-General_Concept
,	O
with	O
the	O
addition	O
of	O
a	B-Application
few	O
extra	O
instructions	O
,	O
such	O
as	O
CMPXCHG	O
,	O
a	B-Application
compare-and-swap	B-Operating_System
atomic	B-General_Concept
operation	I-General_Concept
,	O
and	O
XADD	B-Operating_System
,	O
a	B-Application
fetch-and-add	B-Operating_System
atomic	B-General_Concept
operation	I-General_Concept
that	O
returned	O
the	O
original	O
value	O
(	O
unlike	O
a	B-Application
standard	O
ADD	O
,	O
which	O
returns	O
flags	B-General_Concept
only	O
)	O
.	O
</s>
<s>
The	O
i486	B-General_Concept
's	O
performance	O
architecture	O
is	O
a	B-Application
vast	O
improvement	O
over	O
the	O
i386	B-General_Concept
.	O
</s>
<s>
It	O
has	O
an	O
on-chip	O
unified	O
instruction	O
and	O
data	B-General_Concept
cache	I-General_Concept
,	O
an	O
on-chip	O
floating-point	B-General_Concept
unit	I-General_Concept
(	O
FPU	B-General_Concept
)	O
and	O
an	O
enhanced	O
bus	B-General_Concept
interface	O
unit	O
.	O
</s>
<s>
Due	O
to	O
the	O
tight	O
pipelining	B-General_Concept
,	O
sequences	O
of	O
simple	O
instructions	O
(	O
such	O
as	O
ALU	B-General_Concept
reg	O
,	O
reg	O
and	O
ALU	B-General_Concept
reg	O
,	O
im	O
)	O
could	O
sustain	O
single-clock-cycle	O
throughput	O
(	O
one	O
instruction	O
completed	O
every	O
clock	O
)	O
.	O
</s>
<s>
These	O
improvements	O
yielded	O
a	B-Application
rough	O
doubling	O
in	O
integer	O
ALU	B-General_Concept
performance	O
over	O
the	O
i386	B-General_Concept
at	O
the	O
same	O
clock	O
rate	O
.	O
</s>
<s>
A	B-Application
16	O
MHz	O
i486	B-General_Concept
therefore	O
had	O
performance	O
similar	O
to	O
a	B-Application
33	O
MHz	O
i386	B-General_Concept
.	O
</s>
<s>
The	O
older	O
design	O
had	O
to	O
reach	O
50MHz	O
to	O
be	O
comparable	O
with	O
a	B-Application
25	O
MHz	O
i486	B-General_Concept
part	O
.	O
</s>
<s>
An	O
8	O
KB	O
on-chip	O
(	O
level	O
1	O
)	O
SRAM	B-Architecture
cache	B-General_Concept
stores	O
the	O
most	O
recently	O
used	O
instructions	O
and	O
data	O
(	O
16KB	O
and/or	O
write-back	O
on	O
some	O
later	O
models	O
)	O
.	O
</s>
<s>
The	O
i386	B-General_Concept
had	O
no	O
internal	B-General_Concept
cache	I-General_Concept
but	O
supported	O
a	B-Application
slower	O
off-chip	O
cache	B-General_Concept
(	O
not	O
officially	O
a	B-Application
level	O
2	B-Device
cache	B-General_Concept
because	O
i386	B-General_Concept
had	O
no	O
internal	O
level	O
1	O
cache	B-General_Concept
)	O
.	O
</s>
<s>
An	O
enhanced	O
external	O
bus	B-General_Concept
protocol	O
to	O
enable	O
cache	B-General_Concept
coherency	O
and	O
a	B-Application
new	O
burst	O
mode	O
for	O
memory	O
accesses	O
to	O
fill	O
a	B-Application
cache	B-General_Concept
line	O
of	O
16	O
bytes	O
within	O
five	O
bus	B-General_Concept
cycles	O
.	O
</s>
<s>
The	O
386	B-General_Concept
needed	O
eight	O
bus	B-General_Concept
cycles	O
to	O
transfer	O
the	O
same	O
amount	O
of	O
data	O
.	O
</s>
<s>
Tightly	O
coupled	O
pipelining	B-General_Concept
completes	O
a	B-Application
simple	O
instruction	O
like	O
ALU	B-General_Concept
reg	O
,	O
reg	O
or	O
ALU	B-General_Concept
reg	O
,	O
im	O
every	O
clock	O
cycle	O
(	O
after	O
a	B-Application
latency	O
of	O
several	O
cycles	O
)	O
.	O
</s>
<s>
The	O
i386	B-General_Concept
needed	O
two	O
clock	O
cycles	O
.	O
</s>
<s>
Integrated	O
FPU	B-General_Concept
(	O
disabled	O
or	O
absent	O
in	O
SX	O
models	O
)	O
with	O
a	B-Application
dedicated	O
local	B-Architecture
bus	I-Architecture
;	O
together	O
with	O
faster	O
algorithms	O
on	O
more	O
extensive	O
hardware	O
than	O
in	O
the	O
i387	O
,	O
this	O
performed	O
floating-point	O
calculations	O
faster	O
than	O
the	O
i386/i387	O
combination	O
.	O
</s>
<s>
Improved	O
MMU	B-General_Concept
performance	O
.	O
</s>
<s>
New	O
instructions	O
:	O
XADD	B-Operating_System
,	O
BSWAP	O
,	O
CMPXCHG	O
,	O
INVD	O
,	O
WBINVD	O
,	O
INVLPG	O
.	O
</s>
<s>
Just	O
as	O
in	O
the	O
i386	B-General_Concept
,	O
a	B-Application
flat	O
4GB	O
memory	O
model	O
could	O
be	O
implemented	O
.	O
</s>
<s>
All	O
"	O
segment	O
selector	O
"	O
registers	O
could	O
be	O
set	O
to	O
a	B-Application
neutral	O
value	O
in	O
protected	B-Application
mode	I-Application
,	O
or	O
to	O
zero	O
in	O
real	B-Application
mode	I-Application
,	O
and	O
using	O
only	O
the	O
32-bit	O
"	O
offset	O
registers	O
"	O
(	O
x86-terminology	O
for	O
general	O
CPU	O
registers	O
used	O
as	O
address	O
registers	O
)	O
as	O
a	B-Application
linear	O
32-bit	O
virtual	O
address	O
bypassing	O
the	O
segmentation	O
logic	O
.	O
</s>
<s>
(	O
Real	B-Application
mode	I-Application
had	O
no	O
virtual	O
addresses	O
.	O
)	O
</s>
<s>
Just	O
as	O
with	O
the	O
i386	B-General_Concept
,	O
circumventing	O
memory	O
segmentation	O
could	O
substantially	O
improve	O
performance	O
for	O
some	O
operating	B-General_Concept
systems	I-General_Concept
and	O
applications	O
.	O
</s>
<s>
On	O
a	B-Application
typical	O
PC	B-Device
motherboard	I-Device
,	O
either	O
four	O
matched	O
30-pin	O
(	O
8-bit	O
)	O
SIMMs	B-General_Concept
or	O
one	O
72-pin	O
(	O
32-bit	O
)	O
SIMM	B-General_Concept
per	O
bank	O
were	O
required	O
to	O
fit	O
the	O
i486	B-General_Concept
's	O
32-bit	O
data	B-General_Concept
bus	I-General_Concept
.	O
</s>
<s>
The	O
address	B-Architecture
bus	I-Architecture
used	O
30-bits	O
(	O
A31	O
..	O
A2	O
)	O
complemented	O
by	O
four	O
byte-select	O
pins	O
(	O
instead	O
of	O
A0	O
,	O
A1	O
)	O
to	O
allow	O
for	O
any	O
8/16/32	O
-bit	O
selection	O
.	O
</s>
<s>
Intel	B-Device
RapidCAD	I-Device
:	O
a	B-Application
specially	O
packaged	O
Intel	O
486DX	B-General_Concept
and	O
a	B-Application
dummy	O
floating-point	B-General_Concept
unit	I-General_Concept
(	O
FPU	B-General_Concept
)	O
designed	O
as	O
pin-compatible	O
replacements	O
for	O
an	O
i386	B-General_Concept
processor	O
and	O
80387	O
FPU	B-General_Concept
.	O
</s>
<s>
i486SL-NM	O
:	O
i486SL	O
based	O
on	O
i486SX	B-Device
.	O
</s>
<s>
i487SX	O
(	O
P23N	O
)	O
:	O
i486DX	B-General_Concept
with	O
one	O
extra	O
pin	O
sold	O
as	O
an	O
FPU	B-General_Concept
upgrade	O
to	O
i486SX	B-Device
systems	O
;	O
When	O
the	O
i487SX	O
was	O
installed	O
,	O
it	O
ensured	O
that	O
an	O
i486SX	B-Device
was	O
present	O
on	O
the	O
motherboard	B-Device
but	O
disabled	O
it	O
,	O
taking	O
over	O
all	O
of	O
its	O
functions	O
.	O
</s>
<s>
i486	B-General_Concept
OverDrive	O
(	O
P23T/P24T	O
)	O
:	O
i486SX	B-Device
,	O
i486SX2	B-Device
,	O
i486DX2	B-Device
or	O
i486DX4	B-Device
.	O
</s>
<s>
Marked	O
as	O
upgrade	O
processors	O
,	O
some	O
models	O
had	O
different	O
pinouts	O
or	O
voltage-handling	O
abilities	O
from	O
"	O
standard	O
"	O
chips	O
of	O
the	O
same	O
speed	O
.	O
</s>
<s>
Fitted	O
to	O
a	B-Application
coprocessor	O
or	O
"	O
OverDrive	O
"	O
socket	O
on	O
the	O
motherboard	B-Device
,	O
they	O
worked	O
the	O
same	O
as	O
the	O
i487SX	O
.	O
</s>
<s>
The	O
maximal	O
internal	O
clock	O
frequency	O
(	O
on	O
Intel	O
's	O
versions	O
)	O
ranged	O
from	O
16	O
to	O
100MHz	O
.	O
</s>
<s>
The	O
16MHz	O
i486SX	B-Device
model	O
was	O
used	O
by	O
Dell	O
Computers	O
.	O
</s>
<s>
One	O
of	O
the	O
few	O
i486	B-General_Concept
models	O
specified	O
for	O
a	B-Application
50MHz	O
bus	B-General_Concept
(	O
486DX-50	O
)	O
initially	O
had	O
overheating	O
problems	O
and	O
was	O
moved	O
to	O
the	O
0.8-micrometer	O
fabrication	O
process	O
.	O
</s>
<s>
However	O
,	O
problems	O
continued	O
when	O
the	O
486DX-50	O
was	O
installed	O
in	O
local-bus	O
systems	O
due	O
to	O
the	O
high	O
bus	B-General_Concept
speed	O
,	O
making	O
it	O
unpopular	O
with	O
mainstream	O
consumers	O
.	O
</s>
<s>
Local-bus	O
video	O
was	O
considered	O
a	B-Application
requirement	O
at	O
the	O
time	O
,	O
though	O
it	O
remained	O
popular	O
with	O
users	O
of	O
EISA	B-Device
systems	O
.	O
</s>
<s>
The	O
486DX-50	O
was	O
soon	O
eclipsed	O
by	O
the	O
clock-doubled	O
i486DX2	B-Device
,	O
which	O
although	O
running	O
the	O
internal	O
CPU	O
logic	O
at	O
twice	O
the	O
external	O
bus	B-General_Concept
speed	O
(	O
50MHz	O
)	O
,	O
was	O
nevertheless	O
slower	O
because	O
the	O
external	O
bus	B-General_Concept
ran	O
at	O
only	O
25MHz	O
.	O
</s>
<s>
The	O
i486DX2	B-Device
at	O
66MHz	O
(	O
with	O
33MHz	O
external	O
bus	B-General_Concept
)	O
was	O
faster	O
than	O
the	O
486DX-50	O
,	O
overall	O
.	O
</s>
<s>
More	O
powerful	O
i486	B-General_Concept
iterations	O
such	O
as	O
the	O
OverDrive	O
and	O
DX4	B-Device
were	O
less	O
popular	O
(	O
the	O
latter	O
available	O
as	O
an	O
OEM	O
part	O
only	O
)	O
,	O
as	O
they	O
came	O
out	O
after	O
Intel	O
had	O
released	O
the	O
next-generation	B-General_Concept
Pentium	I-General_Concept
processor	O
family	O
.	O
</s>
<s>
Certain	O
steppings	O
of	O
the	O
DX4	B-Device
also	O
officially	O
supported	O
50MHz	O
bus	B-General_Concept
operation	O
,	O
but	O
it	O
was	O
a	B-Application
seldom-used	O
feature	O
.	O
</s>
<s>
|	O
||	O
i486SX	B-Device
(	O
P23	O
)	O
||	O
16	O
,	O
20	O
,	O
25MHz33MHz	O
||	O
5	O
V	B-Application
||	O
8KB	O
WT	O
||	O
September	O
1991September	O
1992	O
||	O
An	O
i486DX	B-General_Concept
with	O
the	O
FPU	B-General_Concept
part	O
disabled	O
;	O
later	O
versions	O
had	O
the	O
FPU	B-General_Concept
removed	O
from	O
the	O
die	O
to	O
reduce	O
area	O
and	O
hence	O
cost	O
.	O
</s>
<s>
|	O
||	O
IntelDX4	O
(	O
P24C	O
)	O
||	O
75/25	O
,	O
100/33MHz	O
||	O
3.3	O
V	B-Application
||	O
16KB	O
WT	O
||	O
March	O
1994	O
||	O
Designed	O
to	O
run	O
at	O
triple	O
clock	O
rate	O
(	O
not	O
quadruple	O
,	O
as	O
often	O
believed	O
;	O
the	O
DX3	O
,	O
which	O
was	O
meant	O
to	O
run	O
at	O
2.5	O
×	O
the	O
clock	O
speed	O
,	O
was	O
never	O
released	O
)	O
.	O
</s>
<s>
DX4	B-Device
models	O
that	O
featured	O
write-back	O
cache	B-General_Concept
were	O
identified	O
by	O
an	O
"	O
&	O
EW	O
"	O
laser-etched	O
into	O
their	O
top	O
surface	O
,	O
while	O
the	O
write-through	O
models	O
were	O
identified	O
by	O
"	O
&	O
E	O
"	O
.	O
</s>
<s>
|	O
||	O
i486DX2WB	O
(	O
P24D	O
)	O
||	O
50/25MHz	O
,	O
66/33MHz	O
||	O
5	O
V	B-Application
||	O
8KB	O
WB	O
||	O
October	O
1994	O
||	O
Enabled	O
write-back	O
cache	B-General_Concept
.	O
</s>
<s>
|	O
||	O
i486GX	O
||	O
up	O
to	O
33MHz	O
||	O
3.3	O
V	B-Application
||	O
8KB	O
WT	O
||	O
||	O
Embedded	O
ultra-low-power	O
CPU	O
with	O
all	O
features	O
of	O
the	O
i486SX	B-Device
and	O
16-bit	O
external	B-General_Concept
data	I-General_Concept
bus	I-General_Concept
.	O
</s>
<s>
Processors	O
compatible	O
with	O
the	O
i486	B-General_Concept
were	O
produced	O
by	O
companies	O
such	O
as	O
IBM	O
,	O
Texas	O
Instruments	O
,	O
AMD	O
,	O
Cyrix	O
,	O
UMC	O
,	O
and	O
STMicroelectronics	O
(	O
formerly	O
SGS-Thomson	O
)	O
.	O
</s>
<s>
Some	O
were	O
clones	O
(	O
identical	O
at	O
the	O
microarchitectural	O
level	O
)	O
,	O
others	O
were	O
clean	O
room	O
implementations	O
of	O
the	O
Intel	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
(	O
IBM	O
's	O
multiple-source	O
requirement	O
was	O
one	O
of	O
the	O
reasons	O
behind	O
its	O
x86	B-Operating_System
manufacturing	O
since	O
the	O
80286	B-General_Concept
.	O
)	O
</s>
<s>
The	O
i486	B-General_Concept
was	O
,	O
however	O
,	O
covered	O
by	O
many	O
Intel	O
patents	O
,	O
including	O
from	O
the	O
prior	O
i386	B-General_Concept
.	O
</s>
<s>
Intel	O
and	O
IBM	O
had	O
broad	O
cross-licenses	O
of	O
these	O
patents	O
,	O
and	O
AMD	O
was	O
granted	O
rights	O
to	O
the	O
relevant	O
patents	O
in	O
the	O
1995	O
settlement	O
of	O
a	B-Application
lawsuit	O
between	O
the	O
companies	O
.	O
</s>
<s>
AMD	O
produced	O
several	O
clones	O
using	O
a	B-Application
40MHz	O
bus	B-General_Concept
(	O
486DX-40	O
,	O
486DX/2	O
-80	O
,	O
and	O
486DX/4	O
-120	O
)	O
which	O
had	O
no	O
Intel	O
equivalent	O
,	O
as	O
well	O
as	O
a	B-Application
part	O
specified	O
for	O
90MHz	O
,	O
using	O
a	B-Application
30MHz	O
external	O
clock	O
,	O
that	O
was	O
sold	O
only	O
to	O
OEMs	O
.	O
</s>
<s>
The	O
fastest	O
running	O
i486-compatible	O
CPU	O
,	O
the	O
Am5x86	B-Device
,	O
ran	O
at	O
133MHz	O
and	O
was	O
released	O
by	O
AMD	O
in	O
1995	O
.	O
</s>
<s>
Cyrix	O
made	O
a	B-Application
variety	O
of	O
i486-compatible	O
processors	O
,	O
positioned	O
at	O
the	O
cost-sensitive	O
desktop	O
and	O
low-power	O
(	O
laptop	O
)	O
markets	O
.	O
</s>
<s>
Unlike	O
AMD	O
's	O
486	B-General_Concept
clones	O
,	O
the	O
Cyrix	O
processors	O
were	O
the	O
result	O
of	O
clean-room	O
reverse	O
engineering	O
.	O
</s>
<s>
Cyrix	O
's	O
early	O
offerings	O
included	O
the	O
486DLC	O
and	O
486SLC	O
,	O
two	O
hybrid	O
chips	O
that	O
plugged	O
into	O
386DX	B-General_Concept
or	O
SX	O
sockets	O
respectively	O
,	O
and	O
offered	O
1KB	O
of	O
cache	B-General_Concept
(	O
versus	O
8KB	O
for	O
the	O
then-current	O
Intel/AMD	O
parts	O
)	O
.	O
</s>
<s>
Cyrix	O
also	O
made	O
"	O
real	O
"	O
486	B-General_Concept
processors	I-General_Concept
,	O
which	O
plugged	O
into	O
the	O
i486	B-General_Concept
's	O
socket	O
and	O
offered	O
2	B-Device
or	O
8KB	O
of	O
cache	B-General_Concept
.	O
</s>
<s>
Clock-for-clock	O
,	O
the	O
Cyrix-made	O
chips	O
were	O
generally	O
slower	O
than	O
their	O
Intel/AMD	O
equivalents	O
,	O
though	O
later	O
products	O
with	O
8KB	O
caches	B-General_Concept
were	O
more	O
competitive	O
,	O
albeit	O
late	O
to	O
market	O
.	O
</s>
<s>
The	O
Motorola	B-Device
68040	I-Device
,	O
while	O
not	O
i486	B-General_Concept
compatible	O
,	O
was	O
often	O
positioned	O
as	O
its	O
equivalent	O
in	O
features	O
and	O
performance	O
.	O
</s>
<s>
Clock-for-clock	O
basis	O
the	O
Motorola	B-Device
68040	I-Device
could	O
significantly	O
outperform	O
the	O
Intel	O
chip	O
.	O
</s>
<s>
However	O
,	O
the	O
i486	B-General_Concept
had	O
the	O
ability	O
to	O
be	O
clocked	O
significantly	O
faster	O
without	O
overheating	O
.	O
</s>
<s>
Motorola	B-Device
68040	I-Device
performance	O
lagged	O
behind	O
the	O
later	O
production	O
i486	B-General_Concept
systems	O
.	O
</s>
<s>
Early	O
i486-based	O
computers	O
were	O
equipped	O
with	O
several	O
ISA	B-Architecture
slots	I-Architecture
(	O
using	O
an	O
emulated	B-Application
PC/AT	B-Architecture
-bus	I-Architecture
)	O
and	O
sometimes	O
one	O
or	O
two	O
8-bit-only	O
slots	O
(	O
compatible	O
with	O
the	O
PC/XT	O
-bus	O
)	O
.	O
</s>
<s>
Many	O
motherboards	B-Device
enabled	O
overclocking	O
of	O
these	O
from	O
the	O
default	O
6	O
or	O
8MHz	O
to	O
perhaps	O
16.7	O
or	O
20MHz	O
(	O
half	O
the	O
i486	B-General_Concept
bus	B-General_Concept
clock	O
)	O
in	O
several	O
steps	O
,	O
often	O
from	O
within	O
the	O
BIOS	B-Operating_System
setup	O
.	O
</s>
<s>
This	O
could	O
give	O
significant	O
performance	O
gains	O
(	O
such	O
as	O
for	O
old	O
video	O
cards	O
moved	O
from	O
a	B-Application
386	B-General_Concept
or	O
286	B-General_Concept
computer	O
,	O
for	O
example	O
)	O
.	O
</s>
<s>
However	O
,	O
operation	O
beyond	O
8	O
or	O
10MHz	O
could	O
sometimes	O
lead	O
to	O
stability	O
problems	O
,	O
at	O
least	O
in	O
systems	O
equipped	O
with	O
SCSI	B-Architecture
or	O
sound	B-Device
cards	I-Device
.	O
</s>
<s>
Some	O
motherboards	B-Device
came	O
equipped	O
with	O
a	B-Application
32-bit	O
EISA	B-Device
bus	I-Device
that	O
was	O
backward	B-General_Concept
compatible	I-General_Concept
with	O
the	O
ISA-standard	O
.	O
</s>
<s>
EISA	B-Device
offered	O
attractive	O
features	O
such	O
as	O
increased	O
bandwidth	O
,	O
extended	O
addressing	O
,	O
IRQ	O
sharing	O
,	O
and	O
card	O
configuration	O
through	O
software	O
(	O
rather	O
than	O
through	O
jumpers	O
,	O
DIP	O
switches	O
,	O
etc	O
.	O
)	O
</s>
<s>
However	O
,	O
EISA	B-Device
cards	O
were	O
expensive	O
and	O
therefore	O
mostly	O
employed	O
in	O
servers	O
and	O
workstations	O
.	O
</s>
<s>
Consumer	O
desktops	O
often	O
used	O
the	O
simpler	O
,	O
faster	O
VESA	O
Local	B-Architecture
Bus	I-Architecture
(	O
VLB	O
)	O
.	O
</s>
<s>
Unfortunately	O
prone	O
to	O
electrical	O
and	O
timing-based	O
instability	O
;	O
typical	O
consumer	O
desktops	O
had	O
ISA	B-Architecture
slots	I-Architecture
combined	O
with	O
a	B-Application
single	O
VLB	O
slot	O
for	O
a	B-Application
video	O
card	O
.	O
</s>
<s>
VLB	O
was	O
gradually	O
replaced	O
by	O
PCI	B-Protocol
during	O
the	O
final	O
years	O
of	O
the	O
i486	B-General_Concept
period	O
.	O
</s>
<s>
Few	O
Pentium	B-General_Concept
class	O
motherboards	B-Device
had	O
VLB	O
support	O
as	O
VLB	O
was	O
based	O
directly	O
on	O
the	O
i486	B-General_Concept
bus	B-General_Concept
;	O
much	O
different	O
from	O
the	O
P5	B-General_Concept
Pentium-bus	O
.	O
</s>
<s>
ISA	B-Architecture
persisted	O
through	O
the	O
P5	B-General_Concept
Pentium	B-General_Concept
generation	O
and	O
was	O
not	O
completely	O
displaced	O
by	O
PCI	B-Protocol
until	O
the	O
Pentium	B-General_Concept
III	O
era	O
.	O
</s>
<s>
Late	O
i486	B-General_Concept
boards	O
were	O
normally	O
equipped	O
with	O
both	O
PCI	B-Protocol
and	O
ISA	B-Architecture
slots	I-Architecture
,	O
and	O
sometimes	O
a	B-Application
single	O
VLB	O
slot	O
.	O
</s>
<s>
In	O
this	O
configuration	O
,	O
VLB	O
or	O
PCI	B-Protocol
throughput	O
suffered	O
depending	O
on	O
how	O
buses	O
were	O
bridged	O
.	O
</s>
<s>
Initially	O
,	O
the	O
VLB	O
slot	O
in	O
these	O
systems	O
was	O
usually	O
fully	O
compatible	O
only	O
with	O
video	O
cards	O
(	O
fitting	O
as	O
"	O
VESA	O
"	O
stands	O
for	O
Video	O
Electronics	O
Standards	O
Association	O
)	O
;	O
VLB-IDE	O
,	O
multi	O
I/O	O
,	O
or	O
SCSI	B-Architecture
cards	O
could	O
have	O
problems	O
on	O
motherboards	B-Device
with	O
PCI	B-Protocol
slots	I-Protocol
.	O
</s>
<s>
The	O
VL-Bus	O
operated	O
at	O
the	O
same	O
clock	O
speed	O
as	O
the	O
i486-bus	O
(	O
basically	O
a	B-Application
local	B-Architecture
bus	I-Architecture
)	O
while	O
the	O
PCI	B-Protocol
bus	I-Protocol
also	O
usually	O
depended	O
on	O
the	O
i486	B-General_Concept
clock	O
but	O
sometimes	O
had	O
a	B-Application
divider	O
setting	O
available	O
via	O
the	O
BIOS	B-Operating_System
.	O
</s>
<s>
This	O
could	O
be	O
set	O
to	O
1/1	O
or	O
1/2	O
,	O
sometimes	O
even	O
2/3	O
(	O
for	O
50MHz	O
CPU	O
clocks	O
)	O
.	O
</s>
<s>
Some	O
motherboards	B-Device
limited	O
the	O
PCI	B-Protocol
clock	O
to	O
the	O
specified	O
maximum	O
of	O
33MHz	O
and	O
certain	O
network	O
cards	O
depended	O
on	O
this	O
frequency	O
for	O
correct	O
bit-rates	O
.	O
</s>
<s>
The	O
ISA	B-Architecture
clock	O
was	O
typically	O
generated	O
by	O
a	B-Application
divider	O
of	O
the	O
CPU/VLB/PCI	O
clock	O
.	O
</s>
<s>
One	O
of	O
the	O
earliest	O
complete	O
systems	O
to	O
use	O
the	O
i486	B-General_Concept
chip	O
was	O
the	O
Apricot	O
VX	O
FT	O
,	O
produced	O
by	O
British	O
hardware	O
manufacturer	O
Apricot	O
Computers	O
.	O
</s>
<s>
Even	O
overseas	O
in	O
the	O
United	O
States	O
it	O
was	O
popularized	O
as	O
"	O
The	O
World	O
's	O
First	O
486	B-General_Concept
"	O
.	O
</s>
<s>
Later	O
i486	B-General_Concept
boards	O
supported	O
Plug-And-Play	B-Device
,	O
a	B-Application
specification	O
designed	O
by	O
Microsoft	O
that	O
began	O
as	O
a	B-Application
part	O
of	O
Windows	B-Application
95	I-Application
to	O
make	O
component	O
installation	O
easier	O
for	O
consumers	O
.	O
</s>
<s>
The	O
AMD	B-Device
Am5x86	I-Device
and	O
Cyrix	B-Device
Cx5x86	I-Device
were	O
the	O
last	O
i486	B-General_Concept
processors	O
often	O
used	O
in	O
late-generation	O
i486	B-General_Concept
motherboards	B-Device
.	O
</s>
<s>
They	O
came	O
with	O
PCI	B-Protocol
slots	I-Protocol
and	O
72-pin	O
SIMMs	B-General_Concept
that	O
were	O
designed	O
to	O
run	O
Windows	B-Application
95	I-Application
,	O
and	O
also	O
used	O
for	O
80486	B-General_Concept
motherboards	B-Device
upgrades	O
.	O
</s>
<s>
While	O
the	O
Cyrix	B-Device
Cx5x86	I-Device
faded	O
when	O
the	O
Cyrix	B-General_Concept
6x86	I-General_Concept
took	O
over	O
,	O
the	O
AMD	B-Device
Am5x86	I-Device
remained	O
important	O
given	O
AMD	O
K5	O
delays	O
.	O
</s>
<s>
Computers	O
based	O
on	O
the	O
i486	B-General_Concept
remained	O
popular	O
through	O
the	O
late	O
1990s	O
,	O
serving	O
as	O
low-end	O
processors	O
for	O
entry-level	O
PCs	B-Device
.	O
</s>
<s>
Production	O
for	O
traditional	O
desktop	O
and	O
laptop	O
systems	O
ceased	O
in	O
1998	O
,	O
when	O
Intel	O
introduced	O
the	O
Celeron	B-Device
brand	O
,	O
though	O
it	O
continued	O
to	O
be	O
produced	O
for	O
embedded	B-Architecture
systems	I-Architecture
through	O
the	O
late	O
2000s	O
.	O
</s>
<s>
In	O
the	O
general-purpose	O
desktop	O
computer	O
role	O
,	O
i486-based	O
machines	O
remained	O
in	O
use	O
into	O
the	O
early	O
2000s	O
,	O
especially	O
as	O
Windows	B-Application
95	I-Application
through	O
98	B-Device
and	O
Windows	B-Device
NT	I-Device
4.0	I-Device
were	O
the	O
last	O
Microsoft	O
operating	B-General_Concept
systems	I-General_Concept
to	O
officially	O
support	O
i486-based	O
systems	O
.	O
</s>
<s>
Windows	B-Application
2000	I-Application
could	O
run	O
on	O
a	B-Application
i486-based	O
machine	O
,	O
although	O
with	O
a	B-Application
less	O
than	O
optimal	O
performance	O
,	O
due	O
to	O
the	O
minimum	O
hardware	O
requirement	O
of	O
a	B-Application
Pentium	B-General_Concept
processor	O
.	O
</s>
<s>
However	O
,	O
as	O
they	O
were	O
overtaken	O
by	O
newer	O
operating	B-General_Concept
systems	I-General_Concept
,	O
i486	B-General_Concept
systems	O
fell	O
out	O
of	O
use	O
except	O
for	O
backward	B-General_Concept
compatibility	I-General_Concept
with	O
older	O
programs	O
(	O
most	O
notably	O
games	O
)	O
,	O
especially	O
given	O
problems	O
running	O
on	O
newer	O
operating	B-General_Concept
systems	I-General_Concept
.	O
</s>
<s>
However	O
,	O
DOSBox	B-Application
was	O
available	O
for	O
later	O
operating	B-General_Concept
systems	I-General_Concept
and	O
provides	O
emulation	B-Application
of	O
the	O
i486	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
,	O
as	O
well	O
as	O
full	O
compatibility	O
with	O
most	O
DOS-based	O
programs	O
.	O
</s>
<s>
The	O
i486	B-General_Concept
was	O
eventually	O
overtaken	O
by	O
the	O
Pentium	B-General_Concept
for	O
personal	B-Device
computer	I-Device
applications	O
,	O
although	O
Intel	O
continued	O
production	O
for	O
use	O
in	O
embedded	B-Architecture
systems	I-Architecture
.	O
</s>
<s>
In	O
May	O
2006	O
,	O
Intel	O
announced	O
that	O
production	O
of	O
the	O
i486	B-General_Concept
would	O
stop	O
at	O
the	O
end	O
of	O
September	O
2007	O
.	O
</s>
<s>
Linux	B-Operating_System
6	O
will	O
likely	O
be	O
the	O
last	O
Linux	B-Operating_System
kernel	I-Operating_System
to	O
support	O
i486	B-General_Concept
.	O
</s>
