<s>
In	O
digital	O
electronics	O
,	O
especially	O
computing	O
,	O
hardware	B-General_Concept
registers	I-General_Concept
are	O
circuits	O
typically	O
composed	O
of	O
flip	B-General_Concept
flops	I-General_Concept
,	O
often	O
with	O
many	O
characteristics	O
similar	O
to	O
memory	O
,	O
such	O
as	O
:	O
</s>
<s>
Using	O
an	O
address	B-General_Concept
to	O
select	O
a	O
particular	O
register	O
in	O
a	O
manner	O
similar	O
to	O
a	O
memory	B-General_Concept
address	I-General_Concept
.	O
</s>
<s>
Their	O
distinguishing	O
characteristic	O
,	O
however	O
,	O
is	O
that	O
they	O
also	O
have	O
special	O
hardware-related	O
functions	O
beyond	O
those	O
of	O
ordinary	O
memory	O
.	O
</s>
<s>
So	O
,	O
depending	O
on	O
the	O
point	O
of	O
view	O
,	O
hardware	B-General_Concept
registers	I-General_Concept
are	O
like	O
memory	O
with	O
additional	O
hardware-related	O
functions	O
;	O
or	O
,	O
memory	O
circuits	O
are	O
like	O
hardware	B-General_Concept
registers	I-General_Concept
that	O
just	O
store	O
data	O
.	O
</s>
<s>
Hardware	B-General_Concept
registers	I-General_Concept
are	O
used	O
in	O
the	O
interface	B-Application
between	O
software	O
and	O
peripherals	B-Device
.	O
</s>
<s>
Some	O
hardware	B-Architecture
devices	O
also	O
include	O
registers	O
that	O
are	O
not	O
visible	O
to	O
software	O
,	O
for	O
their	O
internal	O
use	O
.	O
</s>
<s>
Depending	O
on	O
their	O
complexity	O
,	O
modern	O
hardware	B-Architecture
devices	O
can	O
have	O
many	O
registers	O
.	O
</s>
<s>
Typical	O
uses	O
of	O
hardware	B-General_Concept
registers	I-General_Concept
include	O
:	O
</s>
<s>
status	O
reporting	O
such	O
as	O
whether	O
a	O
certain	O
event	O
has	O
occurred	O
in	O
the	O
hardware	B-Architecture
unit	O
,	O
for	O
example	O
a	O
modem	O
status	O
register	O
or	O
a	O
line	O
status	O
register	O
.	O
</s>
<s>
Reading	O
a	O
hardware	B-General_Concept
register	I-General_Concept
in	O
"	O
peripheral	O
units	O
"	O
—	O
computer	B-Architecture
hardware	I-Architecture
outside	O
the	O
CPU	O
—	O
involves	O
accessing	O
its	O
memory-mapped	B-Architecture
I/O	I-Architecture
address	B-General_Concept
or	O
port-mapped	B-General_Concept
I/O	I-General_Concept
address	B-General_Concept
with	O
a	O
"	O
load	O
"	O
or	O
"	O
store	O
"	O
instruction	O
,	O
issued	O
by	O
the	O
processor	O
.	O
</s>
<s>
Hardware	B-General_Concept
registers	I-General_Concept
are	O
addressed	O
in	O
words	O
,	O
but	O
sometimes	O
only	O
use	O
a	O
few	O
bits	O
of	O
the	O
word	O
read	O
in	O
to	O
,	O
or	O
written	O
out	O
to	O
the	O
register	O
.	O
</s>
<s>
Commercial	O
design	O
tools	O
simplify	O
and	O
automate	O
memory-mapped	O
register	O
specification	O
and	O
code	O
generation	O
for	O
hardware	B-Architecture
,	O
firmware	B-Application
,	O
hardware	B-Language
verification	I-Language
,	O
testing	O
and	O
documentation	O
.	O
</s>
<s>
They	O
may	O
be	O
the	O
only	O
option	O
in	O
designs	O
that	O
cannot	O
afford	O
gates	O
for	O
the	O
relatively	O
large	O
logic	O
circuit	O
and	O
signal	O
routing	O
needed	O
for	O
register	O
data	O
readback	O
,	O
such	O
as	O
the	O
Atari	B-General_Concept
2600	I-General_Concept
games	O
console	O
's	O
TIA	B-General_Concept
chip	O
.	O
</s>
<s>
However	O
,	O
write-only	O
registers	O
make	O
debugging	O
more	O
difficult	O
and	O
lead	O
to	O
the	O
read-modify-write	B-Operating_System
problem	O
so	O
read/write	O
registers	O
are	O
preferred	O
.	O
</s>
<s>
On	O
PCs	O
,	O
write-only	O
registers	O
made	O
it	O
difficult	O
for	O
the	O
Advanced	B-Device
Configuration	I-Device
and	I-Device
Power	I-Device
Interface	I-Device
(	O
ACPI	B-Device
)	O
to	O
determine	O
the	O
device	O
's	O
state	O
when	O
entering	O
sleep	O
mode	O
in	O
order	O
to	O
restore	O
that	O
state	O
when	O
exiting	O
sleep	O
mode	O
,	O
</s>
<s>
The	O
hardware	B-General_Concept
registers	I-General_Concept
inside	O
a	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
are	O
called	O
processor	B-General_Concept
registers	I-General_Concept
.	O
</s>
<s>
Strobe	B-General_Concept
registers	I-General_Concept
have	O
the	O
same	O
interface	B-Application
as	O
normal	O
hardware	B-General_Concept
registers	I-General_Concept
,	O
but	O
instead	O
of	O
storing	O
data	O
,	O
they	O
trigger	O
an	O
action	O
each	O
time	O
they	O
are	O
written	O
to	O
(	O
or	O
,	O
in	O
rare	O
cases	O
,	O
read	O
from	O
)	O
.	O
</s>
<s>
In	O
addition	O
to	O
the	O
"	O
programmer-visible	O
"	O
registers	O
that	O
can	O
be	O
read	O
and	O
written	O
with	O
software	O
,	O
many	O
chips	O
have	O
internal	O
microarchitectural	B-General_Concept
registers	O
that	O
are	O
used	O
for	O
state	B-Architecture
machines	I-Architecture
and	O
pipelining	B-General_Concept
;	O
for	O
example	O
,	O
registered	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
SPIRIT	O
IP-XACT	O
and	O
DITA	O
SIDSC	O
XML	B-Protocol
define	O
standard	O
XML	B-Protocol
formats	O
for	O
memory-mapped	O
registers	O
.	O
</s>
