<s>
The	O
Orion	O
was	O
a	O
series	O
of	O
32-bit	O
super-minicomputers	O
designed	O
and	O
produced	O
in	O
the	O
1980s	O
by	O
High	O
Level	O
Hardware	O
Limited	O
(	O
HLH	O
)	O
,	O
a	O
company	O
based	O
in	O
Oxford	O
,	O
UK	O
.	O
</s>
<s>
The	O
Orion	O
1/05	O
,	O
in	O
which	O
the	O
microcodeable	O
CPU	B-Device
was	O
replaced	O
with	O
the	O
much	O
faster	O
Fairchild	B-General_Concept
Clipper	I-General_Concept
RISC	B-Architecture
C-100	O
processor	O
providing	O
approximately	O
5.5	O
MIPS	O
of	O
integer	O
performance	O
and	O
1	O
Mflop	O
of	O
double	O
precision	O
floating	B-Algorithm
point	I-Algorithm
performance	O
.	O
</s>
<s>
The	O
Orion	O
1/10	O
based	O
on	O
a	O
later	O
generation	O
C-300	O
Clipper	B-General_Concept
from	O
the	O
Advanced	O
Processor	O
Division	O
at	O
Intergraph	O
Corporation	O
that	O
required	O
extensive	O
cooling	O
.	O
</s>
<s>
The	O
Orion	O
1/10	O
offered	O
a	O
further	O
30%	O
improvement	O
for	O
integer	O
and	O
single	O
precision	O
floating	B-Algorithm
point	I-Algorithm
operations	O
and	O
over	O
150%	O
improvement	O
for	O
double	O
precision	O
floating	B-Algorithm
point	I-Algorithm
(	O
10	O
MIPS	O
and	O
3	O
Mflops	O
)	O
.	O
</s>
<s>
In	O
1984	O
,	O
as	O
a	O
result	O
of	O
that	O
research	O
,	O
High	O
Level	O
Hardware	O
launched	O
the	O
Orion	O
,	O
a	O
high	O
performance	O
,	O
microcodeable	O
,	O
UNIX	B-Application
superminicomputer	B-Device
targeted	O
particularly	O
at	O
scientific	O
applications	O
such	O
as	O
mathematical	O
modeling	O
,	O
artificial	B-Application
intelligence	I-Application
and	O
symbolic	B-General_Concept
algebra	I-General_Concept
.	O
</s>
<s>
In	O
April	O
1987	O
High	O
Level	O
Hardware	O
introduced	O
a	O
series	O
of	O
Orions	O
based	O
upon	O
the	O
Fairchild	B-General_Concept
Clipper	I-General_Concept
processor	O
but	O
abandoned	O
the	O
hardware	O
market	O
in	O
late	O
1989	O
to	O
concentrate	O
on	O
high-end	O
Apple	B-Device
Macintosh	I-Device
sales	O
.	O
</s>
<s>
The	O
original	O
Orion	O
employed	O
a	O
processor	O
architecture	O
based	O
on	O
Am2900-series	O
devices	O
.	O
</s>
<s>
This	O
CPU	B-Device
was	O
novel	O
in	O
that	O
its	O
microcode	B-Device
was	O
writable	O
;	O
in	O
other	O
words	O
,	O
its	O
instruction	B-General_Concept
set	I-General_Concept
could	O
be	O
redefined	O
.	O
</s>
<s>
This	O
facility	O
was	O
used	O
to	O
customise	O
some	O
Orions	O
with	O
instruction	B-General_Concept
sets	I-General_Concept
optimised	O
to	O
run	O
the	O
Occam	B-Language
and	O
LISP	B-Language
programming	I-Language
languages	I-Language
or	O
even	O
to	O
compute	O
fractals	O
.	O
</s>
<s>
The	O
CPU	B-Device
consisted	O
of	O
an	O
ALU	B-General_Concept
that	O
was	O
built	O
around	O
the	O
Am2901	B-General_Concept
bit-sliced	O
microprocessor	B-Architecture
.	O
</s>
<s>
Additional	O
logic	O
was	O
provided	O
to	O
support	O
both	O
signed	O
and	O
unsigned	O
two	B-General_Concept
's	I-General_Concept
complement	I-General_Concept
comparisons	O
in	O
a	O
single	O
operation	O
,	O
multiple	O
precision	O
arithmetic	O
and	O
floating	B-Algorithm
point	I-Algorithm
normalization	O
.	O
</s>
<s>
Most	O
operations	O
could	O
be	O
performed	O
in	O
150	O
ns	O
,	O
however	O
the	O
cycle	O
time	O
was	O
variable	O
from	O
125	O
ns	O
to	O
200	O
ns	O
under	O
microprogram	B-Device
control	O
so	O
that	O
timing	O
could	O
be	O
optimized	O
.	O
</s>
<s>
A	O
microsequencer	O
,	O
based	O
around	O
the	O
Am2910	O
,	O
directed	O
the	O
control	O
flow	O
through	O
the	O
microprogram	B-Device
.	I-Device
</s>
<s>
It	O
could	O
perform	O
branches	O
,	O
loops	O
and	O
subroutine	O
calls	O
most	O
of	O
which	O
could	O
be	O
conditional	O
on	O
any	O
of	O
several	O
CPU	B-Device
status	O
conditions	O
.	O
</s>
<s>
The	O
CPU	B-Device
instruction	O
decoder	O
,	O
decoded	O
machine	O
level	O
instructions	O
(	O
as	O
opposed	O
to	O
micro-instructions	B-Device
)	O
.	O
</s>
<s>
This	O
was	O
achieved	O
by	O
using	O
map	O
tables	O
held	O
in	O
fast	O
parity	O
checked	O
RAM	B-Architecture
which	O
mapped	O
one	O
byte	O
opcodes	B-Language
onto	O
micro-instruction	O
addresses	O
.	O
</s>
<s>
Control	O
was	O
transferred	O
to	O
these	O
addresses	O
using	O
a	O
special	O
sequencer	O
operation	O
which	O
was	O
performed	O
in	O
parallel	O
with	O
other	O
CPU	B-Device
functions	O
.	O
</s>
<s>
An	O
escape	O
mechanism	O
was	O
provided	O
to	O
allow	O
the	O
instruction	B-General_Concept
set	I-General_Concept
to	O
be	O
expanded	O
beyond	O
the	O
256	O
entries	O
selected	O
by	O
any	O
one	O
opcode	B-Language
.	O
</s>
<s>
A	O
further	O
mechanism	O
existed	O
to	O
switch	O
between	O
several	O
sets	O
of	O
dispatch	O
tables	O
,	O
allowing	O
the	O
machine	O
to	O
support	O
multiple	O
instruction	B-General_Concept
sets	I-General_Concept
concurrently	O
.	O
</s>
<s>
Using	O
this	O
mechanism	O
a	O
different	O
instruction	B-General_Concept
set	I-General_Concept
could	O
be	O
selected	O
each	O
time	O
a	O
context	O
switch	O
occurred	O
.	O
</s>
<s>
This	O
mechanism	O
was	O
also	O
used	O
to	O
implement	O
privileged	O
instruction	O
,	O
dynamic	O
profiling	O
(	O
for	O
performance	O
monitoring	O
)	O
and	O
multiple	O
CPU	B-Device
modes	O
(	O
e	O
.	O
g	O
.	O
User	O
and	O
Kernel	B-Operating_System
)	O
.	O
</s>
<s>
The	O
role	O
of	O
the	O
cache	B-General_Concept
memory	I-General_Concept
,	O
independent	O
of	O
the	O
main	O
memory	O
,	O
was	O
to	O
hold	O
the	O
top	O
of	O
an	O
evaluation	O
stack	O
for	O
a	O
procedure	O
oriented	O
language	O
.	O
</s>
<s>
The	O
cache	B-General_Concept
had	O
a	O
two	O
cycle	O
latency	O
after	O
which	O
it	O
could	O
deliver	O
one	O
word	O
per	O
cycle	O
and	O
was	O
divided	O
into	O
a	O
number	O
of	O
pages	O
each	O
with	O
512	O
32-bit	O
words	O
with	O
parity	O
protection	O
.	O
</s>
<s>
The	O
lower	O
nine	O
bits	O
of	O
the	O
CPU	B-Device
register	O
,	O
which	O
addressed	O
the	O
cache	B-General_Concept
,	O
was	O
implemented	O
with	O
counters	O
and	O
allowed	O
increment	O
and	O
decrement	O
operations	O
(	O
push	O
and	O
pop	O
)	O
as	O
wells	O
as	O
random	O
access	O
.	O
</s>
<s>
The	O
control	O
store	O
was	O
built	O
using	O
high	O
speed	O
static	B-Architecture
RAMs	I-Architecture
.	O
</s>
<s>
The	O
control	O
store	O
cycle	O
time	O
was	O
125	O
ns	O
,	O
equal	O
to	O
the	O
fastest	O
CPU	B-Device
cycle	O
.	O
</s>
<s>
In	O
the	O
original	O
implementation	O
,	O
each	O
main	O
memory	O
module	O
contained	O
0.5	O
Mbytes	O
of	O
storage	O
with	O
parity	O
protection	O
constructed	O
using	O
64K	O
dynamic	O
MOS	O
RAMs	B-Architecture
.	O
</s>
<s>
Random	O
access	O
cycle	O
time	O
was	O
500	O
ns	O
per	O
32-bit	O
word	O
but	O
multi-word	O
transfers	O
,	O
for	O
example	O
to	O
and	O
from	O
the	O
cache	B-General_Concept
,	O
yielded	O
an	O
effective	O
cycle	O
time	O
of	O
250	O
ns	O
per	O
32-bit	O
word	O
(	O
16	O
Mbytes	O
per	O
second	O
)	O
.	O
</s>
<s>
A	O
later	O
implementation	O
of	O
the	O
memory	O
module	O
increased	O
the	O
size	O
to	O
2	O
MB	O
using	O
256K	O
RAMs	B-Architecture
.	O
</s>
<s>
A	O
fourth	O
region	O
was	O
normally	O
reserved	O
for	O
the	O
operating	B-General_Concept
system	I-General_Concept
.	O
</s>
<s>
The	O
translation	O
tables	O
were	O
cached	O
in	O
the	O
CPU	B-Device
resulting	O
,	O
in	O
most	O
cases	O
,	O
in	O
an	O
overhead	O
of	O
only	O
one	O
microinstruction	B-Device
when	O
performing	O
address	O
translation	O
.	O
</s>
<s>
The	O
Orion	O
I/O	O
subsystems	O
included	O
a	O
number	O
of	O
attached	O
microcomputers	B-Architecture
to	O
perform	O
low	O
level	O
tasks	O
such	O
as	O
running	O
diagnostics	O
and	O
managing	O
terminals	O
and	O
disks	O
.	O
</s>
<s>
The	O
diagnostic	O
microcomputer	B-Architecture
(	O
based	O
around	O
the	O
Zilog	B-General_Concept
Z80	I-General_Concept
)	O
was	O
embedded	O
within	O
the	O
CPU	B-Device
.	O
</s>
<s>
Its	O
functions	O
included	O
running	O
a	O
system	O
confidence	O
check	O
when	O
power	O
is	O
first	O
applied	O
,	O
bootstrapping	O
the	O
CPU	B-Device
,	O
and	O
taking	O
control	O
should	O
an	O
unrecoverable	O
control	O
store	O
parity	O
error	O
be	O
detected	O
.	O
</s>
<s>
It	O
could	O
also	O
be	O
used	O
to	O
load	O
new	O
microcode	B-Device
dynamically	O
whilst	O
the	O
machine	O
was	O
running	O
.	O
</s>
<s>
An	O
RS-232C	O
interface	O
was	O
provided	O
to	O
which	O
a	O
terminal	B-General_Concept
could	O
be	O
attached	O
.	O
</s>
<s>
Extensive	O
diagnostics	O
could	O
then	O
be	O
run	O
in	O
conjunction	O
with	O
special	O
microcode	B-Device
to	O
perform	O
fault	O
analysis	O
in	O
the	O
event	O
of	O
a	O
system	O
failure	O
.	O
</s>
<s>
Each	O
of	O
these	O
included	O
a	O
full	O
function	O
microcomputer	B-Architecture
based	O
around	O
the	O
Z80	B-General_Concept
which	O
performed	O
control	O
functions	O
and	O
housekeeping	O
.	O
</s>
<s>
Data	O
transfers	O
to	O
and	O
from	O
peripheral	O
devices	O
took	O
place	O
via	O
a	O
direct	B-General_Concept
memory	I-General_Concept
access	I-General_Concept
(	O
DMA	O
)	O
path	O
itself	O
constructed	O
using	O
Am2901	B-General_Concept
bit-slice	O
microprocessors	B-Architecture
.	O
</s>
<s>
This	O
allowed	O
the	O
full	O
performance	O
of	O
the	O
Orion	O
memory	O
system	O
and	O
of	O
the	O
peripheral	O
device	O
to	O
be	O
exploited	O
,	O
with	O
the	O
microcomputer	B-Architecture
able	O
to	O
take	O
corrective	O
action	O
on	O
soft	O
I/O	O
errors	O
.	O
</s>
<s>
Software	O
on	O
the	O
Orion	O
communicated	O
with	O
the	O
microcomputer	B-Architecture
using	O
a	O
high	O
level	O
message	O
passing	O
protocol	O
.	O
</s>
<s>
The	O
operating	B-General_Concept
system	I-General_Concept
for	O
the	O
microcodable	O
Orion	O
was	O
OTS	O
(	O
Orion	O
Time	O
Sharing	O
)	O
version	O
1.x	O
,	O
a	O
port	O
of	O
the	O
4.1BSD	B-Operating_System
UNIX	B-Application
operating	I-Application
system	I-Application
.	O
</s>
<s>
The	O
Clipper-powered	O
Orions	O
ran	O
OTS	O
version	O
2.x	O
,	O
a	O
port	O
of	O
the	O
4.2BSD	O
UNIX	B-Application
with	O
some	O
additions	O
.	O
</s>
<s>
This	O
was	O
not	O
notably	O
reliable	O
or	O
secure	O
,	O
and	O
had	O
a	O
tendency	O
to	O
'	O
forget	O
 '	O
process	O
user	O
IDs	O
,	O
randomly	O
leaving	O
user	O
processes	O
running	O
as	O
root	B-Application
.	O
</s>
<s>
HLH	O
also	O
produced	O
a	O
graphics	O
terminal	B-General_Concept
for	O
the	O
Orion	O
called	O
the	O
StarPoint	O
,	O
to	O
which	O
they	O
ported	O
the	O
X	B-Operating_System
Window	I-Operating_System
System	I-Operating_System
.	O
</s>
<s>
The	O
Orion	O
series	O
was	O
moderately	O
popular	O
with	O
the	O
computer	B-General_Concept
science	I-General_Concept
departments	O
of	O
British	O
universities	O
,	O
including	O
Westfield	O
College	O
,	O
London	O
,	O
Bath	O
,	O
Edinburgh	O
,	O
Heriot-Watt	O
,	O
Kent	O
,	O
Southampton	O
,	O
Warwick	O
,	O
York	O
,	O
King	O
's	O
College	O
,	O
London	O
.	O
</s>
<s>
A	O
typical	O
multi-user	B-Operating_System
Orion	O
configuration	O
would	O
have	O
had	O
8	O
MB	O
of	O
RAM	B-Architecture
,	O
an	O
SMD	B-Architecture
hard	B-Device
disk	I-Device
(	O
e.g.	O
</s>
<s>
a	O
168	O
MB	O
Kennedy	O
or	O
a	O
434	O
MB	O
Fujitsu	O
Eagle	O
)	O
,	O
a	O
60	O
MB	O
QIC-24	O
tape	O
drive	O
and	O
8	O
to	O
32	O
RS-232	O
terminal	B-General_Concept
ports	O
.	O
</s>
