<s>
Goldmont	B-Device
Plus	I-Device
is	O
a	O
microarchitecture	B-General_Concept
for	O
low-power	O
Atom	B-Application
,	O
Celeron	B-Device
and	O
Pentium	B-General_Concept
Silver	I-General_Concept
branded	O
processors	O
used	O
in	O
systems	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
(	O
SoCs	O
)	O
made	O
by	O
Intel	O
.	O
</s>
<s>
The	O
Gemini	B-Device
Lake	I-Device
platform	O
with	O
14nm	B-Algorithm
Goldmont	B-Device
Plus	I-Device
core	O
was	O
officially	O
launched	O
on	O
December	O
11	O
,	O
2017	O
.	O
</s>
<s>
Intel	O
launched	O
the	O
Gemini	B-Device
Lake	I-Device
Refresh	O
platform	O
on	O
November	O
4	O
,	O
2019	O
.	O
</s>
<s>
Goldmont	B-Device
Plus	I-Device
is	O
an	O
enhanced	O
2nd	O
generation	O
out-of-order	B-General_Concept
low-power	O
Atom	B-Application
microarchitecture	B-General_Concept
designed	O
for	O
entry	O
level	O
desktop	O
and	O
notebook	O
computers	O
.	O
</s>
<s>
Goldmont	B-Device
Plus	I-Device
is	O
built	O
on	O
the	O
14nm	B-Algorithm
manufacturing	O
process	O
and	O
supports	O
up	O
to	O
four	B-Architecture
cores	I-Architecture
for	O
the	O
consumer	O
devices	O
.	O
</s>
<s>
It	O
includes	O
the	O
Intel	B-Application
Gen9	I-Application
graphics	O
architecture	O
with	O
improvements	O
introduced	O
with	O
the	O
Kaby	B-Device
Lake	I-Device
microarchitecture	B-General_Concept
.	O
</s>
<s>
The	O
Goldmont	B-Device
Plus	I-Device
microarchitecture	B-General_Concept
builds	O
on	O
the	O
success	O
of	O
the	O
Goldmont	B-Device
microarchitecture	B-General_Concept
,	O
and	O
provides	O
the	O
following	O
enhancements	O
:	O
</s>
<s>
Widened	O
previous	O
generation	O
Atom	B-Application
processor	O
back-end	O
pipeline	B-General_Concept
to	O
4-wide	O
allocation	O
to	O
4-wide	O
retire	O
,	O
while	O
maintaining	O
3-wide	O
fetch	O
and	O
decode	O
pipeline	B-General_Concept
.	O
</s>
<s>
Enhanced	O
branch	B-General_Concept
prediction	I-General_Concept
unit	I-General_Concept
.	O
</s>
<s>
64KB	O
shared	O
second	O
level	O
pre-decode	O
cache	O
(	O
16KB	O
in	O
Goldmont	B-Device
microarchitecture	B-General_Concept
)	O
.	O
</s>
<s>
Larger	O
reservation	B-General_Concept
station	I-General_Concept
and	O
re-order	B-General_Concept
buffer	I-General_Concept
entries	O
to	O
support	O
large	O
out-of-order	B-General_Concept
window	O
.	O
</s>
<s>
Wider	O
integer	O
execution	B-General_Concept
unit	I-General_Concept
.	O
</s>
<s>
Radix-1024	O
floating	B-Algorithm
point	I-Algorithm
divider	O
for	O
fast	O
scalar/packed	O
single	O
,	O
double	O
and	O
extended	O
precision	O
floating	B-Algorithm
point	I-Algorithm
divides	O
.	O
</s>
<s>
Improved	O
AES-NI	B-Algorithm
instruction	O
latency	O
and	O
throughput	O
.	O
</s>
<s>
Larger	O
load	B-Architecture
and	I-Architecture
store	I-Architecture
buffers	I-Architecture
.	O
</s>
<s>
Shared	O
instruction	O
and	O
data	O
second	O
level	O
TLB	B-Architecture
.	O
</s>
<s>
Paging	B-General_Concept
cache	I-General_Concept
enhancements	O
(	O
PxE/ePxE	O
caches	O
)	O
.	O
</s>
<s>
Modular	O
system	O
design	O
with	O
four	B-Architecture
cores	I-Architecture
sharing	O
up	O
to	O
4MB	O
L2	O
cache	O
.	O
</s>
<s>
Updated	O
Gen	O
9	O
Intel	B-Application
HD	I-Application
Graphics	I-Application
with	O
DirectX	O
12	O
,	O
OpenGL	B-Application
4.6	I-Application
,	O
OpenGL	B-Application
ES	I-Application
3.2	I-Application
and	O
OpenCL	B-Application
2.0	I-Application
support	O
.	O
</s>
