<s>
Golden	B-Device
Cove	I-Device
is	O
a	O
codename	B-Architecture
for	O
a	O
CPU	B-General_Concept
microarchitecture	I-General_Concept
developed	O
by	O
Intel	O
and	O
released	O
in	O
November	O
2021	O
.	O
</s>
<s>
It	O
succeeds	O
four	O
microarchitectures	B-General_Concept
:	O
Sunny	B-Device
Cove	I-Device
,	O
Skylake	B-Architecture
,	O
Willow	B-Device
Cove	I-Device
,	O
and	O
Cypress	O
Cove	O
.	O
</s>
<s>
It	O
is	O
fabricated	O
using	O
Intel	O
's	O
Intel	B-Algorithm
7	I-Algorithm
process	B-Architecture
node	I-Architecture
,	O
previously	O
referred	O
to	O
as	O
10nm	O
Enhanced	O
SuperFin	O
(	O
10ESF	O
)	O
.	O
</s>
<s>
The	O
microarchitecture	B-General_Concept
is	O
used	O
in	O
the	O
high-performance	O
cores	O
(	O
P-core	O
)	O
of	O
the	O
12th-generation	O
Intel	B-Device
Core	I-Device
processors	O
(	O
codenamed	O
"	O
Alder	B-Device
Lake	I-Device
"	O
)	O
and	O
will	O
power	O
fourth-generation	O
Xeon	B-Device
Scalable	O
server	O
processors	O
(	O
codenamed	O
"	O
Sapphire	B-Device
Rapids	I-Device
"	O
)	O
.	O
</s>
<s>
Intel	O
first	O
unveiled	O
Golden	B-Device
Cove	I-Device
during	O
their	O
Architecture	O
Day	O
2020	O
,	O
with	O
further	O
details	O
released	O
at	O
the	O
same	O
event	O
in	O
August	O
2021	O
.	O
</s>
<s>
Similar	O
to	O
Skylake	B-Architecture
,	O
Golden	B-Device
Cove	I-Device
was	O
described	O
by	O
Intel	O
as	O
a	O
major	O
update	O
to	O
the	O
core	B-Device
microarchitecture	I-Device
,	O
with	O
Intel	O
stating	O
that	O
it	O
would	O
"	O
allow	O
performance	O
for	O
the	O
next	O
decade	O
of	O
compute	O
"	O
.	O
</s>
<s>
Intel	O
also	O
described	O
Golden	B-Device
Cove	I-Device
as	O
the	O
largest	O
microarchitectural	B-General_Concept
upgrade	O
to	O
the	O
Core	O
family	O
in	O
a	O
decade	O
,	O
touting	O
a	O
19%	O
increase	O
in	O
instructions	O
per	O
cycle	O
(	O
IPC	O
)	O
over	O
Cypress	O
Cove	O
.	O
</s>
<s>
At	O
the	O
event	O
in	O
2021	O
,	O
Intel	O
revealed	O
the	O
Gracemont	B-Device
and	O
Golden	B-Device
Cove	I-Device
architectures	O
would	O
both	O
be	O
bundled	O
in	O
a	O
hybrid	O
architecture	O
into	O
its	O
Alder	B-Device
Lake	I-Device
CPUs	B-Device
for	O
desktops	O
and	O
laptops	O
.	O
</s>
<s>
It	O
was	O
described	O
as	O
"	O
the	O
successor	O
to	O
Intel	O
's	O
10-nm	O
Sunny	B-Device
Cove	I-Device
microarchitecture.	O
"	O
</s>
<s>
It	O
was	O
also	O
announced	O
that	O
the	O
Golden	B-Device
Cove	I-Device
cores	O
would	O
support	O
hyper-threading	O
,	O
which	O
allows	O
two	O
threads	O
to	O
run	O
on	O
one	O
core	O
.	O
</s>
<s>
"	O
P-cores	O
"	O
based	O
on	O
Golden	B-Device
Cove	I-Device
stood	O
for	O
"	O
performance	O
"	O
,	O
while	O
"	O
E-cores	O
"	O
based	O
on	O
Gracemont	B-Device
stood	O
for	O
"	O
efficient.	O
"	O
</s>
<s>
In	O
August	O
2021	O
,	O
Golden	B-Device
Cove	I-Device
design	O
followed	O
"	O
the	O
Willow	B-Device
Cove	I-Device
core	O
in	O
Tiger	B-Device
Lake	I-Device
,	O
the	O
Sunny	B-Device
Cove	I-Device
core	O
in	O
Ice	O
Lake	O
,	O
and	O
the	O
derivative	O
Cypress	O
Cove	O
core	O
in	O
Rocket	O
Lake.	O
"	O
</s>
<s>
Succeeding	O
Willow	B-Device
Cove	I-Device
,	O
in	O
2021	O
the	O
Golden	B-Device
Cove	I-Device
was	O
described	O
as	O
competing	O
against	O
AMD	O
's	O
Zen	O
3	O
and	O
Zen	O
4-based	O
processors	O
.	O
</s>
<s>
Golden	B-Device
Cove	I-Device
is	O
based	O
on	O
the	O
10nm	O
Enhanced	O
SuperFin	O
node	O
by	O
Intel	O
,	O
which	O
was	O
later	O
renamed	O
to	O
Intel	B-Algorithm
7	I-Algorithm
.	O
</s>
<s>
When	O
modifying	O
Willow	B-Device
Cove	I-Device
,	O
writes	O
Hardware	O
Times	O
,	O
Intel	O
announced	O
in	O
2021	O
that	O
both	O
Golden	B-Device
Cove	I-Device
and	O
Gracemont	B-Device
"	O
expanded	O
the	O
back	O
and	O
front-end	O
,	O
improved	O
the	O
out-of-order	B-General_Concept
execution	I-General_Concept
(	O
OoO	O
)	O
capabilities	O
,	O
and	O
focused	O
more	O
on	O
power	O
efficiency	O
and	O
real-world	O
performance.	O
"	O
</s>
<s>
In	O
January	O
2022	O
,	O
TechRadar	O
noted	O
that	O
the	O
upcoming	O
Intel	O
Alder	O
Lake-P	O
processors	O
,	O
mobile	O
variants	O
of	O
Alder	B-Device
Lake	I-Device
with	O
Golden	B-Device
Cove	I-Device
,	O
could	O
possibly	O
use	O
up	O
to	O
"	O
six	O
Golden	B-Device
Cove	I-Device
cores	O
with	O
12	O
threads	O
alongside	O
eight	O
Gracemont	B-Device
cores	O
with	O
eight	O
threads	O
,	O
"	O
noting	O
other	O
permutations	O
were	O
also	O
possible	O
.	O
</s>
<s>
In	O
April	O
2022	O
,	O
it	O
was	O
reported	O
that	O
Raptor	B-Device
Lake	I-Device
,	O
a	O
"	O
refresh	O
"	O
of	O
Alder	B-Device
Lake	I-Device
,	O
might	O
utilize	O
the	O
Golden	B-Device
Cove	I-Device
and	O
Gracemont	B-Device
cores	O
.	O
</s>
<s>
It	O
was	O
also	O
reported	O
in	O
April	O
2022	O
that	O
Sapphire	B-Device
Rapids	I-Device
would	O
utilize	O
Golden	B-Device
Cove	I-Device
cores	O
.	O
</s>
<s>
According	O
to	O
AnandTech	O
in	O
August	O
2021	O
,	O
"	O
Intel	O
sees	O
the	O
Golden	B-Device
Cove	I-Device
as	O
a	O
major	O
step-function	O
update	O
,	O
with	O
massive	O
revamps	O
of	O
the	O
fundamental	O
building	O
blocks	O
of	O
the	O
CPU	B-Device
,	O
going	O
as	O
far	O
as	O
calling	O
it	O
as	O
allowing	O
performance	O
for	O
the	O
next	O
decade	O
of	O
compute	O
.	O
</s>
<s>
AnandTech	O
in	O
August	O
2021	O
also	O
wrote	O
that	O
the	O
last	O
similar	O
level	O
of	O
upgrades	O
to	O
Intel	O
's	O
"	O
core	O
front-end	O
"	O
was	O
Sunny	B-Device
Cove	I-Device
,	O
as	O
compared	O
to	O
Willow	B-Device
Cove	I-Device
and	O
Cypress	O
Cove	O
,	O
which	O
unlike	O
Golden	B-Device
Cove	I-Device
"	O
were	O
more	O
iterative	O
designs	O
focusing	O
on	O
the	O
memory	O
subsystem.	O
"	O
</s>
<s>
Golden	B-Device
Cove	I-Device
was	O
described	O
as	O
having	O
"	O
gigantic	O
changes	O
to	O
the	O
microarchitecture	B-General_Concept
’s	O
front-end	O
"	O
,	O
with	O
Intel	O
describing	O
those	O
changes	O
as	O
the	O
largest	O
upgrades	O
to	O
microarchitecture	B-General_Concept
in	O
a	O
decade	O
,	O
since	O
Skylake	B-Architecture
.	O
</s>
<s>
The	O
P-core	O
Golden	B-Device
Cove	I-Device
microarchitecture	B-General_Concept
supports	O
6-wide	O
decode	O
,	O
higher	O
than	O
the	O
prior	O
4	O
,	O
and	O
has	O
split	O
the	O
execution	O
ports	O
to	O
allow	O
for	O
more	O
operations	O
to	O
execute	O
at	O
once	O
,	O
enabling	O
higher	O
IPC	O
and	O
ILP	B-Operating_System
from	O
workflow	O
that	O
can	O
take	O
advantage	O
.	O
</s>
<s>
Intel	O
describes	O
a	O
number	O
of	O
improvements	O
over	O
its	O
predecessor	O
,	O
Sunny	B-Device
Cove	I-Device
.	O
</s>
<s>
In	O
server	O
Sapphire	B-Device
Rapids	I-Device
CPUs	B-Device
:	O
</s>
<s>
The	O
microarchitecture	B-General_Concept
is	O
used	O
in	O
the	O
high-performance	O
cores	O
of	O
the	O
12th	O
generation	O
of	O
Intel	B-Device
Core	I-Device
hybrid	O
processors	O
(	O
codenamed	O
"	O
Alder	B-Device
Lake	I-Device
"	O
)	O
and	O
will	O
be	O
implemented	O
in	O
the	O
fourth	O
generation	O
of	O
Xeon	B-Device
scalable	O
processors	O
(	O
codenamed	O
"	O
Sapphire	B-Device
Rapids	I-Device
"	O
)	O
.	O
</s>
<s>
Raptor	O
Cove	O
,	O
released	O
on	O
October	O
20	O
,	O
2022	O
with	O
Raptor	B-Device
Lake	I-Device
processors	O
,	O
is	O
a	O
refresh	O
of	O
the	O
Golden	B-Device
Cove	I-Device
microarchitecture	B-General_Concept
with	O
the	O
following	O
changes	O
:	O
</s>
<s>
2MB	O
L2	B-General_Concept
cache	I-General_Concept
,	O
up	O
from	O
1.25MB	O
on	O
the	O
mainstream	O
desktop	O
variant	O
of	O
Golden	B-Device
Cove	I-Device
.	O
</s>
<s>
The	O
server	O
variant	O
of	O
the	O
previous	O
Golden	B-Device
Cove	I-Device
core	O
already	O
had	O
2MB	O
L2	B-General_Concept
cache	I-General_Concept
per	O
core	O
.	O
</s>
