<s>
A	O
general-purpose	B-Architecture
input/output	I-Architecture
(	O
GPIO	B-Architecture
)	O
is	O
an	O
uncommitted	O
digital	O
signal	O
pin	O
on	O
an	O
integrated	O
circuit	O
or	O
electronic	O
circuit	O
(	O
e.g.	O
</s>
<s>
MCUs/MPUs	O
)	O
board	O
which	O
may	O
be	O
used	O
as	O
an	O
input	O
or	O
output	O
,	O
or	O
both	O
,	O
and	O
is	O
controllable	O
by	O
software	O
.	O
</s>
<s>
GPIOs	B-Architecture
have	O
no	O
predefined	O
purpose	O
and	O
are	O
unused	O
by	O
default	O
.	O
</s>
<s>
If	O
used	O
,	O
the	O
purpose	O
and	O
behavior	O
of	O
a	O
GPIO	B-Architecture
is	O
defined	O
and	O
implemented	O
by	O
the	O
designer	O
of	O
higher	O
assembly-level	O
circuitry	O
:	O
the	O
circuit	O
board	O
designer	O
in	O
the	O
case	O
of	O
integrated	O
circuit	O
GPIOs	B-Architecture
,	O
or	O
system	O
integrator	O
in	O
the	O
case	O
of	O
board-level	O
GPIOs	B-Architecture
.	O
</s>
<s>
Integrated	O
circuit	O
(	O
IC	O
)	O
GPIOs	B-Architecture
are	O
implemented	O
in	O
a	O
variety	O
of	O
ways	O
.	O
</s>
<s>
Some	O
ICs	O
provide	O
GPIOs	B-Architecture
as	O
a	O
primary	O
function	O
whereas	O
others	O
include	O
GPIOs	B-Architecture
as	O
a	O
convenient	O
"	O
accessory	O
"	O
to	O
some	O
other	O
primary	O
function	O
.	O
</s>
<s>
Examples	O
of	O
the	O
former	O
include	O
the	O
Intel	B-Device
8255	I-Device
,	O
which	O
interfaces	O
24	O
GPIOs	B-Architecture
to	O
a	O
parallel	O
communication	O
bus	O
,	O
and	O
various	O
GPIO	B-Architecture
expander	O
ICs	O
,	O
which	O
interface	O
GPIOs	B-Architecture
to	O
serial	B-Protocol
communication	I-Protocol
buses	O
such	O
as	O
I²C	O
and	O
SMBus	B-Algorithm
.	O
</s>
<s>
An	O
example	O
of	O
the	O
latter	O
is	O
the	O
Realtek	O
ALC260	O
IC	O
,	O
which	O
provides	O
eight	O
GPIOs	B-Architecture
along	O
with	O
its	O
main	O
function	O
of	O
audio	B-Algorithm
codec	I-Algorithm
.	O
</s>
<s>
Microcontroller	B-Architecture
ICs	O
usually	O
include	O
GPIOs	B-Architecture
.	O
</s>
<s>
Depending	O
on	O
the	O
application	O
,	O
a	O
microcontroller	B-Architecture
's	O
GPIOs	B-Architecture
may	O
comprise	O
its	O
primary	O
interface	O
to	O
external	O
circuitry	O
or	O
they	O
may	O
be	O
just	O
one	O
type	O
of	O
I/O	O
used	O
among	O
several	O
,	O
such	O
as	O
analog	O
signal	O
I/O	O
,	O
counter/timer	O
,	O
and	O
serial	B-Protocol
communication	I-Protocol
.	O
</s>
<s>
In	O
some	O
ICs	O
,	O
particularly	O
microcontrollers	B-Architecture
,	O
a	O
GPIO	B-Architecture
pin	O
may	O
be	O
capable	O
of	O
other	O
functions	O
than	O
GPIO	B-Architecture
.	O
</s>
<s>
Often	O
in	O
such	O
cases	O
it	O
is	O
necessary	O
to	O
configure	O
the	O
pin	O
to	O
operate	O
as	O
a	O
GPIO	B-Architecture
(	O
vis-á-vis	O
its	O
other	O
functions	O
)	O
in	O
addition	O
to	O
configuring	O
the	O
GPIO	B-Architecture
's	O
behavior	O
.	O
</s>
<s>
Some	O
microcontroller	B-Architecture
devices	O
(	O
e.g.	O
,	O
Microchip	O
dsPIC33	O
family	O
)	O
incorporate	O
internal	O
signal	O
routing	O
circuitry	O
that	O
allows	O
GPIOs	B-Architecture
to	O
be	O
programmatically	O
mapped	O
to	O
device	O
pins	O
.	O
</s>
<s>
Field-programmable	B-Architecture
gate	I-Architecture
arrays	I-Architecture
(	O
FPGA	B-Architecture
)	O
extend	O
this	O
ability	O
by	O
allowing	O
GPIO	B-Architecture
pin	O
mapping	O
,	O
instantiation	O
and	O
architecture	O
to	O
be	O
programmatically	O
controlled	O
.	O
</s>
<s>
Many	O
circuit	O
boards	O
expose	O
board-level	O
GPIOs	B-Architecture
to	O
external	O
circuitry	O
through	O
integrated	O
electrical	O
connectors	O
.	O
</s>
<s>
Usually	O
,	O
each	O
such	O
GPIO	B-Architecture
is	O
accessible	O
via	O
a	O
dedicated	O
connector	O
pin	O
.	O
</s>
<s>
Like	O
IC-based	O
GPIOs	B-Architecture
,	O
some	O
boards	O
merely	O
include	O
GPIOs	B-Architecture
as	O
a	O
convenient	O
,	O
auxiliary	O
resource	O
that	O
augments	O
the	O
board	O
's	O
primary	O
function	O
,	O
whereas	O
in	O
other	O
boards	O
the	O
GPIOs	B-Architecture
are	O
the	O
central	O
,	O
primary	O
function	O
of	O
the	O
board	O
.	O
</s>
<s>
Some	O
boards	O
,	O
which	O
are	O
classified	O
usually	O
as	O
multi-function	O
I/O	O
boards	O
,	O
are	O
a	O
combination	O
of	O
both	O
;	O
such	O
boards	O
provide	O
GPIOs	B-Architecture
along	O
with	O
other	O
types	O
of	O
general-purpose	B-Architecture
I/O	I-Architecture
.	O
</s>
<s>
GPIOs	B-Architecture
are	O
also	O
found	O
on	O
embedded	O
controller	O
boards	O
and	O
Single	B-Device
board	I-Device
computers	I-Device
such	O
as	O
Arduino	O
,	O
BeagleBone	O
,	O
and	O
Raspberry	B-Operating_System
Pi	I-Operating_System
.	O
</s>
<s>
Board-level	O
GPIOs	B-Architecture
are	O
often	O
given	O
abilities	O
which	O
IC-based	O
GPIOs	B-Architecture
usually	O
lack	O
.	O
</s>
<s>
For	O
example	O
,	O
Schmitt-trigger	O
inputs	O
,	O
high-current	O
output	O
drivers	O
,	O
optical	O
isolators	O
,	O
or	O
combinations	O
of	O
these	O
,	O
may	O
be	O
used	O
to	O
buffer	O
and	O
condition	O
the	O
GPIO	B-Architecture
signals	O
and	O
to	O
protect	O
board	O
circuitry	O
.	O
</s>
<s>
Also	O
,	O
higher-level	O
functions	O
are	O
sometimes	O
implemented	O
,	O
such	O
as	O
input	O
debounce	O
,	O
input	O
signal	O
edge	O
detection	O
,	O
and	O
pulse-width	B-Algorithm
modulation	I-Algorithm
(	O
PWM	O
)	O
output	O
.	O
</s>
<s>
GPIOs	B-Architecture
are	O
used	O
in	O
a	O
diverse	O
variety	O
of	O
applications	O
,	O
limited	O
only	O
by	O
the	O
electrical	O
and	O
timing	O
specifications	O
of	O
the	O
GPIO	B-Architecture
interface	O
and	O
the	O
ability	O
of	O
software	O
to	O
interact	O
with	O
GPIOs	B-Architecture
in	O
a	O
sufficiently	O
timely	O
manner	O
.	O
</s>
<s>
GPIOs	B-Architecture
usually	O
employ	O
standard	O
logic	O
levels	O
and	O
cannot	O
supply	O
significant	O
current	O
to	O
output	O
loads	O
.	O
</s>
<s>
When	O
followed	O
by	O
an	O
appropriate	O
high-current	O
output	O
buffer	O
(	O
or	O
mechanical	O
or	O
solid-state	O
relay	O
)	O
,	O
a	O
GPIO	B-Architecture
may	O
be	O
used	O
to	O
control	O
high-power	O
devices	O
such	O
as	O
lights	O
,	O
solenoids	O
,	O
heaters	O
,	O
and	O
motors	O
(	O
e.g.	O
,	O
fans	O
and	O
blowers	O
)	O
.	O
</s>
<s>
Similarly	O
,	O
an	O
input	O
buffer	O
,	O
relay	O
or	O
opto-isolator	O
is	O
often	O
used	O
to	O
translate	O
an	O
otherwise	O
incompatible	O
signal	O
(	O
e.g.	O
,	O
high	O
voltage	O
)	O
to	O
the	O
logic	O
levels	O
required	O
by	O
a	O
GPIO	B-Architecture
.	O
</s>
<s>
Integrated	O
circuit	O
GPIOs	B-Architecture
are	O
commonly	O
used	O
to	O
control	O
or	O
monitor	O
other	O
circuitry	O
(	O
including	O
other	O
ICs	O
)	O
on	O
a	O
board	O
.	O
</s>
<s>
In	O
the	O
latter	O
case	O
,	O
a	O
GPIO	B-Architecture
can	O
,	O
in	O
many	O
cases	O
,	O
supply	O
enough	O
output	O
current	O
to	O
directly	O
power	O
an	O
LED	O
without	O
using	O
an	O
intermediate	O
buffer	O
.	O
</s>
<s>
Multiple	O
GPIOs	B-Architecture
are	O
sometimes	O
used	O
together	O
as	O
a	O
bit	B-Algorithm
banging	I-Algorithm
communication	O
interface	O
.	O
</s>
<s>
For	O
example	O
,	O
two	O
GPIOs	B-Architecture
may	O
be	O
used	O
to	O
implement	O
a	O
serial	B-Protocol
communication	I-Protocol
bus	I-Protocol
such	O
as	O
Inter-Integrated	O
Circuit	O
(	O
I²C	O
)	O
,	O
and	O
four	O
GPIOs	B-Architecture
can	O
be	O
used	O
to	O
implement	O
a	O
Serial	B-Architecture
Peripheral	I-Architecture
Interface	I-Architecture
(	O
SPI	O
)	O
bus	O
;	O
these	O
are	O
usually	O
used	O
to	O
facilitate	O
serial	B-Protocol
communication	I-Protocol
with	O
ICs	O
and	O
other	O
devices	O
which	O
have	O
compatible	O
serial	O
interfaces	O
,	O
such	O
as	O
sensors	O
(	O
e.g.	O
,	O
temperature	O
sensors	O
,	O
pressure	O
sensors	O
,	O
accelerometers	O
)	O
and	O
motor	O
controllers	O
.	O
</s>
<s>
Although	O
GPIOs	B-Architecture
are	O
fundamentally	O
digital	O
in	O
nature	O
,	O
they	O
are	O
often	O
used	O
to	O
control	O
linear	O
processes	O
.	O
</s>
<s>
For	O
example	O
,	O
a	O
GPIO	B-Architecture
may	O
be	O
used	O
to	O
control	O
motor	O
speed	O
,	O
light	O
intensity	O
,	O
or	O
temperature	O
.	O
</s>
<s>
Usually	O
,	O
this	O
is	O
done	O
via	O
PWM	O
,	O
in	O
which	O
the	O
duty	O
cycle	O
of	O
the	O
GPIO	B-Architecture
output	O
signal	O
determines	O
the	O
effective	O
magnitude	O
of	O
the	O
process	O
control	O
signal	O
.	O
</s>
<s>
For	O
example	O
,	O
when	O
controlling	O
light	O
intensity	O
,	O
the	O
light	O
may	O
be	O
dimmed	O
by	O
reducing	O
the	O
GPIO	B-Architecture
duty	O
cycle	O
.	O
</s>
<s>
In	O
such	O
cases	O
,	O
it	O
may	O
be	O
feasible	O
to	O
connect	O
a	O
GPIO	B-Architecture
,	O
which	O
is	O
operated	O
as	O
a	O
PWM	O
output	O
,	O
to	O
an	O
RC	O
filter	O
to	O
create	O
a	O
simple	O
,	O
low	O
cost	O
digital-to-analog	O
converter	O
.	O
</s>
<s>
GPIO	B-Architecture
interfaces	O
vary	O
widely	O
.	O
</s>
<s>
Input	O
and	O
output	O
voltages	O
are	O
usually	O
,	O
but	O
not	O
always	O
,	O
limited	O
to	O
the	O
supply	O
voltage	O
of	O
the	O
device	O
with	O
the	O
GPIOs	B-Architecture
,	O
and	O
may	O
be	O
damaged	O
by	O
greater	O
voltages	O
.	O
</s>
<s>
A	O
GPIO	B-Architecture
pin	O
's	O
state	O
may	O
be	O
exposed	O
to	O
the	O
software	O
developer	O
through	O
one	O
of	O
a	O
number	O
of	O
different	O
interfaces	O
,	O
such	O
as	O
a	O
memory-mapped	B-Architecture
I/O	I-Architecture
peripheral	O
,	O
or	O
through	O
dedicated	O
IO	B-Architecture
port	I-Architecture
instructions	O
.	O
</s>
<s>
Some	O
GPIOs	B-Architecture
have	O
5V	O
tolerant	O
inputs	O
:	O
even	O
when	O
the	O
device	O
has	O
a	O
low	O
supply	O
voltage	O
(	O
such	O
as	O
2V	O
)	O
,	O
the	O
device	O
can	O
accept	O
5V	O
without	O
damage	O
.	O
</s>
<s>
A	O
GPIO	B-Architecture
port	O
is	O
a	O
group	O
of	O
GPIO	B-Architecture
pins	O
(	O
often	O
8	O
pins	O
,	O
but	O
it	O
may	O
be	O
less	O
)	O
arranged	O
in	O
a	O
group	O
and	O
controlled	O
as	O
a	O
group	O
.	O
</s>
<s>
GPIO	B-Architecture
abilities	O
may	O
include	O
:	O
</s>
