<s>
Futurebus	B-Architecture
,	O
or	O
IEEE	B-Architecture
896	I-Architecture
,	O
is	O
a	O
computer	B-General_Concept
bus	I-General_Concept
standard	O
,	O
intended	O
to	O
replace	O
all	O
local	B-Architecture
bus	I-Architecture
connections	O
in	O
a	O
computer	O
,	O
including	O
the	O
CPU	B-General_Concept
,	O
memory	B-General_Concept
,	O
plug-in	O
cards	O
and	O
even	O
,	O
to	O
some	O
extent	O
,	O
LAN	B-General_Concept
links	O
between	O
machines	O
.	O
</s>
<s>
In	O
the	O
late	O
1970s	O
,	O
VMEbus	B-Architecture
was	O
faster	O
than	O
the	O
parts	O
plugged	O
into	O
it	O
.	O
</s>
<s>
It	O
was	O
quite	O
reasonable	O
to	O
connect	O
a	O
CPU	B-General_Concept
and	O
RAM	B-Architecture
to	O
VME	O
on	O
separate	O
cards	O
to	O
build	O
a	O
computer	O
.	O
</s>
<s>
However	O
,	O
as	O
the	O
speed	O
of	O
the	O
CPUs	O
and	O
RAM	B-Architecture
rapidly	O
increased	O
,	O
VME	O
was	O
quickly	O
overwhelmed	O
.	O
</s>
<s>
Futurebus	B-Architecture
looked	O
to	O
fix	O
these	O
problems	O
and	O
create	O
a	O
successor	O
to	O
systems	O
like	O
VMEbus	B-Architecture
with	O
a	O
system	O
that	O
could	O
grow	O
in	O
speed	O
without	O
affecting	O
existing	O
devices	O
.	O
</s>
<s>
In	O
order	O
to	O
do	O
this	O
the	O
primary	O
technology	O
of	O
Futurebus	B-Architecture
was	O
built	O
using	O
asynchronous	O
links	O
,	O
allowing	O
the	O
devices	O
plugged	O
into	O
it	O
to	O
talk	O
at	O
whatever	O
speed	O
they	O
wished	O
.	O
</s>
<s>
Another	O
problem	O
that	O
needed	O
to	O
be	O
addressed	O
was	O
the	O
ability	O
to	O
have	O
several	O
cards	O
in	O
the	O
system	O
as	O
"	O
masters	O
"	O
,	O
allowing	O
Futurebus	B-Architecture
to	O
build	O
multiprocessor	O
machines	O
.	O
</s>
<s>
In	O
order	O
to	O
have	O
a	O
clear	O
performance	O
benefit	O
,	O
Futurebus	B-Architecture
was	O
designed	O
to	O
have	O
the	O
performance	O
needed	O
ten	O
years	O
in	O
the	O
future	O
.	O
</s>
<s>
In	O
the	O
case	O
of	O
Futurebus	B-Architecture
this	O
was	O
reversed	O
,	O
the	O
whole	O
system	O
was	O
being	O
designed	O
during	O
the	O
standardization	O
effort	O
.	O
</s>
<s>
As	O
companies	O
came	O
to	O
see	O
Futurebus	B-Architecture
as	O
the	O
system	O
,	O
they	O
all	O
joined	O
in	O
.	O
</s>
<s>
Tektronix	O
did	O
make	O
a	O
few	O
workstations	O
based	O
on	O
Futurebus	B-Architecture
.	O
</s>
<s>
American	O
Logic	O
Machines	O
(	O
ALM	O
)	O
continues	O
to	O
build	O
end	O
to	O
end	O
system	O
Futurebus	B-Architecture
hybrid	O
solutions	O
,	O
including	O
VME-to-Futurebus	O
+	O
and	O
other	O
Bus-to-Futurebus	O
bridge	O
technologies	O
.	O
</s>
<s>
That	O
was	O
just	O
in	O
time	O
for	O
the	O
US	O
Navy	O
who	O
had	O
been	O
looking	O
for	O
a	O
new	O
high-speed	O
system	O
for	O
the	O
Next	O
Generation	O
Computer	O
Resources	O
(	O
NGCR	O
)	O
project	O
for	O
passing	O
sonar	B-Application
data	O
around	O
in	O
their	O
newly	O
designed	O
Seawolf-class	O
submarines	O
,	O
and	O
they	O
said	O
they	O
would	O
standardize	O
on	O
Futurebus	B-Architecture
if	O
only	O
a	O
few	O
more	O
changes	O
would	O
be	O
made	O
.	O
</s>
<s>
Seeing	O
a	O
potential	O
massive	O
government	O
buy	O
,	O
the	O
additions	O
effort	O
started	O
immediately	O
on	O
Futurebus+	O
.	O
</s>
<s>
It	O
took	O
another	O
four	O
years	O
for	O
the	O
Futurebus+	O
Standard	O
to	O
be	O
released	O
by	O
this	O
time	O
custom	O
variation	O
of	O
Futurebus	B-Architecture
took	O
the	O
lead	O
in	O
industry	O
.	O
</s>
<s>
All	O
of	O
the	O
Futurebus+	O
proponents	O
had	O
their	O
idea	O
of	O
what	O
Futurebus+	O
should	O
be	O
.	O
</s>
<s>
This	O
degenerated	O
into	O
"	O
profiles	O
"	O
,	O
different	O
versions	O
of	O
Futurebus+	O
targeted	O
towards	O
a	O
particular	O
market	O
.	O
</s>
<s>
Boards	O
that	O
were	O
compliant	O
with	O
one	O
Futurebus+	O
profile	O
were	O
not	O
guaranteed	O
to	O
work	O
with	O
boards	O
built	O
to	O
a	O
different	O
profile	O
.	O
</s>
<s>
The	O
Futurebus+	O
standards	O
development	O
politics	O
got	O
so	O
complicated	O
that	O
the	O
IEEE	B-Architecture
896	I-Architecture
committee	O
split	O
from	O
the	O
IEEE	O
Microcomputer	O
Standards	O
Committee	O
and	O
formed	O
the	O
IEEE	O
Bus	O
Architecture	O
Standards	O
Committee	O
(	O
BASC	O
)	O
.	O
</s>
<s>
In	O
the	O
end	O
very	O
little	O
use	O
of	O
Futurebus	B-Architecture
was	O
attempted	O
.	O
</s>
<s>
The	O
decade-long	O
performance	O
gap	O
they	O
gave	O
the	O
system	O
had	O
evaporated	O
in	O
the	O
decade-long	O
standards	O
process	O
,	O
and	O
conventional	O
local	B-Architecture
bus	I-Architecture
systems	O
like	O
PCI	B-Protocol
were	O
close	O
in	O
performance	O
terms	O
.	O
</s>
<s>
Custom	O
implementations	O
of	O
the	O
Futurebus	B-Architecture
technology	O
are	O
currently	O
used	O
as	O
backplane	O
technologies	O
for	O
high-end	O
network	O
applications	O
,	O
enterprise	O
class	O
routers	O
,	O
high	O
performance	O
blade	O
servers	O
,	O
and	O
application	O
with	O
high	O
demand-content	O
such	O
as	O
video	O
on	O
demand	O
.	O
</s>
<s>
Futurebus	B-Architecture
effort	O
did	O
act	O
as	O
a	O
catalyst	O
for	O
simpler	O
serial	O
technologies	O
.	O
</s>
<s>
A	O
group	O
then	O
organized	O
to	O
create	O
a	O
system	O
aimed	O
directly	O
at	O
this	O
need	O
,	O
which	O
eventually	O
led	O
to	O
Scalable	B-General_Concept
Coherent	I-General_Concept
Interface	I-General_Concept
(	O
SCI	O
)	O
.	O
</s>
<s>
Meanwhile	O
,	O
another	O
member	O
decided	O
to	O
simple	O
re-create	O
the	O
entire	O
concept	O
on	O
a	O
much	O
simpler	O
basis	O
,	O
which	O
resulted	O
in	O
QuickRing	B-Architecture
.	O
</s>
<s>
Due	O
to	O
the	O
simplicity	O
of	O
these	O
standards	O
,	O
both	O
standards	O
were	O
completed	O
before	O
Futurebus+	O
.	O
</s>
<s>
Futurebus+	O
was	O
ahead	O
of	O
its	O
time	O
in	O
the	O
1980s	O
.	O
</s>
<s>
VME	O
and	O
other	O
parallel	O
bus	O
standards	O
are	O
still	O
trying	O
to	O
adapt	O
concepts	O
that	O
are	O
implemented	O
in	O
the	O
Futurebus	B-Architecture
,	O
specially	O
in	O
high	O
performance	O
applications	O
.	O
</s>
<s>
Futurebus	B-Architecture
was	O
the	O
source	O
of	O
some	O
of	O
the	O
original	O
work	O
on	O
cache	B-General_Concept
coherency	I-General_Concept
,	O
Live	O
Insertion	O
of	O
boards	O
,	O
and	O
Trapezoidal	O
Transceivers	O
.	O
</s>
<s>
Newer	O
Futurebus+	O
transceivers	O
that	O
meet	O
the	O
IEEE	O
Std	O
1194.1-1991	O
Backplane	O
Transceiver	O
Logic	O
(	O
BTL	O
)	O
standard	O
are	O
still	O
made	O
by	O
Texas	O
Instruments	O
.	O
</s>
<s>
Futurebus+	O
was	O
used	O
as	O
the	O
I/O	B-General_Concept
bus	I-General_Concept
in	O
the	O
DEC	B-Device
4000	I-Device
AXP	I-Device
and	O
DEC	B-Device
10000	I-Device
AXP	I-Device
systems	O
.	O
</s>
<s>
Futurebus+	O
FDDI	B-Protocol
boards	O
are	O
still	O
supported	O
in	O
the	O
OpenVMS	B-Operating_System
operating	O
system	O
.	O
</s>
<s>
Futurebus+	O
custom	O
chips	O
support	O
advanced	O
Symmetric	O
and	O
Asymmetric	O
versions	O
of	O
Unix-Like	O
operating	O
systems	O
supported	O
by	O
companies	O
such	O
as	O
American	O
Logic	O
Machines	O
.	O
</s>
<s>
Many	O
of	O
the	O
technical	O
features	O
(	O
asynchronous	O
data	B-General_Concept
bus	I-General_Concept
,	O
distributed	O
bus	O
arbitration	O
,	O
large	O
board	O
size	O
)	O
are	O
shared	O
with	O
IEEE	O
standard	O
FASTBUS	B-Architecture
.	O
</s>
<s>
FASTBUS	B-Architecture
was	O
used	O
as	O
a	O
data	O
acquisition	O
system	O
in	O
many	O
high-energy	O
physics	O
experiments	O
in	O
the	O
1980s	O
and	O
1990s	O
.	O
</s>
<s>
Futurebus	B-Architecture
is	O
described	O
in	O
just	O
a	O
few	O
IEEE	O
standards	O
:	O
</s>
<s>
Futurebus	B-Architecture
systems	O
were	O
implemented	O
with	O
9Ux280	O
Eurocard	O
mechanics	O
using	O
96-pin	O
DIN	B-Application
connectors	O
resulting	O
in	O
a	O
backplane	O
that	O
supported	O
both	O
16	O
and	O
32	O
bit	O
bus	O
widths	O
.	O
</s>
<s>
To	O
understand	O
Futurebus+	O
you	O
need	O
to	O
read	O
many	O
IEEE	O
standards	O
:	O
</s>
<s>
896.2	O
contains	O
three	O
Profiles	O
for	O
target	O
markets	O
,	O
A	O
for	O
general	O
purpose	O
systems	O
,	O
B	O
for	O
an	O
I/O	B-General_Concept
bus	I-General_Concept
,	O
and	O
F	O
for	O
a	O
Futurebus+	O
will	O
all	O
the	O
options	O
that	O
will	O
make	O
it	O
go	O
fast	O
.	O
</s>
<s>
Profile	O
A	O
was	O
sponsored	O
by	O
the	O
VMEbus	B-Architecture
community	O
.	O
</s>
<s>
Profile	O
B	O
was	O
sponsored	O
by	O
Digital	O
Equipment	O
Corporation	O
and	O
implemented	O
in	O
VAX	B-Device
and	O
Alpha	B-Device
systems	O
as	O
an	O
I/O	B-General_Concept
bus	I-General_Concept
.	O
</s>
<s>
Futurebus+	O
supports	O
bus	O
widths	O
from	O
32	O
to	O
256	O
bits	O
.	O
</s>
<s>
Cache	B-General_Concept
Coherence	I-General_Concept
,	O
implemented	O
using	O
the	O
MESI	B-General_Concept
protocols	I-General_Concept
,	O
was	O
very	O
complicated	O
but	O
significantly	O
improved	O
performance	O
.	O
</s>
<s>
Futurebus+	O
was	O
one	O
of	O
the	O
first	O
open	O
standards	O
to	O
support	O
Live	O
Insertion	O
which	O
allowed	O
boards	O
to	O
be	O
replaced	O
while	O
the	O
system	O
was	O
running	O
.	O
</s>
<s>
Futurebus+	O
boards	O
are	O
12SUx12SU	O
Hard	O
Metric	O
size	O
defined	O
in	O
the	O
IEEE	O
1301	O
standards	O
.	O
</s>
<s>
One	O
of	O
the	O
most	O
elegant	O
features	O
of	O
the	O
Futurebus	B-Architecture
design	O
is	O
its	O
distributed	O
bus	O
arbitration	O
mechanism	O
.	O
</s>
