<s>
A	O
floating-point	B-General_Concept
unit	I-General_Concept
(	O
FPU	O
,	O
colloquially	O
a	O
math	B-General_Concept
coprocessor	I-General_Concept
)	O
is	O
a	O
part	O
of	O
a	O
computer	O
system	O
specially	O
designed	O
to	O
carry	O
out	O
operations	O
on	O
floating-point	B-Algorithm
numbers	I-Algorithm
.	O
</s>
<s>
In	O
general-purpose	O
computer	B-General_Concept
architectures	I-General_Concept
,	O
one	O
or	O
more	O
FPUs	O
may	O
be	O
integrated	O
as	O
execution	B-General_Concept
units	I-General_Concept
within	O
the	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
;	O
however	O
,	O
many	O
embedded	B-Architecture
processors	I-Architecture
do	O
not	O
have	O
hardware	O
support	O
for	O
floating-point	B-Algorithm
operations	O
(	O
while	O
they	O
increasingly	O
have	O
them	O
as	O
standard	O
,	O
at	B-Operating_System
least	O
32-bit	O
ones	O
)	O
.	O
</s>
<s>
When	O
a	O
CPU	B-General_Concept
is	O
executing	O
a	O
program	O
that	O
calls	O
for	O
a	O
floating-point	B-Algorithm
operation	O
,	O
there	O
are	O
three	O
ways	O
to	O
carry	O
it	O
out	O
:	O
</s>
<s>
In	O
1954	O
,	O
the	O
IBM	B-Device
704	I-Device
had	O
floating-point	B-Algorithm
arithmetic	I-Algorithm
as	O
a	O
standard	O
feature	O
,	O
one	O
of	O
its	O
major	O
improvements	O
over	O
its	O
predecessor	O
the	O
IBM	B-Device
701	I-Device
.	O
</s>
<s>
In	O
1963	O
,	O
Digital	O
announced	O
the	O
PDP-6	B-Device
,	O
which	O
had	O
floating	B-Algorithm
point	I-Algorithm
as	O
a	O
standard	O
feature	O
.	O
</s>
<s>
In	O
1963	O
,	O
the	O
GE-235	B-Device
featured	O
an	O
"	O
Auxiliary	O
Arithmetic	O
Unit	O
"	O
for	O
floating	B-Algorithm
point	I-Algorithm
and	O
double-precision	O
calculations	O
.	O
</s>
<s>
Historically	O
,	O
some	O
systems	O
implemented	O
floating	B-Algorithm
point	I-Algorithm
with	O
a	O
coprocessor	B-General_Concept
rather	O
than	O
as	O
an	O
integrated	O
unit	O
(	O
but	O
now	O
in	O
addition	O
to	O
the	O
CPU	B-General_Concept
,	O
e.g.	O
</s>
<s>
GPUs	B-Architecture
that	O
are	O
coprocessors	B-General_Concept
not	O
always	O
built	O
into	O
the	O
CPU	B-General_Concept
have	O
FPUs	O
as	O
a	O
rule	O
,	O
while	O
first	O
generations	O
of	O
GPUs	B-Architecture
did	O
n't	O
)	O
.	O
</s>
<s>
Where	O
floating-point	B-Algorithm
calculation	O
hardware	O
has	O
not	O
been	O
provided	O
,	O
floating-point	B-Algorithm
calculations	O
are	O
done	O
in	O
software	O
,	O
which	O
takes	O
more	O
processor	O
time	O
,	O
but	O
avoids	O
the	O
cost	O
of	O
the	O
extra	O
hardware	O
.	O
</s>
<s>
For	O
a	O
particular	O
computer	B-General_Concept
architecture	I-General_Concept
,	O
the	O
floating-point	B-General_Concept
unit	I-General_Concept
instructions	O
may	O
be	O
emulated	B-Application
by	O
a	O
library	B-Library
of	O
software	O
functions	O
;	O
this	O
may	O
permit	O
the	O
same	O
object	B-Language
code	I-Language
to	O
run	O
on	O
systems	O
with	O
or	O
without	O
floating-point	B-Algorithm
hardware	O
.	O
</s>
<s>
Emulation	B-Application
can	O
be	O
implemented	O
on	O
any	O
of	O
several	O
levels	O
:	O
in	O
the	O
CPU	B-General_Concept
as	O
microcode	B-Device
(	O
not	O
a	O
common	O
practice	O
)	O
,	O
as	O
an	O
operating	B-General_Concept
system	I-General_Concept
function	O
,	O
or	O
in	O
user-space	B-Operating_System
code	O
.	O
</s>
<s>
When	O
only	O
integer	O
functionality	O
is	O
available	O
,	O
the	O
CORDIC	B-Algorithm
floating-point	B-Algorithm
emulation	B-Application
methods	O
are	O
most	O
commonly	O
used	O
.	O
</s>
<s>
In	O
most	O
modern	O
computer	B-General_Concept
architectures	I-General_Concept
,	O
there	O
is	O
some	O
division	O
of	O
floating-point	B-Algorithm
operations	O
from	O
integer	O
operations	O
.	O
</s>
<s>
This	O
division	O
varies	O
significantly	O
by	O
architecture	O
;	O
some	O
have	O
dedicated	O
floating-point	B-Algorithm
registers	O
,	O
while	O
some	O
,	O
like	O
Intel	B-Operating_System
x86	I-Operating_System
,	O
take	O
it	O
as	O
far	O
as	O
independent	O
clocking	O
schemes	O
.	O
</s>
<s>
CORDIC	B-Algorithm
routines	O
have	O
been	O
implemented	O
in	O
Intel	B-Application
x87	I-Application
coprocessors	B-General_Concept
(	O
8087	B-Device
,	O
80287	O
,	O
80387	O
)	O
up	O
to	O
the	O
80486	B-General_Concept
microprocessor	O
series	O
,	O
as	O
well	O
as	O
in	O
the	O
Motorola	B-General_Concept
68881	I-General_Concept
and	O
68882	B-General_Concept
for	O
some	O
kinds	O
of	O
floating-point	B-Algorithm
instructions	O
,	O
mainly	O
as	O
a	O
way	O
to	O
reduce	O
the	O
gate	O
counts	O
(	O
and	O
complexity	O
)	O
of	O
the	O
FPU	O
subsystem	O
.	O
</s>
<s>
Floating-point	B-Algorithm
operations	O
are	O
often	O
pipelined	B-General_Concept
.	O
</s>
<s>
In	O
earlier	O
superscalar	B-General_Concept
architectures	I-General_Concept
without	O
general	O
out-of-order	B-General_Concept
execution	I-General_Concept
,	O
floating-point	B-Algorithm
operations	O
were	O
sometimes	O
pipelined	B-General_Concept
separately	O
from	O
integer	O
operations	O
.	O
</s>
<s>
The	O
modular	O
architecture	O
of	O
Bulldozer	O
microarchitecture	O
uses	O
a	O
special	O
FPU	O
named	O
FlexFPU	O
,	O
which	O
uses	O
simultaneous	B-Operating_System
multithreading	I-Operating_System
.	O
</s>
<s>
Each	O
physical	O
integer	O
core	O
,	O
two	O
per	O
module	O
,	O
is	O
single-threaded	O
,	O
in	O
contrast	O
with	O
Intel	O
's	O
Hyperthreading	B-Operating_System
,	O
where	O
two	O
virtual	O
simultaneous	O
threads	O
share	O
the	O
resources	O
of	O
a	O
single	O
physical	O
core	O
.	O
</s>
<s>
Some	O
floating-point	B-Algorithm
hardware	O
only	O
supports	O
the	O
simplest	O
operations	O
:	O
addition	O
,	O
subtraction	O
,	O
and	O
multiplication	O
.	O
</s>
<s>
But	O
even	O
the	O
most	O
complex	O
floating-point	B-Algorithm
hardware	O
has	O
a	O
finite	O
number	O
of	O
operations	O
it	O
can	O
support	O
for	O
example	O
,	O
no	O
FPUs	O
directly	O
support	O
arbitrary-precision	B-Algorithm
arithmetic	I-Algorithm
.	O
</s>
<s>
When	O
a	O
CPU	B-General_Concept
is	O
executing	O
a	O
program	O
that	O
calls	O
for	O
a	O
floating-point	B-Algorithm
operation	O
that	O
is	O
not	O
directly	O
supported	O
by	O
the	O
hardware	O
,	O
the	O
CPU	B-General_Concept
uses	O
a	O
series	O
of	O
simpler	O
floating-point	B-Algorithm
operations	O
.	O
</s>
<s>
In	O
systems	O
without	O
any	O
floating-point	B-Algorithm
hardware	O
,	O
the	O
CPU	B-General_Concept
emulates	B-Application
it	O
using	O
a	O
series	O
of	O
simpler	O
fixed-point	O
arithmetic	O
operations	O
that	O
run	O
on	O
the	O
integer	O
arithmetic	B-General_Concept
logic	I-General_Concept
unit	I-General_Concept
.	O
</s>
<s>
The	O
software	O
that	O
lists	O
the	O
necessary	O
series	O
of	O
operations	O
to	O
emulate	B-Application
floating-point	B-Algorithm
operations	O
is	O
often	O
packaged	O
in	O
a	O
floating-point	B-Algorithm
library	B-Library
.	O
</s>
<s>
In	O
some	O
cases	O
,	O
FPUs	O
may	O
be	O
specialized	O
,	O
and	O
divided	O
between	O
simpler	O
floating-point	B-Algorithm
operations	O
(	O
mainly	O
addition	O
and	O
multiplication	O
)	O
and	O
more	O
complicated	O
operations	O
,	O
like	O
division	O
.	O
</s>
<s>
In	O
some	O
cases	O
,	O
only	O
the	O
simple	O
operations	O
may	O
be	O
implemented	O
in	O
hardware	O
or	O
microcode	B-Device
,	O
while	O
the	O
more	O
complex	O
operations	O
are	O
implemented	O
as	O
software	O
.	O
</s>
<s>
In	O
some	O
current	O
architectures	O
,	O
the	O
FPU	O
functionality	O
is	O
combined	O
with	O
SIMD	B-Device
units	O
to	O
perform	O
SIMD	B-Device
computation	O
;	O
an	O
example	O
of	O
this	O
is	O
the	O
augmentation	O
of	O
the	O
x87	B-Application
instructions	O
set	O
with	O
SSE	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
in	O
the	O
x86-64	B-Device
architecture	O
used	O
in	O
newer	O
Intel	O
and	O
AMD	O
processors	O
.	O
</s>
<s>
Several	O
models	O
of	O
the	O
PDP-11	B-Device
,	O
such	O
as	O
the	O
PDP-11/45	B-Device
,	O
PDP-11/34a	O
,	O
PDP-11/44	B-Device
,	O
and	O
PDP-11/70	B-Device
,	O
supported	O
an	O
add-on	O
floating-point	B-General_Concept
unit	I-General_Concept
to	O
support	O
floating-point	B-Algorithm
instructions	O
.	O
</s>
<s>
The	O
PDP-11/60	O
,	O
MicroPDP-11/23	O
and	O
several	O
VAX	B-Device
models	O
could	O
execute	O
floating-point	B-Algorithm
instructions	O
without	O
an	O
add-on	O
FPU	O
(	O
the	O
MicroPDP-11/23	O
required	O
an	O
add-on	O
microcode	B-Device
option	O
for	O
that	O
)	O
,	O
and	O
offered	O
add-on	O
accelerators	O
to	O
speed	O
up	O
the	O
execution	O
of	O
those	O
instructions	O
.	O
</s>
<s>
In	O
the	O
1980s	O
,	O
it	O
was	O
common	O
in	O
IBM	O
PC/compatible	O
microcomputers	B-Architecture
for	O
the	O
FPU	O
to	O
be	O
entirely	O
separate	O
from	O
the	O
CPU	B-General_Concept
,	O
and	O
typically	O
sold	O
as	O
an	O
optional	O
add-on	O
.	O
</s>
<s>
The	O
IBM	B-Device
PC	I-Device
,	O
XT	B-Device
,	O
and	O
most	O
compatibles	O
based	O
on	O
the	O
8088	O
or	O
8086	O
had	O
a	O
socket	O
for	O
the	O
optional	O
8087	B-Device
coprocessor	B-General_Concept
.	O
</s>
<s>
The	O
AT	B-Operating_System
and	O
80286-based	O
systems	O
were	O
generally	O
socketed	O
for	O
the	O
80287	O
,	O
and	O
80386/80386SX	B-General_Concept
-based	O
machines	O
for	O
the	O
80387	O
and	O
80387SX	B-Device
respectively	O
,	O
although	O
early	O
ones	O
were	O
socketed	O
for	O
the	O
80287	O
,	O
since	O
the	O
80387	O
did	O
not	O
exist	O
yet	O
.	O
</s>
<s>
Other	O
companies	O
manufactured	O
co-processors	B-General_Concept
for	O
the	O
Intel	B-Operating_System
x86	I-Operating_System
series	O
.	O
</s>
<s>
Acorn	O
Computers	O
opted	O
for	O
the	O
WE32206	O
to	O
offer	O
single	O
,	O
double	O
and	O
extended	B-Algorithm
precision	I-Algorithm
to	O
its	O
ARM	B-Architecture
powered	O
Archimedes	B-Device
range	O
.	O
</s>
<s>
Coprocessors	B-General_Concept
were	O
available	O
for	O
the	O
Motorola	B-Device
68000	I-Device
family	I-Device
,	O
the	O
68881	B-General_Concept
and	I-General_Concept
68882	I-General_Concept
.	O
</s>
<s>
These	O
were	O
common	O
in	O
Motorola	O
68020/68030	O
-based	O
workstations	B-Device
,	O
like	O
the	O
Sun-3	B-Device
series	O
.	O
</s>
<s>
They	O
were	O
also	O
commonly	O
added	O
to	O
higher-end	O
models	O
of	O
Apple	O
Macintosh	B-Device
and	O
Commodore	B-Device
Amiga	I-Device
series	O
,	O
but	O
unlike	O
IBM	O
PC-compatible	O
systems	O
,	O
sockets	O
for	O
adding	O
the	O
coprocessor	B-General_Concept
were	O
not	O
as	O
common	O
in	O
lower-end	O
systems	O
.	O
</s>
<s>
There	O
are	O
also	O
add-on	O
FPUs	O
coprocessor	B-General_Concept
units	O
for	O
microcontroller	B-Architecture
units	I-Architecture
(	O
MCUs/μCs	O
)	O
/single	O
-board	O
computer	O
(	O
SBCs	O
)	O
,	O
which	O
serve	O
to	O
provide	O
floating-point	B-Algorithm
arithmetic	I-Algorithm
capability	O
.	O
</s>
<s>
These	O
add-on	O
FPUs	O
are	O
host-processor-independent	O
,	O
possess	O
their	O
own	O
programming	O
requirements	O
(	O
operations	O
,	O
instruction	B-General_Concept
sets	I-General_Concept
,	O
etc	O
.	O
)	O
</s>
<s>
and	O
are	O
often	O
provided	O
with	O
their	O
own	O
integrated	B-Application
development	I-Application
environments	I-Application
(	O
IDEs	O
)	O
.	O
</s>
