<s>
Flip	B-Device
chip	I-Device
,	O
also	O
known	O
as	O
controlled	O
collapse	O
chip	B-Algorithm
connection	I-Algorithm
or	O
its	O
abbreviation	O
,	O
C4	O
,	O
is	O
a	O
method	O
for	O
interconnecting	O
dies	O
such	O
as	O
semiconductor	O
devices	O
,	O
IC	O
chips	O
,	O
integrated	O
passive	O
devices	O
and	O
microelectromechanical	B-Architecture
systems	I-Architecture
(	O
MEMS	B-Architecture
)	O
,	O
to	O
external	O
circuitry	O
with	O
solder	O
bumps	O
that	O
have	O
been	O
deposited	O
onto	O
the	O
chip	O
pads	O
.	O
</s>
<s>
The	O
solder	O
bumps	O
are	O
deposited	O
on	O
the	O
chip	O
pads	O
on	O
the	O
top	O
side	O
of	O
the	O
wafer	B-Architecture
during	O
the	O
final	O
wafer	B-Architecture
processing	O
step	O
.	O
</s>
<s>
In	O
order	O
to	O
mount	O
the	O
chip	O
to	O
external	O
circuitry	O
(	O
e.g.	O
,	O
a	O
circuit	O
board	O
or	O
another	O
chip	O
or	O
wafer	B-Architecture
)	O
,	O
it	O
is	O
flipped	O
over	O
so	O
that	O
its	O
top	O
side	O
faces	O
down	O
,	O
and	O
aligned	O
so	O
that	O
its	O
pads	O
align	O
with	O
matching	O
pads	O
on	O
the	O
external	O
circuit	O
,	O
and	O
then	O
the	O
solder	O
is	O
reflowed	O
to	O
complete	O
the	O
interconnect	O
.	O
</s>
<s>
This	O
is	O
in	O
contrast	O
to	O
wire	B-Algorithm
bonding	I-Algorithm
,	O
in	O
which	O
the	O
chip	O
is	O
mounted	O
upright	O
and	O
fine	O
wires	O
are	O
welded	O
onto	O
the	O
chip	O
pads	O
and	O
lead	O
frame	O
contacts	O
to	O
interconnect	O
the	O
chip	O
pads	O
to	O
external	O
circuitry	O
.	O
</s>
<s>
Integrated	B-Architecture
circuits	I-Architecture
are	I-Architecture
created	I-Architecture
on	I-Architecture
the	I-Architecture
wafer	I-Architecture
.	O
</s>
<s>
Chips	O
are	O
flipped	O
and	O
positioned	O
so	O
that	O
the	O
solder	B-Algorithm
balls	I-Algorithm
are	O
facing	O
the	O
connectors	O
on	O
the	O
external	O
circuitry	O
.	O
</s>
<s>
Solder	B-Algorithm
balls	I-Algorithm
are	O
then	O
remelted	O
(	O
typically	O
using	O
hot	O
air	O
reflow	O
)	O
.	O
</s>
<s>
In	O
typical	O
semiconductor	B-Architecture
fabrication	I-Architecture
systems	O
,	O
chips	O
are	O
built	O
up	O
in	O
large	O
numbers	O
on	O
a	O
single	O
large	O
wafer	B-Architecture
of	O
semiconductor	O
material	O
,	O
typically	O
silicon	O
.	O
</s>
<s>
The	O
chips	O
are	O
then	O
cut	O
out	O
of	O
the	O
wafer	B-Architecture
and	O
attached	O
to	O
their	O
carriers	O
,	O
typically	O
via	O
wire	B-Algorithm
bonding	I-Algorithm
such	O
as	O
thermosonic	B-Algorithm
bonding	I-Algorithm
.	O
</s>
<s>
Processing	O
a	O
flip	B-Device
chip	I-Device
is	O
similar	O
to	O
conventional	O
IC	O
fabrication	B-Architecture
,	O
with	O
a	O
few	O
additional	O
steps	O
.	O
</s>
<s>
The	O
chips	O
are	O
then	O
cut	O
out	O
of	O
the	O
wafer	B-Architecture
as	O
normal	O
.	O
</s>
<s>
To	O
attach	O
the	O
flip	B-Device
chip	I-Device
into	O
a	O
circuit	O
,	O
the	O
chip	O
is	O
inverted	O
to	O
bring	O
the	O
solder	O
dots	O
down	O
onto	O
connectors	O
on	O
the	O
underlying	O
electronics	O
or	O
circuit	O
board	O
.	O
</s>
<s>
The	O
solder	O
is	O
then	O
re-melted	O
to	O
produce	O
an	O
electrical	O
connection	O
,	O
typically	O
using	O
a	O
thermosonic	B-Algorithm
bonding	I-Algorithm
or	O
alternatively	O
reflow	O
solder	O
process	O
.	O
</s>
<s>
Tape-automated	O
bonding	O
(	O
TAB	O
)	O
was	O
developed	O
for	O
connecting	O
dies	O
with	O
thermocompression	O
or	O
thermosonic	B-Algorithm
bonding	I-Algorithm
to	O
a	O
flexible	O
substrate	B-Architecture
including	O
from	O
one	O
to	O
three	O
conductive	O
layers	O
.	O
</s>
<s>
Also	O
with	O
TAB	O
it	O
is	O
possible	O
to	O
connect	O
die	O
pins	O
all	O
at	O
the	O
same	O
time	O
as	O
with	O
the	O
soldering	O
based	O
flip	B-Device
chip	I-Device
mounting	O
.	O
</s>
<s>
Originally	O
TAB	O
could	O
produce	O
finer	O
pitch	O
interconnections	O
compared	O
to	O
flip	B-Device
chip	I-Device
,	O
but	O
with	O
the	O
development	O
of	O
the	O
flip	B-Device
chip	I-Device
this	O
advantage	O
has	O
diminished	O
and	O
has	O
kept	O
TAB	O
to	O
be	O
a	O
specialized	O
interconnection	O
technique	O
of	O
display	O
drivers	O
or	O
similar	O
requiring	O
specific	O
TAB	O
compliant	O
roll-to-roll	O
(	O
R2R	O
,	O
reel-to-reel	O
)	O
like	O
assembly	O
system	O
.	O
</s>
<s>
The	O
resulting	O
completed	O
flip	B-Device
chip	I-Device
assembly	O
is	O
much	O
smaller	O
than	O
a	O
traditional	O
carrier-based	O
system	O
;	O
the	O
chip	O
sits	O
directly	O
on	O
the	O
circuit	O
board	O
,	O
and	O
is	O
much	O
smaller	O
than	O
the	O
carrier	O
both	O
in	O
area	O
and	O
height	O
.	O
</s>
<s>
Flip	B-Device
chips	I-Device
have	O
several	O
disadvantages	O
.	O
</s>
<s>
The	O
process	O
was	O
originally	O
introduced	O
commercially	O
by	O
IBM	O
in	O
the	O
1960s	O
for	O
individual	O
transistors	O
and	O
diodes	O
packaged	O
for	O
use	O
in	O
their	O
mainframe	B-Architecture
systems	O
.	O
</s>
<s>
Since	O
the	O
flip	B-Device
chip	I-Device
's	O
introduction	O
a	O
number	O
of	O
alternatives	O
to	O
the	O
solder	O
bumps	O
have	O
been	O
introduced	O
,	O
including	O
gold	O
balls	O
or	O
molded	O
studs	O
,	O
electrically	O
conductive	B-Algorithm
polymer	I-Algorithm
and	O
the	O
"	O
plated	O
bump	O
"	O
process	O
that	O
removes	O
an	O
insulating	O
plating	O
by	O
chemical	O
means	O
.	O
</s>
<s>
Flip	B-Device
chips	I-Device
have	O
recently	O
gained	O
popularity	O
among	O
manufacturers	O
of	O
cell	O
phones	O
and	O
other	O
small	O
electronics	O
where	O
the	O
size	O
savings	O
are	O
valuable	O
.	O
</s>
