<s>
In	O
computer	B-General_Concept
science	I-General_Concept
,	O
the	O
fetch-and-add	B-Operating_System
(	O
FAA	O
)	O
CPU	B-General_Concept
instruction	O
atomically	B-General_Concept
increments	O
the	O
contents	O
of	O
a	O
memory	B-General_Concept
location	I-General_Concept
by	O
a	O
specified	O
value	O
.	O
</s>
<s>
increment	O
the	O
value	O
at	O
address	O
by	O
,	O
where	O
is	O
a	O
memory	B-General_Concept
location	I-General_Concept
and	O
is	O
some	O
value	O
,	O
and	O
return	O
the	O
original	O
value	O
at	O
.	O
</s>
<s>
in	O
such	O
a	O
way	O
that	O
if	O
this	O
operation	O
is	O
executed	O
by	O
one	O
process	O
in	O
a	O
concurrent	B-Architecture
system	O
,	O
no	O
other	O
process	O
will	O
ever	O
see	O
an	O
intermediate	O
result	O
.	O
</s>
<s>
Fetch-and-add	B-Operating_System
can	O
be	O
used	O
to	O
implement	O
concurrency	B-Operating_System
control	I-Operating_System
structures	O
such	O
as	O
mutex	B-Operating_System
locks	I-Operating_System
and	O
semaphores	B-Operating_System
.	O
</s>
<s>
are	O
not	O
safe	O
in	O
a	O
concurrent	B-Architecture
system	O
,	O
where	O
multiple	O
processes	B-Operating_System
or	O
threads	B-Operating_System
are	O
running	O
concurrently	O
(	O
either	O
in	O
a	O
multi-processor	B-Operating_System
system	O
,	O
or	O
preemptively	B-Operating_System
scheduled	O
onto	O
some	O
single-core	O
systems	O
)	O
.	O
</s>
<s>
When	O
one	O
process	O
is	O
doing	O
and	O
another	O
is	O
doing	O
concurrently	O
,	O
there	O
is	O
a	O
race	B-Operating_System
condition	I-Operating_System
.	O
</s>
<s>
In	O
uniprocessor	B-Operating_System
systems	I-Operating_System
with	O
no	O
kernel	B-Algorithm
preemption	I-Algorithm
supported	O
,	O
it	O
is	O
sufficient	O
to	O
disable	O
interrupts	B-Application
before	O
accessing	O
a	O
critical	B-Operating_System
section	I-Operating_System
.	O
</s>
<s>
However	O
,	O
in	O
multiprocessor	B-Operating_System
systems	O
(	O
even	O
with	O
interrupts	B-Application
disabled	O
)	O
two	O
or	O
more	O
processors	O
could	O
be	O
attempting	O
to	O
access	O
the	O
same	O
memory	O
at	O
the	O
same	O
time	O
.	O
</s>
<s>
The	O
fetch-and-add	B-Operating_System
instruction	O
allows	O
any	O
processor	O
to	O
atomically	B-General_Concept
increment	O
a	O
value	O
in	O
memory	O
,	O
preventing	O
such	O
multiple	O
processor	O
collisions	O
.	O
</s>
<s>
Maurice	O
Herlihy	O
(	O
1991	O
)	O
proved	O
that	O
fetch-and-add	B-Operating_System
has	O
a	O
finite	O
consensus	B-Operating_System
number	O
,	O
in	O
contrast	O
to	O
the	O
compare-and-swap	B-Operating_System
operation	O
.	O
</s>
<s>
The	O
fetch-and-add	B-Operating_System
operation	O
can	O
solve	O
the	O
wait-free	O
consensus	B-Operating_System
problem	I-Operating_System
for	O
no	O
more	O
than	O
two	O
concurrent	B-Architecture
processes	B-Operating_System
.	O
</s>
<s>
The	O
fetch-and-add	B-Operating_System
instruction	O
behaves	O
like	O
the	O
following	O
function	O
.	O
</s>
<s>
Crucially	O
,	O
the	O
entire	O
function	O
is	O
executed	O
atomically	B-General_Concept
:	O
no	O
process	O
can	O
interrupt	B-Application
the	O
function	O
mid-execution	O
and	O
hence	O
see	O
a	O
state	O
that	O
only	O
exists	O
during	O
the	O
execution	O
of	O
the	O
function	O
.	O
</s>
<s>
This	O
code	O
only	O
serves	O
to	O
help	O
explain	O
the	O
behaviour	O
of	O
fetch-and-add	B-Operating_System
;	O
atomicity	B-General_Concept
requires	O
explicit	O
hardware	O
support	O
and	O
hence	O
can	O
not	O
be	O
implemented	O
as	O
a	O
simple	O
high	O
level	O
function	O
.	O
</s>
<s>
To	O
implement	O
a	O
mutual	B-Operating_System
exclusion	I-Operating_System
lock	O
,	O
we	O
define	O
the	O
operation	O
FetchAndIncrement	O
,	O
which	O
is	O
equivalent	O
to	O
FetchAndAdd	O
with	O
inc	O
=	O
1	O
.	O
</s>
<s>
With	O
this	O
operation	O
,	O
a	O
mutual	B-Operating_System
exclusion	I-Operating_System
lock	O
can	O
be	O
implemented	O
using	O
the	O
ticket	B-Operating_System
lock	I-Operating_System
algorithm	O
as	O
:	O
</s>
<s>
An	O
atomic	O
function	O
appears	O
in	O
the	O
C++11	B-Language
standard	O
.	O
</s>
<s>
It	O
is	O
available	O
as	O
a	O
proprietary	O
extension	O
to	O
C	B-Language
in	O
the	O
Itanium	B-General_Concept
ABI	B-Operating_System
specification	O
,	O
and	O
(	O
with	O
the	O
same	O
syntax	O
)	O
in	O
GCC	B-Application
.	O
</s>
<s>
In	O
the	O
x86	O
architecture	O
,	O
the	O
instruction	O
ADD	O
with	O
the	O
destination	O
operand	O
specifying	O
a	O
memory	B-General_Concept
location	I-General_Concept
is	O
a	O
fetch-and-add	B-Operating_System
instruction	O
that	O
has	O
been	O
there	O
since	O
the	O
8086	B-General_Concept
(	O
it	O
just	O
was	O
n't	O
called	O
that	O
then	O
)	O
,	O
and	O
with	O
the	O
LOCK	O
prefix	O
,	O
is	O
atomic	O
across	O
multiple	O
processors	O
.	O
</s>
<s>
However	O
,	O
it	O
could	O
not	O
return	O
the	O
original	O
value	O
of	O
the	O
memory	B-General_Concept
location	I-General_Concept
(	O
though	O
it	O
returned	O
some	O
flags	O
)	O
until	O
the	O
486	B-General_Concept
introduced	O
the	O
XADD	B-Operating_System
instruction	O
.	O
</s>
<s>
The	O
following	O
is	O
a	O
C	B-Language
implementation	O
for	O
the	O
GCC	B-Application
compiler	I-Application
,	O
for	O
both	O
32	O
-	O
and	O
64-bit	O
x86	O
Intel	O
platforms	O
,	O
based	O
on	O
extended	O
asm	O
syntax	O
:	O
</s>
<s>
Fetch-and-add	B-Operating_System
was	O
introduced	O
by	O
the	O
Ultracomputer	B-Operating_System
project	O
,	O
which	O
also	O
produced	O
a	O
multiprocessor	B-Operating_System
supporting	O
fetch-and-add	B-Operating_System
and	O
containing	O
custom	O
VLSI	O
switches	O
that	O
were	O
able	O
to	O
combine	O
concurrent	B-Architecture
memory	O
references	O
(	O
including	O
fetch-and-adds	B-Operating_System
)	O
to	O
prevent	O
them	O
from	O
serializing	O
at	O
the	O
memory	O
module	O
containing	O
the	O
destination	O
operand	O
.	O
</s>
