<s>
An	O
external	O
memory	O
interface	O
is	O
a	O
bus	B-General_Concept
protocol	O
for	O
communication	O
from	O
an	O
integrated	O
circuit	O
,	O
such	O
as	O
a	O
microprocessor	B-Architecture
,	O
to	O
an	O
external	O
memory	O
device	O
located	O
on	O
a	O
circuit	O
board	O
.	O
</s>
<s>
The	O
external	B-General_Concept
memory	I-General_Concept
interface	I-General_Concept
enables	O
the	O
processor	O
to	O
interface	O
with	O
third	O
level	O
caches	O
,	O
peripherals	O
,	O
and	O
external	O
memory	O
.	O
</s>
<s>
Some	O
common	O
external	B-General_Concept
memory	I-General_Concept
interfaces	I-General_Concept
include	O
:	O
</s>
