<s>
In	O
computer	O
engineering	O
,	O
an	O
execution	B-General_Concept
unit	I-General_Concept
(	O
E-unit	O
or	O
EU	O
)	O
is	O
a	O
part	O
of	O
the	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
or	O
graphics	B-Architecture
processing	I-Architecture
unit	I-Architecture
(	O
GPU	B-Architecture
)	O
that	O
performs	O
the	O
operations	O
and	O
calculations	O
forwarded	O
from	O
the	O
instruction	B-General_Concept
unit	I-General_Concept
.	O
</s>
<s>
It	O
may	O
have	O
its	O
own	O
internal	O
control	O
sequence	O
unit	O
(	O
not	O
to	O
be	O
confused	O
with	O
the	O
CPU	O
's	O
main	O
control	B-General_Concept
unit	I-General_Concept
)	O
,	O
some	O
registers	O
,	O
and	O
other	O
internal	O
units	O
such	O
as	O
an	O
arithmetic	B-General_Concept
logic	I-General_Concept
unit	I-General_Concept
,	O
address	B-General_Concept
generation	I-General_Concept
unit	I-General_Concept
,	O
floating-point	B-General_Concept
unit	I-General_Concept
,	O
load	B-Architecture
–	I-Architecture
store	I-Architecture
unit	I-Architecture
,	O
branch	O
execution	B-General_Concept
unit	I-General_Concept
or	O
some	O
smaller	O
and	O
more	O
specific	O
components	O
.	O
</s>
<s>
It	O
is	O
common	O
for	O
modern	O
CPUs	O
to	O
have	O
multiple	O
parallel	O
functional	B-General_Concept
units	I-General_Concept
within	O
its	O
execution	B-General_Concept
units	I-General_Concept
,	O
which	O
is	O
referred	O
to	O
as	O
superscalar	B-General_Concept
design	O
.	O
</s>
<s>
Additionally	O
,	O
modern	O
CPUs	O
 '	O
execution	B-General_Concept
units	I-General_Concept
are	O
usually	O
pipelined	B-General_Concept
.	O
</s>
