<s>
The	O
ES-1	O
was	O
Evans	O
&	O
Sutherland	O
's	O
abortive	O
attempt	O
to	O
enter	O
the	O
supercomputer	B-Architecture
market	O
.	O
</s>
<s>
It	O
was	O
aimed	O
at	O
technical	O
and	O
scientific	O
users	O
who	O
would	O
normally	O
buy	O
a	O
machine	O
like	O
a	O
Cray-1	B-Device
but	O
did	O
not	O
need	O
that	O
level	O
of	O
power	O
or	O
throughput	O
for	O
graphics-heavy	O
workloads	O
.	O
</s>
<s>
Jean-Yves	O
Leclerc	O
was	O
a	O
computer	O
designer	O
who	O
was	O
unable	O
to	O
find	O
funding	O
in	O
Europe	O
for	O
a	O
high-performance	O
server	B-Application
design	O
.	O
</s>
<s>
After	O
some	O
discussion	O
he	O
eventually	O
convinced	O
him	O
that	O
since	O
most	O
of	O
their	O
customers	O
were	O
running	O
E&S	O
graphics	O
hardware	O
on	O
Cray	O
Research	O
machines	O
and	O
other	O
supercomputers	B-Architecture
,	O
it	O
would	O
make	O
sense	O
if	O
E&S	O
could	O
offer	O
their	O
own	O
low-cost	O
platform	O
instead	O
.	O
</s>
<s>
This	O
would	O
include	O
a	O
built-in	O
graphics	O
engine	O
and	O
2GB	O
of	O
RAM	B-Architecture
,	O
running	O
BSD	B-Operating_System
Unix	I-Operating_System
4.2	I-Operating_System
.	O
</s>
<s>
The	O
basic	O
idea	O
of	O
Leclerc	O
's	O
system	O
was	O
to	O
use	O
an	O
8×8	O
crossbar	O
switch	O
to	O
connect	O
eight	O
custom	O
CMOS	B-Device
CPUs	B-Device
together	O
at	O
high	O
speed	O
.	O
</s>
<s>
Since	O
memory	O
was	O
logically	O
organized	O
on	O
the	O
"	O
far	O
side	O
"	O
of	O
the	O
crossbars	O
,	O
the	O
memory	O
controller	O
handled	O
many	O
of	O
the	O
tasks	O
that	O
would	O
normally	O
be	O
left	O
to	O
the	O
processors	O
,	O
including	O
interrupt	O
handling	O
and	O
virtual	B-Architecture
memory	I-Architecture
translation	O
,	O
avoiding	O
a	O
trip	O
through	O
the	O
crossbar	O
for	O
these	O
housekeeping	O
tasks	O
.	O
</s>
<s>
In	O
order	O
to	O
allow	O
the	O
system	O
to	O
work	O
even	O
with	O
the	O
high	O
inter-unit	O
latencies	O
,	O
each	O
processor	O
used	O
an	O
8-deep	O
instruction	B-General_Concept
pipeline	I-General_Concept
.	O
</s>
<s>
Each	O
processor	O
also	O
included	O
a	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
from	O
Weitek	O
.	O
</s>
<s>
This	O
allowed	O
favorable	O
per-processor	O
performance	O
comparisons	O
with	O
other	O
supercomputers	B-Architecture
of	O
the	O
era	O
.	O
</s>
<s>
While	O
this	O
was	O
fast	O
for	O
a	O
CMOS	B-Device
machine	O
processor	O
of	O
the	O
time	O
,	O
it	O
was	O
hardly	O
competitive	O
for	O
a	O
supercomputer	B-Architecture
.	O
</s>
<s>
The	O
machine	O
ran	O
an	O
early	O
version	O
of	O
the	O
Mach	B-Operating_System
kernel	I-Operating_System
for	O
multi-processor	O
support	O
.	O
</s>
<s>
In	O
trying	O
to	O
position	O
the	O
machine	O
,	O
Ivan	O
Sutherland	O
noted	O
that	O
their	O
flight	B-Application
simulation	I-Application
systems	O
actually	O
ran	O
at	O
higher	O
speeds	O
,	O
and	O
that	O
the	O
ES-1	O
was	O
"	O
a	O
step	O
down	O
for	O
us	O
"	O
.	O
</s>
