<s>
Espresso	B-Device
is	O
the	O
codename	O
of	O
the	O
32-bit	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
used	O
in	O
Nintendo	O
's	O
Wii	B-Device
U	I-Device
video	B-Device
game	I-Device
console	I-Device
.	O
</s>
<s>
It	O
was	O
designed	O
by	O
IBM	O
,	O
and	O
was	O
produced	O
using	O
a	O
45	B-Algorithm
nm	I-Algorithm
silicon-on-insulator	B-Algorithm
process	O
.	O
</s>
<s>
The	O
Espresso	B-Device
chip	O
resides	O
together	O
with	O
a	O
GPU	B-Architecture
from	O
AMD	O
on	O
an	O
MCM	B-Algorithm
manufactured	O
by	O
Renesas	O
.	O
</s>
<s>
IBM	O
and	O
Nintendo	O
have	O
revealed	O
that	O
the	O
Espresso	B-Device
processor	O
is	O
a	O
PowerPC-based	O
microprocessor	O
with	O
three	O
cores	O
on	O
a	O
single	O
chip	O
to	O
reduce	O
power	O
consumption	O
and	O
increase	O
speed	O
.	O
</s>
<s>
The	O
CPU	O
and	O
the	O
graphics	B-Architecture
processor	I-Architecture
are	O
placed	O
on	O
a	O
single	O
substrate	O
as	O
a	O
multi-chip	B-Algorithm
module	I-Algorithm
(	O
MCM	B-Algorithm
)	O
to	O
reduce	O
complexity	O
,	O
increase	O
the	O
communication	O
speed	O
between	O
the	O
chips	O
,	O
further	O
reduce	O
power	O
consumption	O
and	O
reduce	O
cost	O
and	O
space	O
required	O
.	O
</s>
<s>
The	O
two	O
chips	O
were	O
assembled	O
to	O
the	O
complete	O
MCM	B-Algorithm
by	O
Renesas	O
in	O
Japan	O
.	O
</s>
<s>
Espresso	B-Device
itself	O
was	O
manufactured	O
by	O
IBM	O
in	O
its	O
300mm	O
plant	O
in	O
East	O
Fishkill	O
,	O
New	O
York	O
,	O
using	O
45	B-Algorithm
nm	I-Algorithm
SOI-technology	O
and	O
embedded	O
DRAM	O
(	O
eDRAM	O
)	O
for	O
caches	B-General_Concept
.	O
</s>
<s>
While	O
unverified	O
by	O
Nintendo	O
,	O
hackers	O
,	O
teardowns	O
,	O
and	O
unofficial	O
informants	O
have	O
since	O
revealed	O
more	O
information	O
about	O
the	O
Espresso	B-Device
,	O
such	O
as	O
its	O
name	O
,	O
size	O
and	O
speed	O
.	O
</s>
<s>
The	O
microarchitecture	O
seems	O
to	O
be	O
quite	O
similar	O
to	O
its	O
predecessors	O
the	O
Broadway	B-Device
and	O
Gekko	B-Device
,	O
i.e.	O
</s>
<s>
PowerPC	B-Architecture
750	O
based	O
,	O
but	O
enhanced	O
with	O
larger	O
and	O
faster	O
caches	B-General_Concept
and	O
multiprocessor	B-Operating_System
support	O
.	O
</s>
<s>
Rumors	O
that	O
the	O
Wii	B-Device
U	I-Device
CPU	O
was	O
derived	O
from	O
IBM	O
's	O
high-end	O
POWER7	B-Device
server	O
processor	O
proved	O
false	O
,	O
as	O
it	O
would	O
potentially	O
increase	O
the	O
manufacturing	O
and	O
retail	O
cost	O
of	O
the	O
system	O
,	O
and	O
require	O
a	O
larger	O
form	O
factor	O
.	O
</s>
<s>
Espresso	B-Device
shares	O
some	O
technology	O
with	O
POWER7	B-Device
,	O
such	O
as	O
eDRAM	O
and	O
general	O
instruction	O
set	O
similarities	O
,	O
but	O
those	O
are	O
superficial	O
similarities	O
.	O
</s>
<s>
Each	O
core	O
can	O
output	O
up	O
to	O
4	O
instructions	O
per	O
clock	O
using	O
superscalar	B-General_Concept
parallelism	O
.	O
</s>
<s>
A	O
total	O
of	O
3MB	O
of	O
Level	B-General_Concept
2	I-General_Concept
cache	I-General_Concept
in	O
an	O
unusual	O
configuration	O
.	O
</s>
