<s>
Embedded	B-Algorithm
wafer	I-Algorithm
level	I-Algorithm
ball	I-Algorithm
grid	I-Algorithm
array	I-Algorithm
(	O
eWLB	B-Algorithm
)	O
is	O
a	O
packaging	O
technology	O
for	O
integrated	O
circuits	O
.	O
</s>
<s>
eWLB	B-Algorithm
is	O
a	O
further	O
development	O
of	O
the	O
classical	O
wafer	O
level	O
ball	B-Algorithm
grid	I-Algorithm
array	I-Algorithm
technology	O
(	O
WLB	O
or	O
WLP	O
:	O
wafer	O
level	O
package	O
)	O
.	O
</s>
<s>
The	O
main	O
driving	O
force	O
behind	O
the	O
eWLB	B-Algorithm
technology	O
was	O
to	O
allow	O
fanout	O
and	O
more	O
space	O
for	O
interconnect	O
routing	O
.	O
</s>
<s>
This	O
allows	O
,	O
in	O
comparison	O
to	O
classical	O
packaging	O
technologies	O
(	O
e	O
.	O
g	O
.	O
ball	B-Algorithm
grid	I-Algorithm
array	I-Algorithm
)	O
,	O
the	O
generation	O
of	O
very	O
small	O
and	O
flat	O
packages	O
with	O
excellent	O
electrical	O
and	O
thermal	O
performance	O
at	O
lowest	O
cost	O
.	O
</s>
<s>
It	O
is	O
common	O
for	O
all	O
WLB	O
technologies	O
,	O
which	O
are	O
built	O
on	O
a	O
silicon	O
wafer	O
,	O
that	O
the	O
interconnects	O
(	O
typically	O
solder	B-Algorithm
balls	I-Algorithm
)	O
fit	O
on	O
the	O
chip	O
(	O
so	O
called	O
fan-in	O
design	O
)	O
.	O
</s>
<s>
The	O
eWLB	B-Algorithm
technology	O
allows	O
the	O
realization	O
of	O
chips	O
with	O
a	O
high	O
number	O
of	O
interconnects	O
.	O
</s>
<s>
Therefore	O
a	O
front-end-processed	O
wafer	O
is	O
diced	O
and	O
the	O
singulated	B-Device
chips	O
are	O
placed	O
on	O
a	O
carrier	O
.	O
</s>
<s>
The	O
eWLB	B-Algorithm
technology	O
was	O
developed	O
by	O
Infineon	O
,	O
STMicroelectronics	O
and	O
STATS	O
ChipPAC	O
Ltd	O
.	O
First	O
components	O
were	O
brought	O
into	O
market	O
mid	O
of	O
2009	O
(	O
mobile	O
phone	O
)	O
.	O
</s>
