<s>
Elbrus-2S	B-General_Concept
+	I-General_Concept
(	O
)	O
is	O
a	O
multi-core	B-Architecture
microprocessor	I-Architecture
based	O
on	O
the	O
Elbrus	B-General_Concept
2000	I-General_Concept
architecture	O
developed	O
by	O
Moscow	O
Center	O
of	O
SPARC	O
Technologies	O
(	O
MCST	O
)	O
.	O
</s>
<s>
In	O
December	O
2014	O
,	O
it	O
was	O
announced	O
that	O
Mikron	O
Group	O
started	O
pilot	O
production	O
of	O
a	O
dual-core	B-Architecture
variant	O
of	O
this	O
microprocessor	O
called	O
Elbrus-2SM	B-General_Concept
(	O
)	O
using	O
a	O
90	O
nanometer	O
CMOS	O
manufacturing	O
process	O
in	O
Zelenograd	O
,	O
Russia	O
.	O
</s>
<s>
The	O
Elbrus-4S	O
CPU	B-General_Concept
is	O
reported	O
to	O
have	O
built	O
in	O
support	O
for	O
Intel	B-Operating_System
x86	I-Operating_System
emulation	O
as	O
well	O
as	O
a	O
native	B-Language
VLIW	B-General_Concept
mode	O
where	O
it	O
can	O
perform	O
up	O
to	O
23	O
instructions	O
per	O
clock	O
cycle	O
.	O
</s>
<s>
When	O
programs	O
are	O
built	O
for	O
Elbrus	B-General_Concept
2000	I-General_Concept
native	B-Language
mode	I-Language
,	O
the	O
compiler	B-Language
determines	O
how	O
the	O
different	O
operations	O
shall	O
be	O
distributed	O
over	O
the	O
23	O
computing	O
units	O
before	O
saving	O
the	O
final	O
program	O
.	O
</s>
<s>
This	O
means	O
that	O
no	O
dynamic	O
scheduling	O
is	O
needed	O
during	O
runtime	O
,	O
thus	O
reducing	O
the	O
amount	O
of	O
work	O
the	O
CPU	B-General_Concept
has	O
to	O
perform	O
every	O
time	O
a	O
program	O
is	O
executed	O
.	O
</s>
<s>
The	O
south	B-Device
bridge	I-Device
for	O
the	O
Elbrus	B-General_Concept
2000	I-General_Concept
chipset	B-Device
,	O
which	O
connects	O
peripherals	O
and	O
bus	B-General_Concept
to	O
the	O
CPU	B-General_Concept
is	O
developed	O
by	O
MCST	O
.	O
</s>
<s>
It	O
is	O
also	O
compatible	O
with	O
the	O
MCST-R1000	B-General_Concept
.	O
</s>
<s>
KPI	O
1991VG1YA	O
1026A010	O
Produced	O
2010	O
Process	O
CMOS	O
0.13	B-Algorithm
µm	I-Algorithm
Clock	O
rate	O
250	O
MHz	O
serial	B-Protocol
bus	I-Protocol
for	O
communication	O
with	O
the	O
microprocessor	O
1	O
GByte/s	O
–	O
receiving	O
,	O
1	O
GByte/s	O
–	O
transmission	O
PCI	B-Protocol
Express	O
controller	O
,	O
revision	O
1.0a	O
8	O
lines	O
PCI	B-Protocol
controller	O
,	O
version	O
2.3	O
32/64	O
-bit	O
at	O
clock	O
frequencies	O
of	O
33/66	O
MHz	O
Ethernet	O
controller	O
,	O
1	O
GByte/s	O
1	O
port	O
SATA	O
2.0	O
controller	O
4	O
ports	O
IDE	B-Protocol
controller	I-Protocol
,	I-Protocol
PATA-100	I-Protocol
2	O
ports	O
for	O
2	O
devices	O
USB	B-Protocol
2.0	O
controller	O
2	O
ports	O
audio	O
interface	O
controller	O
,	O
AC-97	O
2-channel	O
stereo	O
Serial	O
controller	O
,	O
RS-232	O
and	O
RS-485	O
2	O
ports	O
Parallel	O
interface	O
controller	O
,	O
IEEE-1284	B-Device
with	O
DMA	B-General_Concept
support	O
1	O
port	O
Programmable	O
universal	O
input-output	O
(	O
GPIO	B-Architecture
)	O
controller	O
16	O
signals	O
I²C	O
interface	O
Channel	O
4	O
SPI	B-Architecture
Interface	I-Architecture
Supports	O
for	O
4	O
devices	O
Interrupt	B-Application
control	O
subsystems	O
2	O
PIC	B-Architecture
+	O
1	O
IOAPIC	B-Device
Timers	O
System	B-Device
timer	I-Device
and	O
watchdog	B-Application
timer	I-Application
.	O
</s>
<s>
In	O
December	O
2012	O
,	O
Kraftway	O
announced	O
that	O
it	O
will	O
deliver	O
an	O
Elbrus	B-Device
based	I-Device
PC	I-Device
together	O
with	O
its	O
partner	O
MCST	O
.	O
</s>
<s>
It	O
was	O
done	O
using	O
a	O
hybrid	O
compiler	B-General_Concept
toolchain	I-General_Concept
(	O
cross	B-Application
and	O
native	B-Language
)	O
,	O
for	O
Elbrus-2S	B-General_Concept
+	I-General_Concept
and	O
Intel	B-Device
Core	I-Device
2	I-Device
Duo	I-Device
.	O
</s>
<s>
In	O
December	O
2014	O
,	O
an	O
implementation	O
of	O
the	O
OpenGL	B-Application
3.3	O
standard	O
was	O
demonstrated	O
by	O
running	O
the	O
game	O
Doom	B-Application
3	I-Application
BFG	O
Edition	O
on	O
an	O
Elbrus-4S	O
,	O
clocked	O
at	O
720MHz	O
,	O
using	O
a	O
Radeon	B-Device
graphics	O
card	O
with	O
2	O
gigabytes	O
of	O
video	O
memory	O
.	O
</s>
<s>
In	O
April	O
2015	O
,	O
MCST	O
announced	O
two	O
new	O
products	O
based	O
on	O
the	O
Elbrus-4S	O
CPU	B-General_Concept
:	O
One	O
19-inch	B-Application
rack	I-Application
server	B-Application
with	O
four	O
CPUs	O
(	O
16	O
cores	O
)	O
and	O
one	O
personal	B-Device
computer	I-Device
.	O
</s>
<s>
In	O
December	O
2015	O
,	O
the	O
first	O
shipment	O
of	O
PCs	B-Device
based	O
on	O
VLIW	B-General_Concept
CPU	B-General_Concept
Elbrus-4s	O
was	O
made	O
in	O
Russia	O
.	O
</s>
