<s>
A	O
digital	B-Application
timing	I-Application
diagram	I-Application
represents	O
a	O
set	O
of	O
signals	O
in	O
the	O
time	O
domain	O
.	O
</s>
<s>
A	O
timing	B-Application
diagram	I-Application
can	O
contain	O
many	O
rows	O
,	O
usually	O
one	O
of	O
them	O
being	O
the	O
clock	O
.	O
</s>
<s>
Besides	O
providing	O
an	O
overall	O
description	O
of	O
the	O
timing	O
relationships	O
,	O
the	O
digital	B-Application
timing	I-Application
diagram	I-Application
can	O
help	O
find	O
and	O
diagnose	O
digital	O
logic	O
hazards	O
.	O
</s>
<s>
Most	O
timing	B-Application
diagrams	I-Application
use	O
the	O
following	O
conventions	O
:	O
</s>
<s>
The	O
timing	B-Application
diagram	I-Application
example	O
on	O
the	O
right	O
describes	O
the	O
Serial	B-Architecture
Peripheral	I-Architecture
Interface	I-Architecture
(	O
SPI	O
)	O
Bus	O
.	O
</s>
<s>
This	O
timing	B-Application
diagram	I-Application
shows	O
the	O
clock	O
for	O
both	O
values	O
of	O
CPOL	O
and	O
the	O
values	O
for	O
the	O
two	O
data	O
lines	O
(	O
MISO	B-Architecture
&	O
MOSI	B-Architecture
)	O
for	O
each	O
value	O
of	O
CPHA	O
.	O
</s>
<s>
When	O
a	O
slave	O
's	O
SS	O
line	O
is	O
high	O
,	O
both	O
its	O
MISO	B-Architecture
and	O
MOSI	B-Architecture
line	O
should	O
be	O
high	O
impedance	O
to	O
avoid	O
disrupting	O
a	O
transfer	O
to	O
a	O
different	O
slave	O
.	O
</s>
<s>
Before	O
SS	O
being	O
pulled	O
low	O
,	O
the	O
MISO	B-Architecture
&	O
MOSI	B-Architecture
lines	O
are	O
indicated	O
with	O
a	O
"	O
z	O
"	O
for	O
high	O
impedance	O
.	O
</s>
<s>
Note	O
that	O
for	O
CPHA	O
=	O
1	O
,	O
the	O
MISO	B-Architecture
&	O
MOSI	B-Architecture
lines	O
are	O
undefined	O
until	O
after	O
the	O
first	O
clock	O
edge	O
and	O
are	O
also	O
shown	O
greyed	O
out	O
before	O
that	O
.	O
</s>
<s>
A	O
more	O
typical	O
timing	B-Application
diagram	I-Application
has	O
just	O
a	O
single	O
clock	O
and	O
numerous	O
data	O
lines	O
.	O
</s>
<s>
The	O
following	O
diagram	O
software	O
may	O
be	O
used	O
to	O
draw	O
timing	B-Application
diagrams	I-Application
:	O
</s>
