<s>
In	O
VHDL	B-Language
simulations	O
,	O
all	O
assignments	O
to	O
signals	O
(	O
a	O
VHDL	B-Language
concept	O
that	O
represents	O
a	O
net	O
connecting	O
different	O
components	O
together	O
)	O
occur	O
with	O
some	O
infinitesimal	O
delay	O
,	O
known	O
as	O
delta	B-Application
delay	I-Application
,	O
unless	O
a	O
delay	O
is	O
specified	O
.	O
</s>
<s>
Technically	O
,	O
delta	B-Application
delay	I-Application
is	O
of	O
no	O
measurable	O
unit	O
,	O
but	O
from	O
a	O
digital	O
electronics	O
hardware	O
design	O
perspective	O
one	O
should	O
think	O
of	O
delta	B-Application
delay	I-Application
as	O
being	O
the	O
smallest	O
time	O
unit	O
one	O
could	O
measure	O
,	O
such	O
as	O
a	O
femtosecond	O
(	O
fs	O
)	O
.	O
</s>
