<s>
A	O
DIMM	B-General_Concept
(	O
)	O
(	O
Dual	B-General_Concept
In-line	I-General_Concept
Memory	I-General_Concept
Module	I-General_Concept
)	O
,	O
commonly	O
called	O
a	O
RAM	O
stick	O
,	O
comprises	O
a	O
series	O
of	O
dynamic	O
random-access	O
memory	O
integrated	O
circuits	O
.	O
</s>
<s>
These	O
memory	B-General_Concept
modules	I-General_Concept
are	O
mounted	O
on	O
a	O
printed	O
circuit	O
board	O
and	O
designed	O
for	O
use	O
in	O
personal	B-Device
computers	I-Device
,	O
workstations	B-Device
,	O
printers	O
,	O
and	O
servers	O
.	O
</s>
<s>
The	O
vast	O
majority	O
of	O
DIMMs	B-General_Concept
are	O
standardized	O
through	O
JEDEC	O
standards	O
,	O
although	O
there	O
are	O
proprietary	O
DIMMs	B-General_Concept
.	O
</s>
<s>
DIMMs	B-General_Concept
come	O
in	O
a	O
variety	O
of	O
speeds	O
and	O
sizes	O
,	O
but	O
generally	O
are	O
one	O
of	O
two	O
lengths	O
-	O
PC	O
which	O
are	O
and	O
laptop	B-Device
(	O
SO-DIMM	O
)	O
which	O
are	O
about	O
half	O
the	O
size	O
at	O
.	O
</s>
<s>
DIMMs	B-General_Concept
(	O
Dual	B-General_Concept
In-line	I-General_Concept
Memory	I-General_Concept
Module	I-General_Concept
)	O
were	O
a	O
1990s	O
upgrade	O
for	O
SIMMs	B-General_Concept
(	O
Single	B-General_Concept
In-line	I-General_Concept
Memory	I-General_Concept
Modules	I-General_Concept
)	O
as	O
Intel	O
P5-based	O
Pentium	B-Device
processors	I-Device
began	O
to	O
gain	O
market	O
share	O
.	O
</s>
<s>
The	O
Pentium	B-Device
had	O
a	O
64-bit	O
bus	B-General_Concept
width	O
,	O
which	O
would	O
require	O
SIMMs	B-General_Concept
installed	O
in	O
matched	O
pairs	O
in	O
order	O
to	O
populate	O
the	O
data	B-General_Concept
bus	I-General_Concept
.	O
</s>
<s>
The	O
processor	O
would	O
then	O
access	O
the	O
two	O
SIMMs	B-General_Concept
in	O
parallel	O
.	O
</s>
<s>
DIMMs	B-General_Concept
were	O
introduced	O
to	O
eliminate	O
this	O
disadvantage	O
.	O
</s>
<s>
The	O
contacts	O
on	O
SIMMs	B-General_Concept
on	O
both	O
sides	O
are	O
redundant	O
,	O
while	O
DIMMs	B-General_Concept
have	O
separate	O
electrical	O
contacts	O
on	O
each	O
side	O
of	O
the	O
module	O
.	O
</s>
<s>
This	O
allowed	O
them	O
to	O
double	O
the	O
SIMMs	B-General_Concept
32-bit	O
data	O
path	O
into	O
a	O
64-bit	O
data	O
path	O
.	O
</s>
<s>
The	O
name	O
"	O
DIMM	B-General_Concept
"	O
was	O
chosen	O
as	O
an	O
acronym	O
for	O
Dual	B-General_Concept
In-line	I-General_Concept
Memory	I-General_Concept
Module	I-General_Concept
symbolizing	O
the	O
split	O
in	O
the	O
contacts	O
of	O
a	O
SIMM	B-General_Concept
into	O
two	O
independent	O
rows	O
.	O
</s>
<s>
Many	O
enhancements	O
have	O
occurred	O
to	O
the	O
modules	O
in	O
the	O
intervening	O
years	O
,	O
but	O
the	O
word	O
"	O
DIMM	B-General_Concept
"	O
has	O
remained	O
as	O
a	O
generic	O
term	O
for	O
computer	O
memory	B-General_Concept
modules	I-General_Concept
.	O
</s>
<s>
Variants	O
of	O
DIMMs	B-General_Concept
support	O
DDR	O
,	O
DDR2	O
,	O
DDR3	O
,	O
DDR4	O
and	O
DDR5	O
RAM	O
.	O
</s>
<s>
Common	O
types	O
of	O
DIMMs	B-General_Concept
include	O
the	O
following	O
:	O
</s>
<s>
200-pin	O
,	O
used	O
for	O
FPM/EDO	O
DRAM	O
in	O
some	O
Sun	O
workstations	B-Device
and	O
servers	O
.	O
</s>
<s>
A	O
SO-DIMM	O
(	O
pronounced	O
"	O
so-dimm	O
"	O
,	O
also	O
spelled	O
"	O
SODIMM	B-General_Concept
"	O
)	O
or	O
small	B-General_Concept
outline	I-General_Concept
DIMM	I-General_Concept
,	O
is	O
a	O
smaller	O
alternative	O
to	O
a	O
DIMM	B-General_Concept
,	O
being	O
roughly	O
half	O
the	O
physical	O
size	O
of	O
a	O
regular	O
DIMM	B-General_Concept
.	O
</s>
<s>
SO-DIMMs	O
are	O
often	O
used	O
in	O
systems	O
that	O
have	O
limited	O
space	O
,	O
which	O
include	O
laptops	B-Device
,	O
notebooks	B-Device
,	O
small-footprint	O
personal	B-Device
computers	I-Device
such	O
as	O
those	O
based	O
on	O
Nano-ITX	B-Device
motherboards	B-Device
,	O
high-end	O
upgradable	O
office	O
printers	O
,	O
and	O
networking	B-Device
hardware	I-Device
such	O
as	O
routers	B-Protocol
and	O
NAS	B-Application
devices	O
.	O
</s>
<s>
They	O
are	O
usually	O
available	O
with	O
the	O
same	O
size	O
data	O
path	O
and	O
speed	O
ratings	O
of	O
the	O
regular	O
DIMMs	B-General_Concept
though	O
normally	O
with	O
smaller	O
capacities	O
.	O
</s>
<s>
On	O
the	O
bottom	O
edge	O
of	O
168-pin	O
DIMMs	B-General_Concept
there	O
are	O
two	O
notches	O
,	O
and	O
the	O
location	O
of	O
each	O
notch	O
determines	O
a	O
particular	O
feature	O
of	O
the	O
module	O
.	O
</s>
<s>
The	O
first	O
notch	O
is	O
the	O
DRAM	O
key	O
position	O
,	O
which	O
represents	O
RFU	O
(	O
reserved	O
future	O
use	O
)	O
,	O
registered	B-General_Concept
,	O
and	O
unbuffered	B-General_Concept
DIMM	B-General_Concept
types	O
(	O
left	O
,	O
middle	O
and	O
right	O
position	O
,	O
respectively	O
)	O
.	O
</s>
<s>
The	O
second	O
notch	O
is	O
the	O
voltage	O
key	O
position	O
,	O
which	O
represents	O
5.0V	O
,	O
3.3V	O
,	O
and	O
RFU	O
DIMM	B-General_Concept
types	O
(	O
order	O
is	O
the	O
same	O
as	O
above	O
)	O
.	O
</s>
<s>
A	O
DIMM	B-General_Concept
's	O
capacity	O
and	O
other	O
operational	O
parameters	O
may	O
be	O
identified	O
with	O
serial	B-General_Concept
presence	I-General_Concept
detect	I-General_Concept
(	O
SPD	O
)	O
,	O
an	O
additional	O
chip	O
which	O
contains	O
information	O
about	O
the	O
module	O
type	O
and	O
timing	O
for	O
the	O
memory	B-General_Concept
controller	I-General_Concept
to	O
be	O
configured	O
correctly	O
.	O
</s>
<s>
The	O
SPD	O
EEPROM	B-General_Concept
connects	O
to	O
the	O
System	B-Algorithm
Management	I-Algorithm
Bus	I-Algorithm
and	O
may	O
also	O
contain	O
thermal	O
sensors	O
(	O
TS-on-DIMM	O
)	O
.	O
</s>
<s>
ECC	B-General_Concept
DIMMs	B-General_Concept
are	O
those	O
that	O
have	O
extra	O
data	O
bits	O
which	O
can	O
be	O
used	O
by	O
the	O
system	O
memory	B-General_Concept
controller	I-General_Concept
to	O
detect	O
and	O
correct	O
errors	O
.	O
</s>
<s>
There	O
are	O
numerous	O
ECC	B-General_Concept
schemes	O
,	O
but	O
perhaps	O
the	O
most	O
common	O
is	O
Single	O
Error	O
Correct	O
,	O
Double	O
Error	O
Detect	O
(	O
SECDED	O
)	O
which	O
uses	O
an	O
extra	O
byte	O
per	O
64-bit	O
word	O
.	O
</s>
<s>
ECC	B-General_Concept
modules	O
usually	O
carry	O
a	O
multiple	O
of	O
9	O
instead	O
of	O
a	O
multiple	O
of	O
8	O
chips	O
.	O
</s>
<s>
Sometimes	O
memory	B-General_Concept
modules	I-General_Concept
are	O
designed	O
with	O
two	O
or	O
more	O
independent	O
sets	O
of	O
DRAM	O
chips	O
connected	O
to	O
the	O
same	O
address	O
and	O
data	B-General_Concept
buses	I-General_Concept
;	O
each	O
such	O
set	O
is	O
called	O
a	O
rank	O
.	O
</s>
<s>
DIMMs	B-General_Concept
are	O
currently	O
being	O
commonly	O
manufactured	O
with	O
up	O
to	O
four	O
ranks	O
per	O
module	O
.	O
</s>
<s>
Consumer	O
DIMM	B-General_Concept
vendors	O
have	O
recently	O
begun	O
to	O
distinguish	O
between	O
single	O
and	O
dual	O
ranked	O
DIMMs	B-General_Concept
.	O
</s>
<s>
DIMMs	B-General_Concept
are	O
often	O
referred	O
to	O
as	O
"	O
single-sided	O
"	O
or	O
"	O
double-sided	B-General_Concept
"	O
to	O
describe	O
whether	O
the	O
DRAM	O
chips	O
are	O
located	O
on	O
one	O
or	O
both	O
sides	O
of	O
the	O
module	O
's	O
printed	O
circuit	O
board	O
(	O
PCB	O
)	O
.	O
</s>
<s>
JEDEC	O
decided	O
that	O
the	O
terms	O
"	O
dual-sided	O
"	O
,	O
"	O
double-sided	B-General_Concept
"	O
,	O
or	O
"	O
dual-banked	O
"	O
were	O
not	O
correct	O
when	O
applied	O
to	O
registered	B-General_Concept
DIMMs	I-General_Concept
(	O
RDIMMs	B-General_Concept
)	O
.	O
</s>
<s>
Most	O
DIMMs	B-General_Concept
are	O
built	O
using	O
"	O
×4	O
"	O
(	O
"	O
by	O
four	O
"	O
)	O
or	O
"	O
×8	O
"	O
(	O
"	O
by	O
eight	O
"	O
)	O
memory	O
chips	O
with	O
nine	O
chips	O
per	O
side	O
;	O
"	O
×4	O
"	O
and	O
"	O
×8	O
"	O
refer	O
to	O
the	O
data	O
width	O
of	O
the	O
DRAM	O
chips	O
in	O
bits	O
.	O
</s>
<s>
In	O
the	O
case	O
of	O
"	O
×4	O
"	O
registered	B-General_Concept
DIMMs	I-General_Concept
,	O
the	O
data	O
width	O
per	O
side	O
is	O
36	O
bits	O
;	O
therefore	O
,	O
the	O
memory	B-General_Concept
controller	I-General_Concept
(	O
which	O
requires	O
72	O
bits	O
)	O
needs	O
to	O
address	O
both	O
sides	O
at	O
the	O
same	O
time	O
to	O
read	O
or	O
write	O
the	O
data	O
it	O
needs	O
.	O
</s>
<s>
For	O
"	O
×8	O
"	O
registered	B-General_Concept
DIMMs	I-General_Concept
,	O
each	O
side	O
is	O
72	O
bits	O
wide	O
,	O
so	O
the	O
memory	B-General_Concept
controller	I-General_Concept
only	O
addresses	O
one	O
side	O
at	O
a	O
time	O
(	O
the	O
two-sided	O
module	O
is	O
dual-ranked	O
)	O
.	O
</s>
<s>
The	O
above	O
example	O
applies	O
to	O
ECC	B-General_Concept
memory	I-General_Concept
that	O
stores	O
72	O
bits	O
instead	O
of	O
the	O
more	O
common	O
64	O
.	O
</s>
<s>
For	O
various	O
technologies	O
,	O
there	O
are	O
certain	O
bus	B-General_Concept
and	O
device	O
clock	O
frequencies	O
that	O
are	O
standardized	O
;	O
there	O
is	O
also	O
a	O
decided	O
nomenclature	O
for	O
each	O
of	O
these	O
speeds	O
for	O
each	O
type	O
.	O
</s>
<s>
DIMMs	B-General_Concept
based	O
on	O
Single	O
Data	O
Rate	O
(	O
SDR	O
)	O
DRAM	O
have	O
the	O
same	O
bus	B-General_Concept
frequency	O
for	O
data	O
,	O
address	O
and	O
control	O
lines	O
.	O
</s>
<s>
DIMMs	B-General_Concept
based	O
on	O
Double	O
Data	O
Rate	O
(	O
DDR	O
)	O
DRAM	O
have	O
data	O
but	O
not	O
the	O
strobe	O
at	O
double	O
the	O
rate	O
of	O
the	O
clock	O
;	O
this	O
is	O
achieved	O
by	O
clocking	O
on	O
both	O
the	O
rising	O
and	O
falling	O
edge	O
of	O
the	O
data	O
strobes	O
.	O
</s>
<s>
Power	O
consumption	O
and	O
voltage	O
gradually	O
became	O
lower	O
with	O
each	O
generation	O
of	O
DDR-based	O
DIMMs	B-General_Concept
.	O
</s>
<s>
Several	O
form	O
factors	O
are	O
commonly	O
used	O
in	O
DIMMs	B-General_Concept
.	O
</s>
<s>
Single	O
Data	O
Rate	O
Synchronous	O
DRAM	O
(	O
SDR	O
SDRAM	O
)	O
DIMMs	B-General_Concept
were	O
primarily	O
manufactured	O
in	O
and	O
heights	O
.	O
</s>
<s>
When	O
1U	O
rackmount	O
servers	O
started	O
becoming	O
popular	O
,	O
these	O
form	O
factor	O
registered	B-General_Concept
DIMMs	I-General_Concept
had	O
to	O
plug	O
into	O
angled	O
DIMM	B-General_Concept
sockets	O
to	O
fit	O
in	O
the	O
high	O
box	O
.	O
</s>
<s>
To	O
alleviate	O
this	O
issue	O
,	O
the	O
next	O
standards	O
of	O
DDR	O
DIMMs	B-General_Concept
were	O
created	O
with	O
a	O
"	O
low	O
profile	O
"	O
(	O
LP	O
)	O
height	O
of	O
around	O
.	O
</s>
<s>
These	O
fit	O
into	O
vertical	O
DIMM	B-General_Concept
sockets	O
for	O
a	O
1U	O
platform	O
.	O
</s>
<s>
With	O
the	O
advent	O
of	O
blade	B-Architecture
servers	I-Architecture
,	O
angled	O
slots	O
have	O
once	O
again	O
become	O
common	O
in	O
order	O
to	O
accommodate	O
LP	O
form	O
factor	O
DIMMs	B-General_Concept
in	O
these	O
space-constrained	O
boxes	O
.	O
</s>
<s>
This	O
led	O
to	O
the	O
development	O
of	O
the	O
Very	O
Low	O
Profile	O
(	O
VLP	O
)	O
form	O
factor	O
DIMM	B-General_Concept
with	O
a	O
height	O
of	O
around	O
.	O
</s>
<s>
The	O
DDR3	O
JEDEC	O
standard	O
for	O
VLP	O
DIMM	B-General_Concept
height	O
is	O
around	O
.	O
</s>
<s>
Full-height	O
240-pin	O
DDR2	O
and	O
DDR3	O
DIMMs	B-General_Concept
are	O
all	O
specified	O
at	O
a	O
height	O
of	O
around	O
by	O
standards	O
set	O
by	O
JEDEC	O
.	O
</s>
<s>
These	O
form	O
factors	O
include	O
240-pin	O
DIMM	B-General_Concept
,	O
SO-DIMM	O
,	O
Mini-DIMM	O
and	O
Micro-DIMM	B-General_Concept
.	O
</s>
<s>
Full-height	O
288-pin	O
DDR4	O
DIMMs	B-General_Concept
are	O
slightly	O
taller	O
than	O
their	O
DDR3	O
counterparts	O
at	O
.	O
</s>
<s>
Similarly	O
,	O
VLP	O
DDR4	O
DIMMs	B-General_Concept
are	O
also	O
marginally	O
taller	O
than	O
their	O
DDR3	O
equivalent	O
at	O
nearly	O
.	O
</s>
<s>
As	O
of	O
Q2	O
2017	O
,	O
Asus	O
has	O
had	O
a	O
PCI-E	O
based	O
"	O
DIMM.2	O
"	O
,	O
which	O
has	O
a	O
similar	O
socket	O
to	O
DDR3	O
DIMMs	B-General_Concept
and	O
is	O
used	O
to	O
put	O
in	O
a	O
module	O
to	O
connect	O
up	O
to	O
two	O
M.2	B-Protocol
NVMe	B-Application
solid-state	O
drives	O
.	O
</s>
<s>
Regular	O
DIMMs	B-General_Concept
are	O
generally	O
133.35mm	O
in	O
length	O
,	O
SO-DIMMs	O
67.6mm	O
.	O
</s>
