<s>
Alpha	B-Device
(	O
original	O
name	O
Alpha	B-Device
AXP	I-Device
)	O
is	O
a	O
64-bit	B-Device
reduced	B-Architecture
instruction	I-Architecture
set	I-Architecture
computer	I-Architecture
(	O
RISC	B-Architecture
)	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
(	O
ISA	O
)	O
developed	O
by	O
Digital	O
Equipment	O
Corporation	O
(	O
DEC	O
)	O
.	O
</s>
<s>
Alpha	B-Device
was	O
designed	O
to	O
replace	O
32-bit	O
VAX	B-Device
complex	B-Architecture
instruction	I-Architecture
set	I-Architecture
computers	I-Architecture
(	O
CISC	O
)	O
and	O
to	O
be	O
a	O
highly	O
competitive	O
RISC	B-Architecture
processor	I-Architecture
for	O
Unix	B-Device
workstations	I-Device
and	O
similar	O
markets	O
.	O
</s>
<s>
Alpha	B-Device
is	O
implemented	O
in	O
a	O
series	O
of	O
microprocessors	B-Architecture
originally	O
developed	O
and	O
fabricated	B-Architecture
by	O
DEC	O
.	O
</s>
<s>
These	O
microprocessors	B-Architecture
are	O
most	O
prominently	O
used	O
in	O
a	O
variety	O
of	O
DEC	O
workstations	B-Device
and	O
servers	O
,	O
which	O
eventually	O
formed	O
the	O
basis	O
for	O
almost	O
all	O
of	O
their	O
mid-to-upper-scale	O
lineup	O
.	O
</s>
<s>
Several	O
third-party	O
vendors	O
also	O
produced	O
Alpha	B-Device
systems	O
,	O
including	O
PC	O
form	O
factor	O
motherboards	B-Device
.	O
</s>
<s>
Operating	B-General_Concept
systems	I-General_Concept
that	O
support	O
Alpha	B-Device
included	O
OpenVMS	B-Operating_System
(	O
formerly	O
named	O
OpenVMS	B-Operating_System
AXP	O
)	O
,	O
Tru64	B-Operating_System
UNIX	I-Operating_System
(	O
formerly	O
named	O
DEC	B-Operating_System
OSF/1	I-Operating_System
AXP	I-Operating_System
and	O
Digital	B-Operating_System
UNIX	I-Operating_System
)	O
,	O
Windows	B-Device
NT	I-Device
(	O
discontinued	O
after	O
NT	B-Device
4.0	I-Device
;	O
and	O
prerelease	O
Windows	B-Application
2000	I-Application
RC2	O
)	O
,	O
Linux	B-Application
(	O
Debian	O
,	O
SUSE	O
,	O
Gentoo	B-Application
and	O
Red	O
Hat	O
)	O
,	O
BSD	B-Operating_System
UNIX	I-Operating_System
(	O
NetBSD	B-Device
,	O
OpenBSD	B-Operating_System
and	O
FreeBSD	B-Operating_System
up	O
to	O
6.x	O
)	O
,	O
Plan	B-Operating_System
9	I-Operating_System
from	I-Operating_System
Bell	I-Operating_System
Labs	I-Operating_System
,	O
and	O
the	O
L4Ka::Pistachio	B-Operating_System
kernel	B-Operating_System
.	O
</s>
<s>
A	O
port	O
of	O
Ultrix	B-Operating_System
to	O
Alpha	B-Device
was	O
carried	O
out	O
during	O
the	O
initial	O
development	O
of	O
the	O
Alpha	B-Device
architecture	O
,	O
but	O
was	O
never	O
released	O
as	O
a	O
product	O
.	O
</s>
<s>
The	O
Alpha	B-Device
architecture	O
was	O
sold	O
,	O
along	O
with	O
most	O
parts	O
of	O
DEC	O
,	O
to	O
Compaq	O
in	O
1998	O
.	O
</s>
<s>
Compaq	O
,	O
already	O
an	O
Intel	O
x86	O
customer	O
,	O
announced	O
that	O
they	O
would	O
phase	O
out	O
Alpha	B-Device
in	O
favor	O
of	O
the	O
forthcoming	O
Hewlett-Packard/Intel	O
Itanium	O
architecture	O
,	O
and	O
sold	O
all	O
Alpha	B-Device
intellectual	O
property	O
to	O
Intel	O
,	O
in	O
2001	O
,	O
effectively	O
killing	O
the	O
product	O
.	O
</s>
<s>
Hewlett-Packard	O
purchased	O
Compaq	O
in	O
2002	O
,	O
continuing	O
development	O
of	O
the	O
existing	O
product	O
line	O
until	O
2004	O
,	O
and	O
selling	O
Alpha-based	O
systems	O
,	O
largely	O
to	O
the	O
existing	O
customer	O
base	O
,	O
until	O
April	O
2007	O
.	O
</s>
<s>
Alpha	B-Device
emerged	O
from	O
an	O
earlier	O
RISC	B-Architecture
project	O
named	O
Parallel	B-Architecture
Reduced	I-Architecture
Instruction	I-Architecture
Set	I-Architecture
Machine	I-Architecture
(	O
PRISM	B-Architecture
)	O
,	O
itself	O
the	O
product	O
of	O
several	O
earlier	O
projects	O
.	O
</s>
<s>
PRISM	B-Architecture
was	O
intended	O
to	O
be	O
a	O
flexible	O
design	O
,	O
supporting	O
Unix-like	O
applications	O
,	O
and	O
Digital	O
's	O
existing	O
VAX/VMS	B-Operating_System
software	O
,	O
after	O
minor	O
conversion	O
.	O
</s>
<s>
A	O
new	O
operating	B-General_Concept
system	I-General_Concept
named	O
MICA	B-Operating_System
would	O
support	O
both	O
ULTRIX	B-Operating_System
and	O
VAX/VMS	B-Operating_System
interfaces	O
on	O
a	O
common	O
kernel	B-Operating_System
,	O
allowing	O
software	O
for	O
both	O
platforms	O
to	O
be	O
easily	O
ported	O
to	O
the	O
PRISM	B-Architecture
architecture	O
.	O
</s>
<s>
Started	O
in	O
1985	O
,	O
the	O
PRISM	B-Architecture
design	O
was	O
continually	O
changed	O
during	O
its	O
development	O
in	O
response	O
to	O
changes	O
in	O
the	O
computer	O
market	O
,	O
leading	O
to	O
lengthy	O
delays	O
in	O
its	O
introduction	O
.	O
</s>
<s>
It	O
was	O
not	O
until	O
the	O
summer	O
of	O
1987	O
that	O
it	O
was	O
decided	O
that	O
it	O
would	O
be	O
a	O
64-bit	B-Device
design	O
,	O
among	O
the	O
earliest	O
such	O
designs	O
in	O
a	O
microprocessor	B-Architecture
format	O
.	O
</s>
<s>
In	O
October	O
1987	O
,	O
Sun	O
Microsystems	O
introduced	O
the	O
Sun-4	B-Device
,	O
their	O
first	O
workstation	B-Device
using	O
their	O
new	O
SPARC	B-Architecture
processor	O
.	O
</s>
<s>
The	O
Sun-4	B-Device
runs	O
about	O
three	O
to	O
four	O
times	O
as	O
fast	O
as	O
their	O
latest	O
Sun-3	B-Device
designs	O
using	O
the	O
Motorola	B-Device
68020	I-Device
,	O
and	O
any	O
Unix	O
offering	O
from	O
DEC	O
.	O
</s>
<s>
The	O
plans	O
changed	O
again	O
;	O
PRISM	B-Architecture
was	O
realigned	O
once	O
again	O
as	O
a	O
32-bit	O
part	O
and	O
aimed	O
directly	O
at	O
the	O
Unix	O
market	O
.	O
</s>
<s>
Having	O
watched	O
the	O
PRISM	B-Architecture
delivery	O
date	O
continue	O
to	O
slip	O
,	O
and	O
facing	O
the	O
possibility	O
of	O
more	O
delays	O
,	O
a	O
team	O
in	O
the	O
Palo	O
Alto	O
office	O
decided	O
to	O
design	O
their	O
own	O
workstation	B-Device
using	O
another	O
RISC	B-Architecture
processor	I-Architecture
.	O
</s>
<s>
After	O
due	O
diligence	O
,	O
they	O
selected	O
the	O
MIPS	B-Device
R2000	I-Device
and	O
built	O
a	O
working	O
workstation	B-Device
running	O
Ultrix	B-Operating_System
in	O
a	O
period	O
of	O
90	O
days	O
.	O
</s>
<s>
PRISM	B-Architecture
appeared	O
to	O
be	O
faster	O
than	O
the	O
R2000	B-Device
,	O
but	O
the	O
R2000	B-Device
machines	O
could	O
be	O
in	O
the	O
market	O
by	O
January	O
1989	O
,	O
a	O
year	O
earlier	O
than	O
PRISM	B-Architecture
.	O
</s>
<s>
When	O
this	O
proposal	O
was	O
accepted	O
,	O
one	O
of	O
the	O
two	O
original	O
roles	O
for	O
PRISM	B-Architecture
disappeared	O
.	O
</s>
<s>
The	O
decision	O
to	O
make	O
a	O
VMS	B-Operating_System
PRISM	B-Architecture
had	O
already	O
ended	O
by	O
this	O
point	O
,	O
so	O
there	O
was	O
no	O
remaining	O
role	O
.	O
</s>
<s>
PRISM	B-Architecture
was	O
cancelled	O
at	O
the	O
meeting	O
.	O
</s>
<s>
As	O
the	O
meeting	O
broke	O
up	O
,	O
Bob	O
Supnik	O
was	O
approached	O
by	O
Ken	O
Olsen	O
,	O
who	O
stated	O
that	O
the	O
RISC	B-Architecture
chips	O
appeared	O
to	O
be	O
a	O
future	O
threat	O
to	O
their	O
VAX	B-Device
line	O
.	O
</s>
<s>
He	O
asked	O
Supnik	O
to	O
consider	O
what	O
might	O
be	O
done	O
with	O
VAX	B-Device
to	O
keep	O
it	O
competitive	O
with	O
future	O
RISC	B-Architecture
systems	O
.	O
</s>
<s>
This	O
led	O
to	O
the	O
formation	O
of	O
the	O
"	O
RISCy	O
VAX	B-Device
"	O
team	O
.	O
</s>
<s>
One	O
was	O
a	O
cut-down	O
version	O
of	O
the	O
VAX	B-Device
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
(	O
ISA	O
)	O
that	O
would	O
run	O
on	O
a	O
RISC-like	O
system	O
and	O
leave	O
more	O
complex	O
VAX	B-Device
instructions	O
to	O
system	O
subroutines	O
.	O
</s>
<s>
Another	O
concept	O
was	O
a	O
pure	O
RISC	B-Architecture
system	O
that	O
would	O
translate	O
existing	O
VAX	B-Device
code	O
into	O
its	O
own	O
ISA	O
on-the-fly	O
and	O
store	O
it	O
in	O
a	O
CPU	B-General_Concept
cache	I-General_Concept
.	O
</s>
<s>
Finally	O
,	O
there	O
was	O
still	O
the	O
possibility	O
of	O
a	O
much	O
faster	O
CISC	B-Architecture
processor	I-Architecture
running	O
the	O
complete	O
VAX	B-Device
ISA	O
.	O
</s>
<s>
Unfortunately	O
,	O
all	O
of	O
these	O
approaches	O
introduced	O
overhead	O
and	O
would	O
not	O
be	O
competitive	O
with	O
a	O
pure-RISC	O
machine	O
running	O
native	O
RISC	B-Architecture
code	O
.	O
</s>
<s>
The	O
group	O
then	O
considered	O
hybrid	O
systems	O
that	O
combined	O
one	O
of	O
their	O
existing	O
VAX	B-Device
one-chip	O
solution	O
and	O
a	O
RISC	B-Architecture
chip	O
as	O
a	O
coprocessor	O
used	O
for	O
high-performance	O
needs	O
.	O
</s>
<s>
It	O
was	O
at	O
this	O
point	O
that	O
Nancy	O
Kronenberg	O
pointed	O
out	O
that	O
people	O
ran	O
VMS	B-Operating_System
,	O
not	O
VAX	B-Device
,	O
and	O
that	O
VMS	B-Operating_System
only	O
had	O
a	O
few	O
hardware	O
dependencies	O
based	O
on	O
its	O
modelling	O
of	O
interrupts	O
and	O
memory	O
paging	O
.	O
</s>
<s>
There	O
appeared	O
to	O
be	O
no	O
compelling	O
reason	O
why	O
VMS	B-Operating_System
could	O
not	O
be	O
ported	O
to	O
a	O
RISC	B-Architecture
chip	O
as	O
long	O
as	O
these	O
small	O
bits	O
of	O
the	O
model	O
were	O
preserved	O
.	O
</s>
<s>
Two	O
questions	O
were	O
raised	O
:	O
could	O
the	O
resulting	O
RISC	B-Architecture
design	O
also	O
be	O
a	O
performance	O
leader	O
in	O
the	O
Unix	O
market	O
,	O
and	O
should	O
the	O
machine	O
be	O
an	O
open	O
standard	O
?	O
</s>
<s>
And	O
with	O
that	O
,	O
the	O
decision	O
was	O
made	O
to	O
adopt	O
the	O
PRISM	B-Architecture
architecture	O
with	O
the	O
appropriate	O
modifications	O
.	O
</s>
<s>
This	O
became	O
the	O
"	O
EVAX	O
"	O
concept	O
,	O
a	O
follow-on	O
to	O
the	O
successful	O
CMOS	B-Device
CVAX	B-Device
implementation	O
.	O
</s>
<s>
When	O
management	O
accepted	O
the	O
findings	O
,	O
they	O
decided	O
to	O
give	O
the	O
project	O
a	O
more	O
neutral	O
name	O
,	O
removing	O
"	O
VAX	B-Device
"	O
,	O
eventually	O
settling	O
on	O
Alpha	B-Device
.	O
</s>
<s>
Soon	O
after	O
,	O
work	O
began	O
on	O
a	O
port	O
of	O
VMS	B-Operating_System
to	O
the	O
new	O
architecture	O
.	O
</s>
<s>
The	O
new	O
design	O
uses	O
most	O
of	O
the	O
basic	O
PRISM	B-Architecture
concepts	O
,	O
but	O
was	O
re-tuned	O
to	O
allow	O
VMS	B-Operating_System
and	O
VMS	B-Operating_System
programs	O
to	O
run	O
at	O
reasonable	O
speed	O
with	O
no	O
conversion	O
at	O
all	O
.	O
</s>
<s>
The	O
primary	O
Alpha	B-Device
instruction	B-General_Concept
set	I-General_Concept
architects	O
were	O
Richard	O
L	O
.	O
Sites	O
and	O
Richard	O
T	O
.	O
Witek	O
.	O
</s>
<s>
The	O
PRISM	B-Architecture
's	O
Epicode	O
was	O
developed	O
into	O
the	O
Alpha	B-Device
's	O
PALcode	B-General_Concept
,	O
providing	O
an	O
abstracted	O
interface	O
to	O
platform	O
-	O
and	O
processor	O
implementation-specific	O
features	O
.	O
</s>
<s>
The	O
main	O
contribution	O
of	O
Alpha	B-Device
to	O
the	O
microprocessor	B-Architecture
industry	O
,	O
and	O
the	O
main	O
reason	O
for	O
its	O
performance	O
,	O
is	O
not	O
so	O
much	O
the	O
architecture	O
but	O
rather	O
its	O
implementation	O
.	O
</s>
<s>
The	O
chip	O
designers	O
at	O
Digital	O
continued	O
pursuing	O
sophisticated	O
manual	O
circuit	O
design	O
in	O
order	O
to	O
deal	O
with	O
the	O
complex	O
VAX	B-Device
architecture	O
.	O
</s>
<s>
The	O
Alpha	B-Device
chips	I-Device
show	O
that	O
manual	O
circuit	O
design	O
applied	O
to	O
a	O
simpler	O
,	O
cleaner	O
architecture	O
allows	O
for	O
much	O
higher	O
operating	O
frequencies	O
than	O
those	O
that	O
are	O
possible	O
with	O
the	O
more	O
automated	O
design	O
systems	O
.	O
</s>
<s>
These	O
chips	O
caused	O
a	O
renaissance	O
of	O
custom	O
circuit	O
design	O
within	O
the	O
microprocessor	B-Architecture
design	O
community	O
.	O
</s>
<s>
Originally	O
,	O
the	O
Alpha	B-Device
processors	I-Device
were	O
designated	O
the	O
DECchip	O
21x64	O
series	O
,	O
with	O
"	O
DECchip	O
"	O
replaced	O
in	O
the	O
mid-1990s	O
with	O
"	O
Alpha	B-Device
"	O
.	O
</s>
<s>
The	O
first	O
two	O
digits	O
,	O
"	O
21	O
"	O
signifies	O
the	O
21st	O
century	O
,	O
and	O
the	O
last	O
two	O
digits	O
,	O
"	O
64	O
"	O
signifies	O
64	B-Device
bits	I-Device
.	O
</s>
<s>
The	O
Alpha	B-Device
was	O
designed	O
as	O
64-bit	B-Device
from	O
the	O
start	O
and	O
there	O
is	O
no	O
32-bit	O
version	O
.	O
</s>
<s>
The	O
middle	O
digit	O
corresponds	O
to	O
the	O
generation	O
of	O
the	O
Alpha	B-Device
architecture	O
.	O
</s>
<s>
Internally	O
,	O
Alpha	B-Device
processors	I-Device
were	O
also	O
identified	O
by	O
EV	O
numbers	O
,	O
EV	O
officially	O
standing	O
for	O
"	O
Extended	O
VAX	B-Device
"	O
but	O
having	O
an	O
alternative	O
humorous	O
meaning	O
of	O
"	O
Electric	O
Vlasic	O
"	O
,	O
giving	O
homage	O
to	O
the	O
Electric	O
Pickle	O
experiment	O
at	O
Western	O
Research	O
Lab	O
.	O
</s>
<s>
In	O
May	O
1997	O
,	O
DEC	O
sued	O
Intel	O
for	O
allegedly	O
infringing	O
on	O
its	O
Alpha	B-Device
patents	O
in	O
designing	O
the	O
original	B-General_Concept
Pentium	I-General_Concept
,	O
Pentium	B-Device
Pro	I-Device
,	O
and	O
Pentium	B-General_Concept
II	I-General_Concept
chips	O
.	O
</s>
<s>
As	O
part	O
of	O
a	O
settlement	O
,	O
much	O
of	O
DEC	O
's	O
chip	O
design	O
and	O
fabrication	B-Architecture
business	O
was	O
sold	O
to	O
Intel	O
.	O
</s>
<s>
This	O
included	O
DEC	O
's	O
StrongARM	B-Device
implementation	O
of	O
the	O
ARM	B-Architecture
computer	I-Architecture
architecture	I-Architecture
,	O
which	O
Intel	O
marketed	O
as	O
the	O
XScale	B-Application
processors	O
commonly	O
used	O
in	O
Pocket	B-Device
PCs	I-Device
.	O
</s>
<s>
The	O
core	O
of	O
Digital	O
Semiconductor	O
,	O
the	O
Alpha	B-Device
microprocessor	B-Architecture
group	O
,	O
remained	O
with	O
DEC	O
,	O
while	O
the	O
associated	O
office	O
buildings	O
went	O
to	O
Intel	O
as	O
part	O
of	O
the	O
Hudson	O
fab	O
.	O
</s>
<s>
The	O
first	O
few	O
generations	O
of	O
the	O
Alpha	B-Device
chips	I-Device
were	O
some	O
of	O
the	O
most	O
innovative	O
of	O
their	O
time	O
.	O
</s>
<s>
The	O
first	O
version	O
,	O
the	O
Alpha	B-General_Concept
21064	I-General_Concept
or	O
EV4	O
,	O
is	O
the	O
first	O
CMOS	B-Device
microprocessor	B-Architecture
whose	O
operating	O
frequency	O
rivalled	O
higher-powered	O
ECL	B-General_Concept
minicomputers	O
and	O
mainframes	O
.	O
</s>
<s>
The	O
second	O
,	O
21164	B-General_Concept
or	O
EV5	O
,	O
is	O
the	O
first	O
microprocessor	B-Architecture
to	O
place	O
a	O
large	O
secondary	B-General_Concept
cache	I-General_Concept
on-chip	O
.	O
</s>
<s>
The	O
third	O
,	O
21264	B-General_Concept
or	O
EV6	O
,	O
is	O
the	O
first	O
microprocessor	B-Architecture
to	O
combine	O
both	O
high	O
operating	O
frequency	O
and	O
the	O
more	O
complicated	O
out-of-order	B-General_Concept
execution	I-General_Concept
microarchitecture	O
.	O
</s>
<s>
The	O
21364	B-General_Concept
or	O
EV7	O
is	O
the	O
first	O
high	O
performance	O
processor	O
to	O
have	O
an	O
on-chip	O
memory	B-General_Concept
controller	I-General_Concept
.	O
</s>
<s>
The	O
unproduced	O
21464	B-General_Concept
or	O
EV8	B-General_Concept
would	O
have	O
been	O
the	O
first	O
to	O
include	O
simultaneous	B-Operating_System
multithreading	I-Operating_System
,	O
but	O
this	O
version	O
was	O
canceled	O
after	O
the	O
sale	O
of	O
DEC	O
to	O
Compaq	O
.	O
</s>
<s>
The	O
Tarantula	O
research	O
project	O
,	O
which	O
most	O
likely	O
would	O
have	O
been	O
called	O
EV9	O
,	O
would	O
have	O
been	O
the	O
first	O
Alpha	B-Device
processor	I-Device
to	O
feature	O
a	O
vector	B-Operating_System
processor	I-Operating_System
unit	O
.	O
</s>
<s>
A	O
persistent	O
report	O
attributed	O
to	O
DEC	O
insiders	O
suggests	O
the	O
choice	O
of	O
the	O
AXP	O
tag	O
for	O
the	O
processor	O
was	O
made	O
by	O
DEC	O
's	O
legal	O
department	O
,	O
which	O
was	O
still	O
smarting	O
from	O
the	O
VAX	B-Device
trademark	O
fiasco	O
.	O
</s>
<s>
Within	O
the	O
computer	O
industry	O
,	O
a	O
joke	O
got	O
started	O
that	O
the	O
acronym	O
AXP	O
meant	O
"	O
Almost	O
eXactly	O
PRISM	B-Architecture
"	O
.	O
</s>
<s>
The	O
Alpha	B-Device
architecture	O
was	O
intended	O
to	O
be	O
a	O
high-performance	O
design	O
.	O
</s>
<s>
To	O
ensure	O
this	O
,	O
any	O
architectural	O
feature	O
that	O
impeded	O
multiple	O
instruction	O
issue	O
,	O
clock	O
rate	O
or	O
multiprocessing	B-Operating_System
was	O
removed	O
.	O
</s>
<s>
As	O
a	O
result	O
,	O
the	O
Alpha	B-Device
does	O
not	O
have	O
:	O
</s>
<s>
The	O
Alpha	B-Device
does	O
not	O
have	O
condition	O
codes	O
for	O
integer	O
instructions	O
to	O
remove	O
a	O
potential	O
bottleneck	O
at	O
the	O
condition	O
status	B-General_Concept
register	I-General_Concept
.	O
</s>
<s>
Instructions	O
resulting	O
in	O
an	O
overflow	O
,	O
such	O
as	O
adding	O
two	O
numbers	O
whose	O
result	O
does	O
not	O
fit	O
in	O
64	B-Device
bits	I-Device
,	O
write	O
the	O
32	O
or	O
64	O
least	O
significant	O
bits	O
to	O
the	O
destination	O
register	B-General_Concept
.	O
</s>
<s>
If	O
the	O
test	O
was	O
true	O
,	O
the	O
value	O
one	O
is	O
written	O
to	O
the	O
least	O
significant	O
bit	O
of	O
the	O
destination	O
register	B-General_Concept
to	O
indicate	O
the	O
condition	O
.	O
</s>
<s>
+	O
DEC	B-Device
Alpha	I-Device
registers	O
63	O
.	O
</s>
<s>
The	O
architecture	O
defines	O
a	O
set	O
of	O
32	O
integer	O
registers	O
and	O
a	O
set	O
of	O
32	O
floating-point	O
registers	O
in	O
addition	O
to	O
a	O
program	B-General_Concept
counter	I-General_Concept
,	O
two	O
lock	O
registers	O
and	O
a	O
floating-point	O
control	O
register	B-General_Concept
(	O
FPCR	O
)	O
.	O
</s>
<s>
Lastly	O
,	O
registers	O
for	O
PALcode	B-General_Concept
are	O
defined	O
.	O
</s>
<s>
Digital	O
considered	O
using	O
a	O
combined	O
register	B-General_Concept
file	O
,	O
but	O
a	O
split	O
register	B-General_Concept
file	O
was	O
determined	O
to	O
be	O
better	O
,	O
as	O
it	O
enables	O
two-chip	O
implementations	O
to	O
have	O
a	O
register	B-General_Concept
file	O
located	O
on	O
each	O
chip	O
and	O
integer-only	O
implementations	O
to	O
omit	O
the	O
floating-point	O
register	B-General_Concept
file	O
containing	O
the	O
floating-point	O
registers	O
.	O
</s>
<s>
A	O
split	O
register	B-General_Concept
file	O
was	O
also	O
determined	O
to	O
be	O
more	O
suitable	O
for	O
multiple	O
instruction	O
issue	O
due	O
to	O
the	O
reduced	O
number	O
of	O
read	O
and	O
write	O
ports	O
.	O
</s>
<s>
The	O
number	O
of	O
registers	O
per	O
register	B-General_Concept
file	O
was	O
also	O
considered	O
,	O
with	O
32	O
and	O
64	O
being	O
contenders	O
.	O
</s>
<s>
The	O
program	B-General_Concept
counter	I-General_Concept
is	O
a	O
64-bit	B-Device
register	B-General_Concept
which	O
contains	O
a	O
longword-aligned	O
virtual	O
byte	B-Application
address	O
,	O
that	O
is	O
,	O
the	O
low	O
two	O
bits	O
of	O
the	O
program	B-General_Concept
counter	I-General_Concept
are	O
always	O
zero	O
.	O
</s>
<s>
The	O
PC	O
is	O
incremented	O
by	O
four	O
to	O
the	O
address	O
of	O
the	O
next	B-General_Concept
instruction	I-General_Concept
when	O
an	O
instruction	O
is	O
decoded	O
.	O
</s>
<s>
A	O
lock	O
flag	O
and	O
locked	O
physical	O
address	B-General_Concept
register	I-General_Concept
are	O
used	O
by	O
the	O
load-locked	O
and	O
store-conditional	O
instructions	O
for	O
multiprocessor	B-Operating_System
support	O
.	O
</s>
<s>
The	O
floating-point	O
control	O
register	B-General_Concept
(	O
FPCR	O
)	O
is	O
a	O
64-bit	B-Device
register	B-General_Concept
defined	O
by	O
the	O
architecture	O
intended	O
for	O
use	O
by	O
Alpha	B-Device
implementations	O
with	O
IEEE	O
754-compliant	O
floating-point	O
hardware	O
.	O
</s>
<s>
In	O
the	O
Alpha	B-Device
architecture	O
,	O
a	O
byte	B-Application
is	O
defined	O
as	O
an	O
8-bit	O
datum	B-General_Concept
(	O
octet	O
)	O
,	O
a	O
word	O
as	O
a	O
16-bit	B-Device
datum	B-General_Concept
,	O
a	O
longword	O
as	O
a	O
32-bit	O
datum	B-General_Concept
,	O
a	O
quadword	O
as	O
a	O
64-bit	B-Device
datum	B-General_Concept
,	O
and	O
an	O
octaword	O
as	O
a	O
128-bit	O
datum	B-General_Concept
.	O
</s>
<s>
The	O
Alpha	B-Device
architecture	O
originally	O
defined	O
six	O
data	O
types	O
:	O
</s>
<s>
To	O
maintain	O
a	O
level	O
of	O
compatibility	O
with	O
the	O
VAX	B-Device
,	O
the	O
32-bit	O
architecture	O
that	O
preceded	O
the	O
Alpha	B-Device
,	O
two	O
other	O
floating-point	O
data	O
types	O
are	O
included	O
:	O
</s>
<s>
VAX	B-Device
H-floating	O
point	O
(	O
quad	O
precision	O
,	O
128-bit	O
)	O
was	O
not	O
supported	O
,	O
but	O
another	O
128-bit	O
floating-point	O
option	O
,	O
X-floating	O
point	O
,	O
is	O
available	O
on	O
Alpha	B-Device
,	O
but	O
not	O
VAX.H	O
and	O
X	O
have	O
been	O
described	O
as	O
similar	O
,	O
but	O
not	O
identical	O
.	O
</s>
<s>
The	O
Alpha	B-Device
has	O
a	O
64-bit	B-Device
linear	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
with	O
no	O
memory	O
segmentation	O
.	O
</s>
<s>
Implementations	O
can	O
implement	O
a	O
smaller	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
with	O
a	O
minimum	O
size	O
of	O
43	O
bits	O
.	O
</s>
<s>
Although	O
the	O
unused	O
bits	O
were	O
not	O
implemented	O
in	O
hardware	O
such	O
as	O
TLBs	B-Architecture
,	O
the	O
architecture	O
required	O
implementations	O
to	O
check	O
whether	O
they	O
are	O
zero	O
to	O
ensure	O
software	O
compatibility	O
with	O
implementations	O
with	O
a	O
larger	O
(	O
or	O
full	O
)	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
.	O
</s>
<s>
The	O
Alpha	B-Device
ISA	O
has	O
a	O
fixed	O
instruction	O
length	O
of	O
32	O
bits	O
.	O
</s>
<s>
It	O
contains	O
a	O
6-bit	O
opcode	O
field	O
,	O
followed	O
by	O
the	O
Ra	O
field	O
,	O
which	O
specifies	O
the	O
register	B-General_Concept
containing	O
the	O
first	O
operand	O
and	O
the	O
Rb	O
field	O
,	O
specifies	O
the	O
register	B-General_Concept
containing	O
the	O
second	O
operand	O
.	O
</s>
<s>
The	O
last	O
field	O
is	O
the	O
Rc	O
field	O
,	O
which	O
specifies	O
the	O
register	B-General_Concept
which	O
the	O
result	O
of	O
a	O
computation	O
should	O
be	O
written	O
to	O
.	O
</s>
<s>
The	O
register	B-General_Concept
fields	O
are	O
all	O
5	O
bits	O
long	O
,	O
required	O
to	O
address	O
32	O
unique	O
locations	O
,	O
the	O
32	O
integer	O
registers	O
.	O
</s>
<s>
The	O
format	O
is	O
the	O
same	O
as	O
the	O
integer	O
operate	O
format	O
except	O
for	O
the	O
replacement	O
of	O
the	O
5-bit	O
Rb	O
field	O
and	O
the	O
3	O
bits	O
of	O
unused	O
space	O
with	O
an	O
8-bit	O
literal	O
field	O
which	O
is	O
zero-extended	O
to	O
a	O
64-bit	B-Device
operand	O
.	O
</s>
<s>
The	O
memory	O
format	O
is	O
used	O
mostly	O
by	O
load	B-General_Concept
and	I-General_Concept
store	I-General_Concept
instructions	I-General_Concept
.	O
</s>
<s>
It	O
has	O
a	O
6-bit	O
opcode	O
field	O
,	O
a	O
5-bit	O
Ra	O
field	O
,	O
a	O
5-bit	O
Rb	O
field	O
and	O
a	O
16-bit	B-Device
displacement	O
field	O
.	O
</s>
<s>
The	O
Ra	O
field	O
specifies	O
a	O
register	B-General_Concept
to	O
be	O
tested	O
by	O
a	O
conditional	O
branch	O
instruction	O
,	O
and	O
if	O
the	O
condition	O
is	O
met	O
,	O
the	O
program	B-General_Concept
counter	I-General_Concept
is	O
updated	O
by	O
adding	O
the	O
contents	O
of	O
the	O
displacement	O
field	O
with	O
the	O
program	B-General_Concept
counter	I-General_Concept
.	O
</s>
<s>
The	O
displacement	O
field	O
contains	O
a	O
signed	O
integer	O
and	O
if	O
the	O
value	O
of	O
the	O
integer	O
is	O
positive	O
,	O
if	O
the	O
branch	O
is	O
taken	O
then	O
the	O
program	B-General_Concept
counter	I-General_Concept
is	O
incremented	O
.	O
</s>
<s>
If	O
the	O
value	O
of	O
the	O
integer	O
is	O
negative	O
,	O
then	O
program	B-General_Concept
counter	I-General_Concept
is	O
decremented	O
if	O
the	O
branch	O
is	O
taken	O
.	O
</s>
<s>
The	O
Alpha	B-Device
Architecture	O
was	O
designed	O
with	O
a	O
large	O
range	O
as	O
part	O
of	O
the	O
architecture	O
's	O
forward-looking	O
goal	O
.	O
</s>
<s>
The	O
CALL_PAL	O
format	O
is	O
used	O
by	O
the	O
CALL_PAL	O
instruction	O
,	O
which	O
is	O
used	O
to	O
call	O
PALcode	B-General_Concept
subroutines	O
.	O
</s>
<s>
Conditional	O
branches	O
test	O
whether	O
the	O
least	O
significant	O
bit	O
of	O
a	O
register	B-General_Concept
is	O
set	O
or	O
clear	O
,	O
or	O
compare	O
a	O
register	B-General_Concept
as	O
a	O
signed	O
quadword	O
to	O
zero	O
,	O
and	O
branch	O
if	O
the	O
specified	O
condition	O
is	O
true	O
.	O
</s>
<s>
The	O
conditions	O
available	O
for	O
comparing	O
a	O
register	B-General_Concept
to	O
zero	O
are	O
equality	O
,	O
inequality	O
,	O
less	O
than	O
,	O
less	O
than	O
or	O
equal	O
to	O
,	O
greater	O
than	O
or	O
equal	O
to	O
,	O
and	O
greater	O
than	O
.	O
</s>
<s>
Unconditional	O
branches	O
update	O
the	O
program	B-General_Concept
counter	I-General_Concept
with	O
a	O
new	O
address	O
computed	O
in	O
the	O
same	O
way	O
as	O
conditional	O
branches	O
.	O
</s>
<s>
They	O
also	O
save	O
the	O
address	O
of	O
the	O
instruction	O
following	O
the	O
unconditional	O
branch	O
to	O
a	O
register	B-General_Concept
.	O
</s>
<s>
These	O
all	O
perform	O
the	O
same	O
operation	O
,	O
saving	O
the	O
address	O
of	O
the	O
instruction	O
following	O
the	O
jump	O
,	O
and	O
providing	O
the	O
program	B-General_Concept
counter	I-General_Concept
with	O
a	O
new	O
address	O
from	O
a	O
register	B-General_Concept
.	O
</s>
<s>
The	O
Multiply	O
Longword	O
and	O
Multiply	O
Quadword	O
instructions	O
write	O
the	O
least	O
significant	O
32	O
or	O
64	B-Device
bits	I-Device
of	O
a	O
64	O
-	O
or	O
128-bit	O
result	O
to	O
the	O
destination	O
register	B-General_Concept
,	O
respectively	O
.	O
</s>
<s>
The	O
concept	O
of	O
a	O
separate	O
instruction	O
for	O
multiplication	O
that	O
returns	O
the	O
most	O
significant	O
half	O
of	O
a	O
result	O
was	O
taken	O
from	O
PRISM	B-Architecture
.	O
</s>
<s>
The	O
instructions	O
that	O
operate	O
on	O
longwords	O
ignore	O
the	O
most	O
significant	O
half	O
of	O
the	O
register	B-General_Concept
and	O
the	O
32-bit	O
result	O
is	O
sign-extended	O
before	O
it	O
is	O
written	O
to	O
the	O
destination	O
register	B-General_Concept
.	O
</s>
<s>
The	O
compare	O
instructions	O
compare	O
two	O
registers	O
or	O
a	O
register	B-General_Concept
and	O
a	O
literal	O
and	O
write	O
'	O
1	O
 '	O
to	O
the	O
destination	O
register	B-General_Concept
if	O
the	O
specified	O
condition	O
is	O
true	O
or	O
'	O
0	O
 '	O
if	O
not	O
.	O
</s>
<s>
The	O
logical	O
instructions	O
consist	O
of	O
those	O
for	O
performing	O
bitwise	O
logical	O
operations	O
and	O
conditional	B-General_Concept
moves	I-General_Concept
on	O
the	O
integer	O
registers	O
.	O
</s>
<s>
The	O
bitwise	O
logical	O
instructions	O
perform	O
AND	O
,	O
NAND	O
,	O
NOR	O
,	O
OR	O
,	O
XNOR	O
,	O
and	O
XOR	B-Application
between	O
two	O
registers	O
or	O
a	O
register	B-General_Concept
and	O
literal	O
.	O
</s>
<s>
The	O
conditional	B-General_Concept
move	I-General_Concept
instructions	O
test	O
a	O
register	B-General_Concept
as	O
a	O
signed	O
quadword	O
to	O
zero	O
and	O
move	O
if	O
the	O
specified	O
condition	O
is	O
true	O
.	O
</s>
<s>
The	O
shift	O
amount	O
is	O
given	O
by	O
a	O
register	B-General_Concept
or	O
literal	O
.	O
</s>
<s>
Later	O
Alphas	B-Device
include	O
byte-word	O
extensions	O
,	O
a	O
set	O
of	O
instructions	O
to	O
manipulate	O
8-bit	O
and	O
16-bit	B-Device
data	O
types	O
.	O
</s>
<s>
These	O
instructions	O
were	O
first	O
introduced	O
in	O
the	O
21164A	O
(	O
EV56	B-General_Concept
)	O
microprocessor	B-Architecture
and	O
are	O
present	O
in	O
all	O
subsequent	O
implementations	O
.	O
</s>
<s>
BWX	O
also	O
makes	O
the	O
emulation	O
of	O
x86	O
machine	O
code	O
and	O
the	O
writing	O
of	O
device	B-Application
drivers	I-Application
easier	O
.	O
</s>
<s>
Motion	B-Device
Video	I-Device
Instructions	I-Device
(	O
MVI	O
)	O
was	O
an	O
instruction	B-General_Concept
set	I-General_Concept
extension	O
to	O
the	O
Alpha	B-Device
ISA	O
that	O
added	O
instructions	O
for	O
single	B-Device
instruction	I-Device
,	I-Device
multiple	I-Device
data	I-Device
(	O
SIMD	B-Device
)	O
operations	O
.	O
</s>
<s>
Alpha	B-Device
implementations	O
that	O
implement	O
MVI	O
,	O
in	O
chronological	O
order	O
,	O
are	O
the	O
Alpha	B-General_Concept
21164PC	I-General_Concept
(	O
PCA56	B-General_Concept
and	O
PCA57	B-General_Concept
)	O
,	O
Alpha	B-General_Concept
21264	I-General_Concept
(	O
EV6	O
)	O
and	O
Alpha	B-General_Concept
21364	I-General_Concept
(	O
EV7	O
)	O
.	O
</s>
<s>
Unlike	O
most	O
other	O
SIMD	B-Device
instruction	B-General_Concept
sets	I-General_Concept
of	O
the	O
same	O
period	O
,	O
such	O
as	O
MIPS	B-Device
 '	O
MDMX	B-General_Concept
or	O
SPARC	B-Architecture
's	O
Visual	B-General_Concept
Instruction	I-General_Concept
Set	I-General_Concept
,	O
but	O
like	O
PA-RISC	B-Device
'	O
s	O
Multimedia	B-General_Concept
Acceleration	I-General_Concept
eXtensions	I-General_Concept
(	O
MAX-1	B-General_Concept
,	O
MAX-2	B-General_Concept
)	O
,	O
MVI	O
was	O
a	O
simple	O
instruction	B-General_Concept
set	I-General_Concept
composed	O
of	O
a	O
few	O
instructions	O
that	O
operate	O
on	O
integer	O
data	O
types	O
stored	O
in	O
existing	O
integer	O
registers	O
.	O
</s>
<s>
Firstly	O
,	O
Digital	O
had	O
determined	O
that	O
the	O
Alpha	B-General_Concept
21164	I-General_Concept
was	O
already	O
capable	O
of	O
performing	O
DVD	O
decoding	O
through	O
software	O
,	O
therefore	O
not	O
requiring	O
hardware	O
provisions	O
for	O
the	O
purpose	O
,	O
but	O
was	O
inefficient	O
in	O
MPEG-2	B-Algorithm
encoding	O
.	O
</s>
<s>
Floating-point	O
extensions	O
(	O
FIX	O
)	O
are	O
an	O
extension	O
to	O
the	O
Alpha	B-Device
Architecture	O
.	O
</s>
<s>
The	O
Alpha	B-General_Concept
21264	I-General_Concept
(	O
EV6	O
)	O
is	O
the	O
first	O
microprocessor	B-Architecture
to	O
implement	O
these	O
instructions	O
.	O
</s>
<s>
They	O
were	O
first	O
implemented	O
on	O
the	O
Alpha	B-Device
21264A	O
(	O
EV67	O
)	O
.	O
</s>
<s>
At	O
the	O
time	O
of	O
its	O
announcement	O
,	O
Alpha	B-Device
was	O
heralded	O
as	O
an	O
architecture	O
for	O
the	O
next	O
25	O
years	O
.	O
</s>
<s>
While	O
this	O
was	O
not	O
to	O
be	O
,	O
Alpha	B-Device
has	O
nevertheless	O
had	O
a	O
reasonably	O
long	O
life	O
.	O
</s>
<s>
The	O
first	O
version	O
,	O
the	O
Alpha	B-General_Concept
21064	I-General_Concept
(	O
otherwise	O
named	O
the	O
EV4	O
)	O
was	O
introduced	O
in	O
November	O
1992	O
running	O
at	O
up	O
to	O
192MHz	O
;	O
a	O
slight	O
shrink	O
of	O
the	O
die	O
(	O
the	O
EV4S	O
,	O
shrunk	O
from	O
0.75µm	O
to	O
0.675µm	O
)	O
ran	O
at	O
200MHz	O
a	O
few	O
months	O
later	O
.	O
</s>
<s>
The	O
64-bit	B-Device
processor	I-Device
was	O
a	O
superpipelined	B-General_Concept
and	O
superscalar	B-General_Concept
design	O
,	O
like	O
other	O
RISC	B-Architecture
designs	O
,	O
but	O
nevertheless	O
outperformed	O
them	O
all	O
and	O
DEC	O
touted	O
it	O
as	O
the	O
world	O
's	O
fastest	O
processor	O
.	O
</s>
<s>
Careful	O
attention	O
to	O
circuit	O
design	O
,	O
a	O
hallmark	O
of	O
the	O
Hudson	O
design	O
team	O
,	O
like	O
a	O
huge	O
centralized	O
clock	O
circuitry	O
,	O
allowed	O
them	O
to	O
run	O
the	O
CPU	O
at	O
higher	O
speeds	O
,	O
even	O
though	O
the	O
microarchitecture	O
was	O
fairly	O
similar	O
to	O
other	O
RISC	B-Architecture
chips	O
.	O
</s>
<s>
In	O
comparison	O
,	O
the	O
less	O
expensive	O
Intel	B-General_Concept
Pentium	I-General_Concept
ran	O
at	O
66MHz	O
when	O
it	O
was	O
launched	O
the	O
following	O
spring	O
.	O
</s>
<s>
The	O
Alpha	B-General_Concept
21164	I-General_Concept
or	O
EV5	O
became	O
available	O
in	O
1995	O
at	O
processor	O
frequencies	O
of	O
up	O
to	O
333MHz	O
.	O
</s>
<s>
Also	O
in	O
1998	O
the	O
Alpha	B-General_Concept
21264	I-General_Concept
(	O
EV6	O
)	O
was	O
released	O
at	O
450MHz	O
,	O
eventually	O
reaching	O
(	O
in	O
2001	O
with	O
the	O
21264C/EV68CB	O
)	O
1.25GHz	O
.	O
</s>
<s>
In	O
2003	O
,	O
the	O
Alpha	B-General_Concept
21364	I-General_Concept
or	O
EV7	O
Marvel	O
was	O
launched	O
,	O
essentially	O
an	O
EV68	O
core	O
with	O
four	O
1.6	O
GB/s	O
inter-processor	O
communication	O
links	O
for	O
improved	O
multiprocessor	B-Operating_System
system	O
performance	O
,	O
running	O
at	O
1	O
or	O
1.15GHz	O
.	O
</s>
<s>
In	O
1996	O
,	O
the	O
production	O
of	O
Alpha	B-Device
chips	I-Device
was	O
licensed	O
to	O
Samsung	O
Electronics	O
Company	O
.	O
</s>
<s>
Following	O
the	O
purchase	O
of	O
Digital	O
by	O
Compaq	O
the	O
majority	O
of	O
the	O
Alpha	B-Device
products	O
were	O
placed	O
with	O
API	O
NetWorks	O
,	O
Inc	O
.	O
(	O
formerly	O
Alpha	B-Device
Processor	I-Device
Inc	O
.	O
)	O
,	O
a	O
private	O
company	O
funded	O
by	O
Samsung	O
and	O
Compaq	O
.	O
</s>
<s>
In	O
October	O
2001	O
,	O
Microway	O
became	O
the	O
exclusive	O
sales	O
and	O
service	O
provider	O
of	O
API	O
NetWorks	O
 '	O
Alpha-based	O
product	O
line	O
.	O
</s>
<s>
On	O
June	O
25	O
,	O
2001	O
,	O
Compaq	O
announced	O
that	O
Alpha	B-Device
would	O
be	O
phased	O
out	O
by	O
2004	O
in	O
favor	O
of	O
Intel	O
's	O
Itanium	B-General_Concept
,	O
canceled	O
the	O
planned	O
EV8	B-General_Concept
chip	O
,	O
and	O
sold	O
all	O
Alpha	B-Device
intellectual	O
property	O
to	O
Intel	O
.	O
</s>
<s>
Hewlett-Packard	O
merged	O
with	O
Compaq	O
in	O
2002	O
;	O
HP	O
announced	O
that	O
development	O
of	O
the	O
Alpha	B-Device
series	O
would	O
continue	O
for	O
a	O
few	O
more	O
years	O
,	O
including	O
the	O
release	O
of	O
a	O
1.3GHz	O
EV7	O
variant	O
named	O
the	O
EV7z	O
.	O
</s>
<s>
This	O
would	O
be	O
the	O
final	O
iteration	O
of	O
Alpha	B-Device
,	O
the	O
0.13µm	O
EV79	O
also	O
being	O
canceled	O
.	O
</s>
<s>
Alpha	B-Device
is	O
also	O
implemented	O
in	O
the	O
Piranha	O
,	O
a	O
research	O
prototype	O
developed	O
by	O
Compaq	O
's	O
Corporate	O
Research	O
and	O
Nonstop	O
Hardware	O
Development	O
groups	O
at	O
the	O
Western	O
Research	O
Laboratory	O
and	O
Systems	O
Research	O
Center	O
.	O
</s>
<s>
Piranha	O
is	O
a	O
multicore	B-Architecture
design	O
for	O
transaction	B-General_Concept
processing	I-General_Concept
workloads	O
that	O
contains	O
eight	O
simple	O
cores	O
.	O
</s>
<s>
Model	O
Model	O
number	O
Year	O
Frequency	O
 [ MHz ] 	O
Process	O
 [ µm ] 	O
Transistors	O
 [ millions ] 	O
Die	O
size	O
 [ mm2 ] 	O
IO	O
pins	O
Power	O
 [ W ] 	O
Voltage	O
Dcache	O
[KB]In	O
the	O
context	O
of	O
cache	O
memory	O
,	O
1	O
KB	O
=	O
1024	O
bytes	B-Application
;	O
1	O
MB	O
=	O
1024	O
KB	O
Icache	O
 [ KB ] 	O
Scache	O
Bcache	O
ISAEV4210641992100	O
–	O
2000.751.68234290303.388	O
–	O
128	O
KB	O
–	O
16	O
MB	O
EV4S210641993100	O
–	O
2000.6751.68186290273.388	O
–	O
128	O
KB	O
–	O
16	O
MB	O
EV4521064A1994200	O
–	O
3000.52.85164333.31616	O
–	O
256	O
KB	O
–	O
16	O
MB	O
LCA4210661993100	O
–	O
1660.6751.75209213.388	O
–	O
LCA4210681994660.6751.7520993.388	O
–	O
LCA4521066A1994100	O
–	O
2660.51.8161233.388	O
–	O
LCA4521068A19941000.51.81613.388	O
–	O
EV5211641995266	O
–	O
5000.59.3299296563.3/2.58896	O
KBUp	O
to	O
64	O
MBREV5621164A1996366	O
–	O
6660.359.6620931	O
–	O
553.3/2.58896	O
KBUp	O
to	O
64	O
MBR	O
,	O
BPCA5621164PC1997400	O
–	O
5330.353.514126426	O
–	O
353.3/2.5816	O
–	O
512	O
KB	O
–	O
4	O
MBR	O
,	O
B	O
,	O
MPCA5721164PC	O
600	O
–	O
6660.285.710128318	O
–	O
232.5/2.01632	O
–	O
512	O
KB	O
–	O
4	O
MBR	O
,	O
B	O
,	O
MEV6212641998450	O
–	O
6000.3515.2314389732.06464	O
–	O
2	O
–	O
8	O
MBR	O
,	O
B	O
,	O
M	O
,	O
FEV6721264A1999600	O
–	O
7500.2515.2210389	O
2.06464	O
–	O
2	O
–	O
8	O
MBR	O
,	O
B	O
,	O
M	O
,	O
F	O
,	O
CEV68AL21264B2001800	O
–	O
8330.1815.2125	O
1.76464	O
–	O
2	O
–	O
8	O
MBR	O
,	O
B	O
,	O
M	O
,	O
F	O
,	O
C	O
,	O
TEV68CB21264C20011000	O
–	O
12500.1815.2125	O
65	O
–	O
751.656464	O
–	O
2	O
–	O
8	O
MBR	O
,	O
B	O
,	O
M	O
,	O
F	O
,	O
C	O
,	O
TEV68CX21264D	O
1.656464	O
–	O
2	O
–	O
8	O
MBR	O
,	O
B	O
,	O
M	O
,	O
F	O
,	O
C	O
,	O
TEV72136420031000	O
–	O
11500.181303971251.564641.75	O
MB	O
–	O
R	O
,	O
B	O
,	O
M	O
,	O
F	O
,	O
C	O
,	O
TEV7z21364200413000.181303971251.564641.75	O
MB	O
–	O
R	O
,	O
B	O
,	O
M	O
,	O
F	O
,	O
C	O
,	O
T	O
CancelledEV78/EV7921364ASlated	O
for	O
200417000.131523001201.264641.75	O
MB	O
–	O
R	O
,	O
B	O
,	O
M	O
,	O
F	O
,	O
C	O
,	O
TEV821464Slated	O
for	O
20031200	O
–	O
20000.1252504201800	O
?	O
</s>
<s>
To	O
illustrate	O
the	O
comparative	O
performance	O
of	O
Alpha-based	O
systems	O
,	O
some	O
Standard	O
Performance	O
Evaluation	O
Corporation	O
(	O
SPEC	O
)	O
performance	O
numbers	O
(	O
SPECint95	O
,	O
SPECfp95	O
)	O
are	O
listed	O
below	O
.	O
</s>
<s>
However	O
,	O
the	O
figures	O
give	O
a	O
rough	O
impression	O
of	O
the	O
performance	O
of	O
the	O
Alpha	B-Device
architecture	O
(	O
64-bit	B-Device
)	O
,	O
compared	O
with	O
the	O
contemporary	O
HP	O
(	O
64-bit	B-Device
)	O
and	O
Intel-based	O
offerings	O
(	O
32-bit	O
)	O
.	O
</s>
<s>
Perhaps	O
the	O
most	O
obvious	O
trend	O
is	O
that	O
while	O
Intel	O
could	O
always	O
get	O
reasonably	O
close	O
to	O
Alpha	B-Device
in	O
integer	O
performance	O
,	O
in	O
floating-point	O
performance	O
the	O
difference	O
was	O
considerable	O
.	O
</s>
<s>
On	O
the	O
other	O
side	O
,	O
HP	O
(	O
PA-RISC	B-Device
)	O
is	O
also	O
reasonably	O
close	O
to	O
Alpha	B-Device
,	O
but	O
these	O
CPUs	O
are	O
running	O
at	O
significantly	O
lower	O
clock	O
rates	O
(	O
MHz	O
)	O
.	O
</s>
<s>
The	O
first	O
generation	O
of	O
DEC	O
Alpha-based	O
systems	O
comprise	O
the	O
DEC	B-Device
3000	I-Device
AXP	I-Device
series	O
workstations	B-Device
and	O
low-end	O
servers	O
,	O
DEC	B-Device
4000	I-Device
AXP	I-Device
series	O
mid-range	O
servers	O
,	O
and	O
DEC	B-Device
7000	I-Device
AXP	I-Device
and	I-Device
10000	I-Device
AXP	I-Device
series	O
high-end	O
servers	O
.	O
</s>
<s>
The	O
DEC	B-Device
3000	I-Device
AXP	I-Device
systems	O
use	O
the	O
same	O
TURBOchannel	B-Device
bus	O
as	O
the	O
prior	O
MIPS-based	O
DECstation	O
models	O
,	O
whereas	O
the	O
4000	O
is	O
based	O
on	O
Futurebus+	O
and	O
the	O
7000/10000	O
share	O
an	O
architecture	O
with	O
corresponding	O
VAX	B-Device
models	O
.	O
</s>
<s>
DEC	O
also	O
produced	O
a	O
personal	B-Device
computer	I-Device
(	O
PC	O
)	O
configuration	O
Alpha	B-Device
workstation	B-Device
with	O
an	O
Extended	B-Device
Industry	I-Device
Standard	I-Device
Architecture	I-Device
(	O
EISA	O
)	O
bus	O
,	O
the	O
DECpc	B-Device
AXP	I-Device
150	I-Device
(	O
codename	O
Jensen	O
,	O
also	O
named	O
the	O
DEC	B-Device
2000	I-Device
AXP	I-Device
)	O
.	O
</s>
<s>
This	O
is	O
the	O
first	O
Alpha	B-Device
system	O
to	O
support	O
Windows	B-Device
NT	I-Device
.	O
</s>
<s>
DEC	O
later	O
produced	O
Alpha	B-Device
versions	O
of	O
their	O
Celebris	O
XL	O
and	O
Digital	B-Device
Personal	I-Device
Workstation	I-Device
PC	O
lines	O
,	O
with	O
21164	B-General_Concept
processors	O
.	O
</s>
<s>
Digital	O
also	O
produced	O
single-board	B-Device
computers	I-Device
based	O
on	O
the	O
VMEbus	B-Architecture
for	O
embedded	O
and	O
industrial	O
use	O
.	O
</s>
<s>
Later	O
models	O
such	O
as	O
the	O
AXPvme	O
100	O
,	O
AXPvme	O
166	O
and	O
AXPvme	O
230	O
are	O
based	O
on	O
the	O
21066A	O
processor	O
,	O
while	O
the	O
Alpha	B-Device
VME	O
4/224	O
and	O
Alpha	B-Device
VME	O
4/288	O
are	O
based	O
on	O
the	O
21064A	O
processor	O
.	O
</s>
<s>
The	O
last	O
models	O
,	O
the	O
Alpha	B-Device
VME	O
5/352	O
and	O
Alpha	B-Device
VME	O
5/480	O
,	O
are	O
based	O
on	O
the	O
21164	B-General_Concept
processor	O
.	O
</s>
<s>
The	O
21066	O
chip	O
is	O
used	O
in	O
the	O
DEC	B-Device
Multia	I-Device
VX40/41/42	O
compact	O
workstation	B-Device
and	O
the	O
ALPHAbook	O
1	O
laptop	O
from	O
Tadpole	O
Technology	O
.	O
</s>
<s>
In	O
1994	O
,	O
DEC	O
launched	O
a	O
new	O
range	O
of	O
AlphaStation	B-Device
and	O
AlphaServer	B-Device
systems	O
.	O
</s>
<s>
These	O
use	O
21064	B-General_Concept
or	O
21164	B-General_Concept
processors	O
and	O
introduced	O
the	O
PCI	B-Protocol
bus	I-Protocol
,	O
VGA-compatible	O
frame	B-Algorithm
buffers	I-Algorithm
and	O
PS/2	B-Protocol
-style	O
keyboards	O
and	O
mice	O
.	O
</s>
<s>
The	O
AlphaServer	B-Device
8000	O
series	O
supersedes	O
the	O
DEC	B-Device
7000/10000	I-Device
AXP	I-Device
and	O
also	O
employs	O
XMI	O
and	O
FutureBus+	O
buses	O
.	O
</s>
<s>
The	O
AlphaStation	B-Device
XP1000	O
is	O
the	O
first	O
workstation	B-Device
based	O
on	O
the	O
21264	B-General_Concept
processor	O
.	O
</s>
<s>
Later	O
AlphaServer/Station	O
models	O
based	O
on	O
the	O
21264	B-General_Concept
are	O
categorised	O
into	O
DS	O
(	O
departmental	O
server	O
)	O
,	O
ES	O
(	O
enterprise	O
server	O
)	O
or	O
GS	O
(	O
global	O
server	O
)	O
families	O
.	O
</s>
<s>
The	O
final	O
21364	B-General_Concept
chip	O
is	O
used	O
in	O
the	O
AlphaServer	B-Device
ES47	O
,	O
ES80	O
and	O
GS1280	O
models	O
and	O
the	O
AlphaStation	B-Device
ES47	O
.	O
</s>
<s>
A	O
number	O
of	O
OEM	O
motherboards	B-Device
were	O
produced	O
by	O
DEC	O
,	O
such	O
as	O
the	O
21066	O
and	O
21068-based	O
AXPpci	O
33	O
"	O
NoName	O
"	O
,	O
which	O
was	O
part	O
of	O
a	O
major	O
push	O
into	O
the	O
OEM	O
market	O
by	O
the	O
company	O
,	O
the	O
21164-based	O
AlphaPC	O
164	O
and	O
AlphaPC	O
164LX	O
,	O
the	O
21164PC-based	O
AlphaPC	O
164SX	O
and	O
AlphaPC	O
164RX	O
and	O
the	O
21264-based	O
AlphaPC	O
264DP	O
.	O
</s>
<s>
Several	O
third	O
parties	O
such	O
as	O
Samsung	O
and	O
API	O
also	O
produced	O
OEM	O
motherboards	B-Device
such	O
as	O
the	O
API	O
UP1000	O
and	O
UP2000	O
.	O
</s>
<s>
To	O
assist	O
third	O
parties	O
in	O
developing	O
hardware	O
and	O
software	O
for	O
the	O
platform	O
,	O
DEC	O
produced	O
Evaluation	O
Boards	O
,	O
such	O
as	O
the	O
EB64+	O
and	O
EB164	O
for	O
the	O
Alpha	B-General_Concept
21064A	I-General_Concept
and	O
21164	B-General_Concept
microprocessors	B-Architecture
respectively	O
.	O
</s>
<s>
The	O
21164	B-General_Concept
and	O
21264	B-General_Concept
processors	O
were	O
used	O
by	O
NetApp	O
in	O
various	O
network-attached	B-Application
storage	I-Application
systems	O
,	O
while	O
the	O
21064	B-General_Concept
and	O
21164	B-General_Concept
processors	O
were	O
used	O
by	O
Cray	O
in	O
their	O
T3D	B-Device
and	O
T3E	B-Device
massively	B-Operating_System
parallel	I-Operating_System
supercomputers	O
.	O
</s>
<s>
The	O
fastest	O
supercomputer	O
based	O
on	O
Alpha	B-Device
processors	I-Device
was	O
the	O
ASCI	O
Q	O
at	O
Los	O
Alamos	O
National	O
Laboratory	O
.	O
</s>
<s>
The	O
machine	O
was	O
built	O
as	O
an	O
HP	O
AlphaServer	B-Device
SC45/GS	O
Cluster	O
.	O
</s>
<s>
It	O
had	O
4096	O
Alpha	B-Device
(	O
21264	B-General_Concept
EV-68	O
,	O
1.25GHz	O
)	O
CPUs	O
,	O
and	O
reached	O
an	O
Rmax	O
of	O
7.727	O
TFLOPS	O
.	O
</s>
<s>
It	O
is	O
stated	O
by	O
several	O
scientists	O
that	O
the	O
Sunway	B-Device
architecture	I-Device
which	O
powers	O
Sunway	B-Device
TaihuLight	I-Device
is	O
a	O
licensed	O
descendent	O
of	O
the	O
Alpha	B-Device
architecture	O
.	O
</s>
<s>
If	O
counted	O
as	O
an	O
Alpha	B-Device
supercomputer	O
,	O
TaihuLight	B-Device
would	O
be	O
the	O
most	O
powerful	O
Alpha	B-Device
system	O
ever	O
built	O
,	O
with	O
a	O
LINPACK	B-Application
rating	O
of	O
93	O
petaflops	O
,	O
on	O
40,960	O
cores	O
.	O
</s>
