<s>
The	O
DEC	B-Device
7000	I-Device
AXP	I-Device
and	I-Device
DEC	I-Device
10000	I-Device
AXP	I-Device
are	O
a	O
series	O
of	O
high-end	O
multiprocessor	B-Operating_System
server	B-Application
computers	I-Application
developed	O
and	O
manufactured	O
by	O
Digital	O
Equipment	O
Corporation	O
,	O
introduced	O
on	O
10	O
November	O
1992	O
(	O
although	O
the	O
DEC	B-Device
10000	I-Device
AXP	I-Device
was	O
not	O
available	O
until	O
the	O
following	O
year	O
)	O
.	O
</s>
<s>
These	O
systems	O
formed	O
part	O
of	O
the	O
first	O
generation	O
of	O
systems	O
based	O
on	O
the	O
64-bit	B-Device
Alpha	B-Device
AXP	I-Device
architecture	B-General_Concept
and	O
at	O
the	O
time	O
of	O
introduction	O
,	O
ran	O
Digital	O
's	O
OpenVMS	B-Operating_System
AXP	I-Operating_System
operating	B-General_Concept
system	I-General_Concept
,	O
with	O
DEC	B-Operating_System
OSF/1	I-Operating_System
AXP	I-Operating_System
available	O
in	O
March	O
1993	O
.	O
</s>
<s>
They	O
were	O
designed	O
in	O
parallel	O
with	O
the	O
VAX	B-Device
7000	I-Device
and	I-Device
VAX	I-Device
10000	I-Device
minicomputers	B-Architecture
,	O
and	O
are	O
identical	O
except	O
for	O
the	O
processor	O
module(s )	O
and	O
supported	O
bus	O
interfaces	O
.	O
</s>
<s>
A	O
field	O
upgrade	O
from	O
a	O
VAX	B-Device
7000/10000	I-Device
to	O
a	O
DEC	B-Device
7000/10000	I-Device
AXP	I-Device
was	O
possible	O
by	O
means	O
of	O
swapping	O
the	O
processor	O
boards	O
.	O
</s>
<s>
The	O
DEC	B-Device
7000/10000	I-Device
AXP	I-Device
were	O
intended	O
to	O
supersede	O
the	O
VAX	B-Device
6000	I-Device
series	O
,	O
and	O
themselves	O
were	O
succeeded	O
in	O
1995	O
by	O
the	O
AlphaServer	B-Device
8200	O
and	O
8400	O
(	O
TurboLaser	O
)	O
enterprise	B-Application
servers	I-Application
.	O
</s>
<s>
The	O
DEC	B-Device
7000	I-Device
AXP	I-Device
was	O
positioned	O
as	O
a	O
data	B-Operating_System
center	I-Operating_System
system	O
,	O
whereas	O
the	O
DEC	B-Device
10000	I-Device
AXP	I-Device
was	O
positioned	O
as	O
a	O
"	O
mainframe	B-Architecture
"	O
system	O
.	O
</s>
<s>
From	O
a	O
hardware	O
point	O
of	O
view	O
,	O
the	O
DEC	B-Device
10000	I-Device
AXP	I-Device
was	O
essentially	O
a	O
larger	O
configuration	O
of	O
the	O
DEC	B-Device
7000	I-Device
AXP	I-Device
.	O
</s>
<s>
Both	O
shared	O
the	O
same	O
System	O
Cabinet	O
,	O
but	O
the	O
DEC	B-Device
10000	I-Device
AXP	I-Device
was	O
configured	O
as	O
standard	O
with	O
one	O
Expander	O
Cabinet	O
housing	O
storage	O
devices	O
,	O
and	O
one	O
Battery	O
Cabinet	O
housing	O
an	O
uninterruptible	O
power	O
supply	O
.	O
</s>
<s>
These	O
were	O
optional	O
for	O
a	O
DEC	B-Device
7000	I-Device
AXP	I-Device
system	O
.	O
</s>
<s>
There	O
are	O
two	O
models	O
of	O
the	O
DEC	B-Device
7000	I-Device
AXP	I-Device
:	O
</s>
<s>
Model	O
6x0	O
,	O
code-named	O
Laser/Ruby	O
:	O
182MHz	O
DECchip	B-General_Concept
21064	I-General_Concept
(	O
EV4	O
)	O
processor(s )	O
and	O
when	O
introduced	O
,	O
the	O
base	O
price	O
was	O
US$	O
168,000	O
.	O
</s>
<s>
In	O
October	O
1993	O
,	O
it	O
was	O
available	O
with	O
200MHz	O
DECchip	B-General_Concept
21064	I-General_Concept
(	O
EV4S	O
)	O
processor(s )	O
(	O
code-named	O
Laser/Ruby	O
+	O
)	O
and	O
was	O
priced	O
from	O
US$	O
126,300	O
.	O
</s>
<s>
Model	O
7x0	O
,	O
code-named	O
Laser/Ruby45	O
:	O
275MHz	O
DECchip	B-General_Concept
21064A	I-General_Concept
(	O
EV45	O
)	O
processor(s )	O
.	O
</s>
<s>
There	O
was	O
one	O
model	O
of	O
the	O
DEC	B-Device
10000	I-Device
AXP	I-Device
:	O
</s>
<s>
Model	O
6x0	O
,	O
code-named	O
Blazer/Ruby	O
:	O
200MHz	O
DECchip	B-General_Concept
21064	I-General_Concept
(	O
EV4	O
)	O
processor(s )	O
.	O
</s>
<s>
These	O
numbers	O
specify	O
the	O
number	O
of	O
microprocessors	B-Architecture
in	O
the	O
system	O
.	O
</s>
<s>
The	O
DEC	B-Device
7000/10000	I-Device
AXP	I-Device
system	O
is	O
housed	O
in	O
the	O
system	O
cabinet	O
.	O
</s>
<s>
Up	O
to	O
none	O
,	O
one	O
or	O
two	O
expander	O
cabinets	O
are	O
supported	O
by	O
the	O
DEC	B-Device
7000/10000	I-Device
AXP	I-Device
systems	O
.	O
</s>
<s>
The	O
DEC	B-Device
10000	I-Device
AXP	I-Device
may	O
utilize	O
an	O
additional	O
type	O
of	O
cabinet	O
,	O
the	O
battery	O
cabinet	O
,	O
of	O
which	O
up	O
to	O
two	O
may	O
be	O
installed	O
against	O
the	O
sides	O
of	O
the	O
expander	O
cabinet(s )	O
,	O
with	O
the	O
first	O
to	O
the	O
left	O
and	O
the	O
second	O
to	O
the	O
right	O
.	O
</s>
<s>
The	O
DEC	B-Device
7000/10000	I-Device
AXP	I-Device
are	O
six-way	O
symmetric	B-Operating_System
multiprocessing	I-Operating_System
capable	O
systems	O
based	O
on	O
nine	O
nodes	O
that	O
are	O
interconnected	O
by	O
the	O
128-bit	O
Laser	O
System	O
Bus	O
(	O
LSB	O
)	O
.	O
</s>
<s>
The	O
inclusion	O
of	O
an	O
I/O	B-General_Concept
module	O
at	O
node	O
nine	O
is	O
mandatory	O
and	O
the	O
slot	O
for	O
the	O
module	O
was	O
physically	O
incompatible	O
with	O
other	O
modules	O
to	O
ensure	O
this	O
.	O
</s>
<s>
Slot	O
eight	O
is	O
reserved	O
for	O
the	O
I/O	B-General_Concept
module	O
.	O
</s>
<s>
The	O
Model	O
600	O
systems	O
used	O
the	O
KN7AA	O
CPU	O
module	O
,	O
which	O
contained	O
either	O
a	O
182MHz	O
DECchip	B-General_Concept
21064	I-General_Concept
(	O
EV4	O
)	O
or	O
200MHz	O
DECchip	B-General_Concept
21064	I-General_Concept
(	O
EV4S	O
)	O
microprocessor	B-Architecture
.	O
</s>
<s>
The	O
182MHz	O
version	O
was	O
only	O
used	O
in	O
DEC	B-Device
7000	I-Device
AXP	I-Device
,	O
with	O
the	O
200MHz	O
version	O
used	O
in	O
the	O
DEC	B-Device
10000	I-Device
AXP	I-Device
at	O
first	O
,	O
and	O
later	O
in	O
the	O
DEC	B-Device
7000	I-Device
AXP	I-Device
.	O
</s>
<s>
The	O
Model	O
700	O
systems	O
used	O
the	O
KN7AB	O
CPU	O
module	O
containing	O
a	O
275MHz	O
DECchip	B-General_Concept
21064A	I-General_Concept
(	O
EV45	O
)	O
.	O
</s>
<s>
Other	O
than	O
the	O
differences	O
in	O
the	O
microprocessor	B-Architecture
used	O
and	O
their	O
clock	O
frequencies	O
,	O
all	O
CPU	O
modules	O
also	O
featured	O
4	O
MB	O
of	O
B-cache	O
(	O
L2	B-General_Concept
cache	I-General_Concept
)	O
and	O
two	O
LEVI	O
gate	O
arrays	O
for	O
interfacing	O
the	O
module	O
to	O
the	O
LSB	O
bus	O
.	O
</s>
<s>
The	O
B-cache	O
size	O
of	O
4	O
MB	O
was	O
chosen	O
as	O
it	O
was	O
the	O
largest	O
size	O
achievable	O
with	O
4-bit	O
SRAMs	B-Architecture
containing	O
262,144	O
words	O
(	O
128	O
KB	O
)	O
on	O
a	O
128-bit	O
system	O
bus	O
.	O
</s>
<s>
The	O
B-cache	O
SRAMs	B-Architecture
and	O
drivers	O
reside	O
on	O
both	O
sides	O
of	O
the	O
CPU	O
module	O
.	O
</s>
<s>
The	O
LEVI	O
also	O
implement	O
the	O
Gbus	O
,	O
an	O
8-bit	O
bus	O
to	O
which	O
hardware	O
providing	O
console	B-Device
functionality	O
is	O
connected	O
to	O
.	O
</s>
<s>
Devices	O
connected	O
to	O
the	O
Gbus	O
are	O
a	O
set	O
of	O
seven	O
128	O
KB	O
(	O
8-bit	O
by	O
131,072	O
-word	O
)	O
flash	O
ROMs	O
for	O
storing	O
the	O
console	B-Device
program	O
,	O
an	O
8	O
KB	O
(	O
8-bit	O
by	O
8,192	O
-entry	O
)	O
EEPROM	B-General_Concept
for	O
storing	O
miscellaneous	O
parameter	O
and	O
log	O
information	O
,	O
three	O
devices	O
containing	O
two	O
UARTs	O
each	O
for	O
implementing	O
six	O
serial	O
lines	O
and	O
a	O
watch	O
chip	O
containing	O
a	O
time-of-year	O
clock	O
,	O
50	O
bytes	O
of	O
battery-backed-up	O
RAM	O
and	O
a	O
lithium	O
battery	O
rated	O
to	O
last	O
for	O
10	O
years	O
.	O
</s>
<s>
The	O
DEC	B-Device
7000	I-Device
AXP	I-Device
and	I-Device
DEC	I-Device
10000	I-Device
AXP	I-Device
supported	O
two	O
types	O
of	O
memory	O
module	O
,	O
the	O
MS7AA	O
and	O
the	O
MS7BB	O
,	O
which	O
differ	O
in	O
function	O
.	O
</s>
<s>
The	O
MS7AA	O
provided	O
dynamic	O
random	O
access	O
memory	O
(	O
DRAM	O
)	O
for	O
implementing	O
the	O
main	O
memory	O
,	O
whereas	O
the	O
MS7BB	O
provided	O
a	O
non-volatile	B-General_Concept
cache	B-General_Concept
for	O
accelerating	O
Network	B-Protocol
File	I-Protocol
System	I-Protocol
(	O
NFS	O
)	O
performance	O
when	O
used	O
in	O
conjunction	O
with	O
Prestoserve	O
software	O
from	O
Legato	O
Systems	O
.	O
</s>
<s>
The	O
two	O
gate	O
arrays	O
both	O
provide	O
a	O
64-bit	B-Device
data	O
path	O
,	O
which	O
when	O
combined	O
results	O
in	O
a	O
128-bit	O
data	O
path	O
that	O
matches	O
the	O
width	O
of	O
the	O
LSB	O
bus	O
.	O
</s>
<s>
MIC-A	O
also	O
serves	O
as	O
the	O
memory	B-General_Concept
controller	I-General_Concept
,	O
interfaces	O
to	O
the	O
LSB	O
bus	O
 '	O
control	O
lines	O
and	O
coordinates	O
the	O
operation	O
of	O
MIC-B	O
,	O
which	O
provides	O
the	O
module	O
with	O
SECDED	O
ECC	O
capability	O
.	O
</s>
<s>
Depending	O
on	O
the	O
module	O
's	O
capacity	O
,	O
the	O
DRAM	O
chips	O
are	O
either	O
surface	O
mounted	O
on	O
both	O
sides	O
of	O
the	O
board	O
or	O
mounted	O
on	O
SIMMs	B-General_Concept
that	O
are	O
soldered	O
onto	O
the	O
board	O
.	O
</s>
<s>
The	O
SIMMs	B-General_Concept
are	O
not	O
socketed	O
as	O
Digital	O
's	O
engineers	O
found	O
the	O
arrangement	O
to	O
be	O
unreliable	O
.	O
</s>
<s>
The	O
modules	O
and	O
the	O
memory	O
subsystem	O
of	O
the	O
DEC	O
7000/1000	O
supports	O
interleaving	B-General_Concept
.	O
</s>
<s>
Modules	O
with	O
more	O
than	O
two	O
strings	O
supports	O
two-way	O
interleaving	B-General_Concept
.	O
</s>
<s>
At	O
a	O
system	O
level	O
,	O
the	O
memory	O
subsystem	O
supports	O
a	O
maximum	O
of	O
eight-way	O
interleaving	B-General_Concept
.	O
</s>
<s>
If	O
the	O
configuration	O
results	O
in	O
more	O
levels	O
of	O
interleaving	B-General_Concept
than	O
the	O
memory	O
subsystem	O
can	O
support	O
,	O
multiple	O
memory	O
modules	O
are	O
then	O
grouped	O
into	O
larger	O
banks	O
so	O
the	O
level	O
of	O
interleaving	B-General_Concept
in	O
the	O
memory	O
subsystem	O
does	O
not	O
exceed	O
the	O
maximum	O
of	O
eight	O
ways	O
.	O
</s>
<s>
It	O
contained	O
16	O
MB	O
of	O
non-volatile	B-General_Concept
memory	I-General_Concept
used	O
to	O
cache	B-General_Concept
writes	O
to	O
the	O
file	O
system	O
.	O
</s>
<s>
The	O
non-volatile	B-General_Concept
memory	I-General_Concept
was	O
built	O
from	O
SRAM	O
,	O
and	O
in	O
event	O
of	O
power	O
failure	O
,	O
a	O
battery	O
pack	O
containing	O
14	O
batteries	O
located	O
on	O
the	O
module	O
would	O
power	O
the	O
SRAM	O
for	O
up	O
to	O
48	O
hours	O
,	O
retaining	O
the	O
data	O
.	O
</s>
<s>
The	O
I/O	B-General_Concept
port	O
module	O
provides	O
the	O
means	O
to	O
implement	O
I/O	B-General_Concept
buses	O
.	O
</s>
<s>
It	O
contains	O
four	O
parallel	B-Device
ports	I-Device
(	O
not	O
to	O
be	O
confused	O
with	O
the	O
parallel	B-Device
ports	I-Device
found	O
in	O
personal	B-Device
computers	I-Device
)	O
that	O
connect	O
to	O
adapters	O
,	O
which	O
implement	O
an	O
expansion	O
bus	O
,	O
in	O
the	O
plug-in	O
units	O
(	O
PIUs	O
)	O
housed	O
in	O
the	O
system	O
cabinet	O
or	O
expander	O
cabinet	O
via	O
cables	O
that	O
are	O
up	O
to	O
three	O
meters	O
long	O
.	O
</s>
<s>
An	O
I/O	B-General_Concept
controller	O
gate	O
array	O
on	O
the	O
module	O
interfaces	O
the	O
parallel	B-Device
ports	I-Device
to	O
the	O
LSB	O
bus	O
by	O
serving	O
as	O
a	O
bridge	O
,	O
receiving	O
a	O
transaction	O
from	O
a	O
bus	O
and	O
passing	O
it	O
on	O
to	O
another	O
.	O
</s>
<s>
The	O
I/O	B-General_Concept
controller	O
has	O
256	O
MB/s	O
of	O
bandwidth	O
that	O
the	O
four	O
parallel	B-Device
ports	I-Device
share	O
.	O
</s>
<s>
Each	O
parallel	B-Device
port	I-Device
,	O
if	O
sending	O
data	O
from	O
the	O
memory	O
to	O
the	O
I/O	B-General_Concept
subsystem	O
,	O
has	O
a	O
maximum	O
bandwidth	O
of	O
88	O
MB/s	O
.	O
</s>
<s>
If	O
the	O
parallel	B-Device
port	I-Device
is	O
sending	O
data	O
from	O
the	O
I/O	B-General_Concept
subsystem	O
to	O
the	O
memory	O
,	O
it	O
has	O
a	O
maximum	O
bandwidth	O
of	O
135	O
MB/s	O
.	O
</s>
<s>
The	O
DEC	B-Device
7000/10000	I-Device
AXP	I-Device
supported	O
PIUs	O
implementing	O
the	O
Futurebus+	B-Architecture
Profile	I-Architecture
B	I-Architecture
and	O
XMI	B-Device
,	O
PIUs	O
housing	O
SCSI	B-Architecture
and	O
DSSI	B-Architecture
drives	O
,	O
and	O
a	O
PIU	O
housing	O
batteries	O
.	O
</s>
<s>
Futurebus	B-Architecture
expansion	O
capability	O
was	O
provided	O
by	O
the	O
DWLAA	O
PIU	O
.	O
</s>
<s>
It	O
contains	O
a	O
card	O
cage	O
with	O
nine	O
usable	O
slots	O
and	O
the	O
DWLAA	O
adapter	O
,	O
which	O
implements	O
the	O
bus	O
and	O
interfaces	O
it	O
to	O
the	O
I/O	B-General_Concept
controller	O
on	O
the	O
I/O	B-General_Concept
port	O
module	O
.	O
</s>
<s>
The	O
Futurebus	B-Architecture
PIU	O
can	O
be	O
installed	O
in	O
PIU	O
quadrants	O
2	O
and	O
4	O
and	O
.	O
</s>
<s>
Futurebus	B-Architecture
capability	O
was	O
optional	O
and	O
up	O
to	O
three	O
can	O
be	O
installed	O
in	O
a	O
system	O
,	O
with	O
a	O
maximum	O
of	O
two	O
per	O
cabinet	O
.	O
</s>
<s>
Futurebus	B-Architecture
capability	O
required	O
the	O
system	O
to	O
have	O
a	O
XMI	B-Device
bus	O
.	O
</s>
<s>
XMI	B-Device
expansion	O
capability	O
was	O
provided	O
by	O
the	O
DWLMA	O
PIU	O
.	O
</s>
<s>
Two	O
slots	O
are	O
unusable	O
as	O
they	O
are	O
reserved	O
by	O
the	O
control	O
and	O
interface	O
modules	O
,	O
the	O
DWLMA	O
module	O
,	O
which	O
implements	O
the	O
XMI	B-Device
bus	O
and	O
interfaces	O
it	O
to	O
the	O
I/O	B-General_Concept
controller	O
on	O
the	O
I/O	B-General_Concept
port	O
module	O
,	O
and	O
clock	O
and	O
arbitration	O
module	O
,	O
which	O
provides	O
the	O
XMI	B-Device
clock	O
.	O
</s>
<s>
The	O
XMI	B-Device
PIU	O
requires	O
two	O
PIU	O
quadrants	O
as	O
they	O
are	O
twice	O
as	O
deep	O
as	O
the	O
other	O
PIUs	O
,	O
and	O
can	O
be	O
installed	O
only	O
in	O
the	O
bottom	O
left	O
or	O
right	O
PIU	O
quadrants	O
.	O
</s>
<s>
One	O
to	O
four	O
XMI	B-Device
PIUs	O
are	O
supported	O
in	O
a	O
system	O
,	O
with	O
a	O
maximum	O
of	O
two	O
per	O
any	O
type	O
of	O
cabinet	O
.	O
</s>
<s>
SCSI	B-Architecture
devices	O
are	O
housed	O
in	O
the	O
BA655	O
PIU	O
,	O
which	O
contains	O
two	O
modular	O
expansion	O
shelves	O
placed	O
side	O
by	O
side	O
.	O
</s>
<s>
The	O
system	O
cabinet	O
can	O
have	O
up	O
to	O
two	O
SCSI	B-Architecture
PIUs	O
and	O
expander	O
cabinet	O
up	O
to	O
four	O
.	O
</s>
<s>
DSSI	B-Architecture
devices	O
are	O
housed	O
in	O
the	O
BA654	O
PIU	O
which	O
contains	O
three	O
Storage	O
Array	O
Building	O
Blocks	O
(	O
SBBs	O
)	O
,	O
each	O
housing	O
two	O
drives	O
.	O
</s>
<s>
The	O
system	O
cabinet	O
can	O
have	O
up	O
to	O
two	O
DSSI	B-Architecture
PIUs	O
and	O
the	O
expander	O
cabinet	O
up	O
to	O
six	O
.	O
</s>
<s>
The	O
SCSI	B-Architecture
and	O
DSSI	B-Architecture
PIUs	O
did	O
not	O
contain	O
hardware	O
that	O
provides	O
the	O
SCSI	B-Architecture
or	O
DSSI	B-Architecture
bus	O
to	O
which	O
the	O
drives	O
connect	O
to	O
.	O
</s>
<s>
Instead	O
,	O
they	O
are	O
connected	O
to	O
a	O
KZMSA-AB	O
adapter	O
for	O
SCSI	B-Architecture
,	O
or	O
a	O
KFMSB	O
adapter	O
for	O
DSSI	B-Architecture
,	O
which	O
is	O
installed	O
in	O
the	O
XMI	B-Device
PIU	O
.	O
</s>
<s>
The	O
KZMSA-AB	O
adapter	O
provides	O
two	O
8-bit	O
single-ended	O
SCSI-2	O
buses	O
(	O
or	O
differential	O
8-bit	O
SCSI-2	O
buses	O
if	O
DWZZA	O
bus	O
converters	O
are	O
used	O
)	O
that	O
support	O
seven	O
drives	O
each	O
,	O
while	O
the	O
KFMSB	O
adapter	O
provides	O
two	O
DSSI	B-Architecture
buses	O
.	O
</s>
<s>
Unlike	O
the	O
Futurebus	B-Architecture
and	O
XMI	B-Device
PIUs	O
,	O
the	O
SCSI	B-Architecture
and	O
DSSI	B-Architecture
PIUs	O
can	O
be	O
installed	O
in	O
any	O
PIU	O
quadrant	O
.	O
</s>
<s>
A	O
rackmount	B-Application
model	O
of	O
the	O
DEC	B-Device
7000	I-Device
AXP	I-Device
also	O
existed	O
.	O
</s>
<s>
A	O
system	O
consisted	O
of	O
one	O
BA700-AA	O
Laser	O
System	O
Bus	O
Chassis	O
and	O
one	O
to	O
four	O
BA601-AC	O
Extended	O
Memory	O
Interconnect	O
Chassis	O
mounted	O
in	O
a	O
19-inch	B-Application
rack	I-Application
.	O
</s>
<s>
The	O
BA700-AA	O
housed	O
the	O
LSB	O
card	O
cage	O
,	O
which	O
contained	O
five	O
slots	O
for	O
one	O
to	O
three	O
CPU	O
modules	O
,	O
one	O
or	O
two	O
memory	O
modules	O
and	O
an	O
I/O	B-General_Concept
port	O
module	O
.	O
</s>
