<s>
The	O
Cyrix	B-Device
Cx486SLC	I-Device
is	O
a	O
x86	B-Operating_System
microprocessor	I-Operating_System
that	O
was	O
developed	O
by	O
Cyrix	O
.	O
</s>
<s>
It	O
was	O
one	O
of	O
Cyrix	O
's	O
first	O
CPU	B-General_Concept
offerings	O
,	O
released	O
after	O
years	O
of	O
selling	O
math	B-General_Concept
coprocessors	I-General_Concept
that	O
competed	O
with	O
Intel	O
's	O
units	O
and	O
offered	O
better	O
performance	O
at	O
a	O
comparable	O
or	O
lower	O
price	O
.	O
</s>
<s>
The	O
486SLC	B-Device
is	O
based	O
on	O
the	O
i386SX	O
bus	O
,	O
and	O
was	O
intended	O
as	O
an	O
entry-level	O
chip	O
to	O
compete	O
with	O
the	O
Intel	O
386SX	O
and	O
486SX	O
.	O
</s>
<s>
SGS-Thomson	O
and	O
Texas	O
Instruments	O
manufactured	O
the	O
486SLC	B-Device
for	O
Cyrix	O
.	O
</s>
<s>
The	O
similarly	O
named	O
IBM	B-Device
486SLC	I-Device
,	O
486SLC2	B-Device
,	O
486SLC3	O
(	O
16-bit	O
external	O
bus	O
version	O
of	O
IBM	O
486DLC	B-Device
aka	O
Blue	O
Lightning	O
)	O
and	O
IBM	B-Device
386SLC	I-Device
are	O
often	O
confused	O
with	O
the	O
Cyrix	O
chips	O
,	O
but	O
are	O
not	O
related	O
and	O
instead	O
based	O
on	O
an	O
Intel	O
CPU	B-General_Concept
core	O
.	O
</s>
<s>
Introduced	O
in	O
May	O
1992	O
,	O
like	O
the	O
later	O
and	O
more	O
famous	O
Cyrix	B-Device
Cx5x86	I-Device
it	O
was	O
a	O
hybrid	O
CPU	B-General_Concept
,	O
incorporating	O
features	O
of	O
a	O
new	O
CPU	B-General_Concept
(	O
in	O
this	O
case	O
the	O
Intel	B-General_Concept
80486	I-General_Concept
)	O
while	O
having	O
a	O
pin	O
out	O
similar	O
to	O
the	O
existing	O
386SX	O
,	O
enabling	O
existing	O
board	O
designs	O
to	O
be	O
easily	O
modified	O
for	O
the	O
new	O
chip	O
.	O
</s>
<s>
In	O
December	O
1992	O
Cyrix	O
also	O
released	O
the	O
Cyrix	O
Cx486SLC/e	O
(	O
25	O
,	O
33MHz	O
)	O
which	O
offered	O
power	O
management	O
,	O
and	O
a	O
low	O
voltage	O
laptop	B-Device
version	O
,	O
the	O
3.3v	O
Cyrix	O
Cx486SLC/e	O
-V	O
(	O
20	O
,	O
25MHz	O
)	O
.	O
</s>
<s>
In	O
December	O
1993	O
Cyrix	O
released	O
a	O
clock	O
doubled	O
version	O
(	O
25/50MHz	O
)	O
cx486SLC2	B-Device
,	O
as	O
well	O
as	O
a	O
clip-on	O
upgrade	O
for	O
386SX	O
systems	O
,	O
the	O
cx486SRx2	O
(	O
16/33	O
,	O
20/40	O
&	O
25/50MHz	O
)	O
.	O
</s>
<s>
The	O
486SLC	B-Device
can	O
be	O
described	O
as	O
a	O
386SX	O
with	O
the	O
486	B-General_Concept
instruction	O
set	O
and	O
1K	O
of	O
onboard	O
L1	O
cache	O
added	O
.	O
</s>
<s>
Like	O
the	O
386	O
and	O
486SX	O
,	O
it	O
had	O
no	O
on-board	O
math	B-General_Concept
coprocessor	I-General_Concept
,	O
but	O
unlike	O
the	O
486SX	O
,	O
it	O
could	O
make	O
use	O
of	O
an	O
Intel	O
287	O
,	O
387SX	O
or	O
compatible	O
x87	B-Application
coprocessor	B-General_Concept
.	O
</s>
<s>
The	O
486SLC	B-Device
was	O
primarily	O
used	O
in	O
very	O
inexpensive	O
low-end	O
motherboards	B-Device
and	O
PC	O
clones	O
.	O
</s>
<s>
Because	O
of	O
its	O
low	O
power	O
consumption	O
,	O
it	O
also	O
saw	O
use	O
in	O
laptops	B-Device
.	O
</s>
<s>
The	O
486SLC	B-Device
was	O
also	O
available	O
as	O
a	O
32-bit	O
version	O
based	O
on	O
the	O
i386DX	O
bus	O
,	O
see	O
486DLC	B-Device
.	O
</s>
<s>
The	O
base	O
486SLC	B-Device
,	O
which	O
had	O
speeds	O
of	O
20	O
,	O
25	O
,	O
33	O
,	O
and	O
40	O
MHz	O
with	O
1	O
KB	O
of	O
cache	O
and	O
a	O
16-bit	O
bus	O
.	O
</s>
<s>
A	O
later	O
version	O
,	O
the	O
486SLC2	B-Device
,	O
ran	O
at	O
50	O
MHz	O
.	O
</s>
<s>
ModelBus	O
SpeedFrequencyCacheVoltageNotesCx486SLC-2020	O
MHz20	O
MHz1	O
KB5V100-pin	O
QFP	B-Algorithm
package.Cx486SLC/E	O
-V2020	O
MHz20	O
MHz1	O
KB3.3VAdvanced	O
power	O
management	O
,	O
low	O
voltage	O
,	O
100-pin	O
QFP	B-Algorithm
package.Cx486SLC-25MP25	O
MHz25	O
MHz1	O
KB5V100-pin	O
QFP	B-Algorithm
package.Cx486SLC/E	O
-25-MP25	O
MHz25	O
MHz1	O
KB5VAdvanced	O
power	O
management	O
,	O
100-pin	O
QFP	B-Algorithm
package.Cx486SLC/E	O
-25-QP25	O
MHz25	O
MHz1	O
KB5VAdvanced	O
power	O
management	O
,	O
100-pin	O
QFP	B-Algorithm
package.Cx486SLC/E	O
-V25MP25	O
MHz25	O
MHz1	O
KB3.3VAdvanced	O
power	O
management	O
,	O
low	O
voltage	O
,	O
100-pin	O
QFP	B-Algorithm
package.Cx486SLC-33MP33	O
MHz33	O
MHz1	O
KB5V100-pin	O
QFP	B-Algorithm
package.Cx486SLC/E	O
-33-MP33	O
MHz33	O
MHz1	O
KB3.3VAdvanced	O
power	O
management	O
,	O
100-pin	O
QFP	B-Algorithm
package.Cx486SLC/E	O
-40-MP40	O
MHz40	O
MHz1	O
KB5VAdvanced	O
power	O
management	O
,	O
100-pin	O
QFP	B-Algorithm
package.Cx486SLC2-5025	O
MHz50	O
MHz1	O
KB5V100-pin	O
QFP	B-Algorithm
package	O
.	O
</s>
<s>
TI	O
's	O
rebranded	O
version	O
of	O
the	O
Cx486SLC	B-Device
.	O
</s>
<s>
+TI	O
486SLC/486DLC	O
Reference	O
GuideModelBus	O
SpeedFrequencyCacheVoltageNotesTI486SLC/E25	O
MHz25	O
MHz1	O
KB5VAdvanced	O
power	O
management	O
,	O
100-pin	O
QFP	B-Algorithm
package.TI486SLC/E	O
-33PAF33	O
MHz33	O
MHz1	O
KB5VAdvanced	O
power	O
management	O
,	O
100-pin	O
QFP	B-Algorithm
package.TI486SLC/E	O
-V25	O
MHz25	O
MHz1	O
KB3VAdvanced	O
power	O
management	O
,	O
low	O
voltage	O
,	O
100-pin	O
QFP	B-Algorithm
package	O
.	O
</s>
<s>
The	O
TI486SXLC/SXLC	O
was	O
Texas	O
Instrument	O
's	O
version	O
of	O
the	O
Cx486SLC	B-Device
.	O
</s>
<s>
+TI	O
486SXLC/486SXL	O
Reference	O
GuideModelBus	O
SpeedFrequencyCacheVoltageNotesTI486SXLC-V25-PJF25	O
MHz25	O
MHz8	O
KB3.3VLow	O
power	O
version	O
of	O
SXLC	O
,	O
100-pin	O
QFP	B-Algorithm
for	O
compatibility	O
with	O
486SLC.TI486SXLC-040-PJF20-40	O
MHz†40	O
MHz8	O
KB5V100-pin	O
QFP	B-Algorithm
for	O
compatibility	O
with	O
486SLC.TI486SXLC2-050-PJF25	O
MHz50	O
MHz8	O
KB5V100-pin	O
QFP	B-Algorithm
for	O
compatibility	O
with	O
486SLC.	O
†	O
-	O
Can	O
operate	O
at	O
nonclock-doubled	O
40	O
MHz	O
or	O
clock-doubled	O
20/40	O
MHz	O
.	O
</s>
