<s>
Cyclops64	B-Device
(	O
formerly	O
known	O
as	O
Blue	B-Device
Gene/C	I-Device
)	O
is	O
a	O
cellular	B-Operating_System
architecture	I-Operating_System
in	O
development	O
by	O
IBM	O
.	O
</s>
<s>
The	O
Cyclops64	B-Device
project	O
aims	O
to	O
create	O
the	O
first	O
"	O
supercomputer	B-Architecture
on	O
a	O
chip	O
"	O
.	O
</s>
<s>
Cyclops64	B-Device
is	O
part	O
of	O
the	O
Blue	B-Operating_System
Gene	I-Operating_System
effort	O
,	O
to	O
produce	O
the	O
next	O
several	O
generations	O
of	O
supercomputers	B-Architecture
.	O
</s>
<s>
The	O
projects	O
were	O
started	O
in	O
response	O
to	O
the	O
announced	O
construction	O
of	O
the	O
Earth	B-Device
Simulator	I-Device
.	O
</s>
<s>
Cyclops64	B-Device
is	O
a	O
cooperative	O
project	O
between	O
the	O
United	O
States	O
Department	O
of	O
Energy	O
(	O
which	O
is	O
partially	O
funding	O
the	O
project	O
)	O
,	O
the	O
U.S.	O
Department	O
of	O
Defense	O
,	O
industry	O
(	O
IBM	O
in	O
particular	O
)	O
,	O
and	O
academia	O
.	O
</s>
<s>
The	O
architecture	O
was	O
conceived	O
by	O
Seymour	B-Device
Cray	I-Device
Award	I-Device
winner	O
Monty	O
Denneau	O
,	O
who	O
is	O
currently	O
leading	O
the	O
project	O
.	O
</s>
<s>
Each	O
64-bit	B-Device
Cyclops64	B-Device
chip	O
(	O
processor	O
)	O
will	O
run	O
at	O
500	O
megahertz	O
and	O
contain	O
80	O
processors	O
.	O
</s>
<s>
Each	O
processor	O
will	O
have	O
two	O
thread	O
units	O
and	O
a	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
.	O
</s>
<s>
A	O
thread	O
unit	O
is	O
an	O
in-order	O
64-bit	B-Device
RISC	B-Architecture
core	O
with	O
32	O
kB	O
scratch	O
pad	O
memory	O
,	O
using	O
a	O
60-instruction	O
subset	O
of	O
the	O
Power	B-Architecture
ISA	I-Architecture
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
They	O
will	O
communicate	O
with	O
each	O
other	O
via	O
global	O
interleaved	O
memory	O
(	O
memory	O
that	O
can	O
be	O
written	O
to	O
and	O
read	O
by	O
all	O
threads	O
)	O
in	O
the	O
SRAM	B-Architecture
.	O
</s>
<s>
The	O
theoretical	O
peak	O
performance	O
of	O
a	O
Cyclops64	B-Device
chip	O
is	O
80	O
gigaflops	O
(	O
this	O
assumes	O
a	O
continuous	O
stream	O
of	O
multiply	B-Algorithm
–	I-Algorithm
accumulate	I-Algorithm
instructions	O
,	O
each	O
of	O
which	O
are	O
counted	O
as	O
two	O
floating-point	O
operations	O
)	O
.	O
</s>
<s>
Cyclops64	B-Device
exposes	O
much	O
of	O
the	O
underlying	O
hardware	O
to	O
the	O
programmer	O
,	O
allowing	O
the	O
programmer	O
to	O
write	O
very	O
high	O
performance	O
,	O
finely	O
tuned	O
software	O
.	O
</s>
<s>
One	O
negative	O
consequence	O
is	O
that	O
efficiently	O
programming	O
Cyclops64	B-Device
is	O
difficult	O
.	O
</s>
<s>
The	O
system	O
is	O
expected	O
to	O
support	O
TiNy-Threads	O
(	O
a	O
threading	O
library	O
developed	O
at	O
the	O
University	O
of	O
Delaware	O
)	O
and	O
POSIX	B-Operating_System
Threads	I-Operating_System
.	O
</s>
