<s>
The	O
Cray	B-Device
SV1	I-Device
is	O
a	O
vector	B-Operating_System
processor	I-Operating_System
supercomputer	B-Architecture
from	O
the	O
Cray	O
Research	O
division	O
of	O
Silicon	O
Graphics	O
introduced	O
in	O
1998	O
.	O
</s>
<s>
The	O
SV1	O
has	O
since	O
been	O
succeeded	O
by	O
the	O
Cray	B-Device
X1	I-Device
and	O
X1E	O
vector	O
supercomputers	B-Architecture
.	O
</s>
<s>
Like	O
its	O
predecessor	O
,	O
the	O
Cray	B-Device
J90	I-Device
,	O
the	O
SV1	O
used	O
CMOS	B-Device
processors	O
,	O
which	O
lowered	O
the	O
cost	O
of	O
the	O
system	O
,	O
and	O
allowed	O
the	O
computer	O
to	O
be	O
air-cooled	O
.	O
</s>
<s>
The	O
SV1	O
was	O
backwards	O
compatible	O
with	O
J90	O
and	O
Y-MP	B-Device
software	O
,	O
and	O
ran	O
the	O
same	O
UNIX-derived	O
UNICOS	B-Operating_System
operating	B-General_Concept
system	I-General_Concept
.	O
</s>
<s>
The	O
SV1	O
used	O
Cray	O
floating	B-Algorithm
point	I-Algorithm
representation	I-Algorithm
,	O
not	O
the	O
IEEE	O
754	O
floating	B-Algorithm
point	I-Algorithm
format	I-Algorithm
used	O
on	O
the	O
Cray	B-Device
T3E	I-Device
and	O
some	O
Cray	B-Device
T90	I-Device
systems	O
.	O
</s>
<s>
Multiple	O
SV1	O
cabinets	O
could	O
be	O
clustered	O
together	O
using	O
the	O
GigaRing	O
I/O	O
channel	O
,	O
which	O
also	O
provided	O
connection	O
to	O
HIPPI	B-Architecture
,	O
FDDI	B-Protocol
,	O
ATM	O
,	O
Ethernet	O
and	O
SCSI	B-Architecture
devices	O
for	O
network	O
,	O
disk	O
,	O
and	O
tape	O
services	O
.	O
</s>
