<s>
A	O
coprocessor	B-General_Concept
is	O
a	O
computer	O
processor	O
used	O
to	O
supplement	O
the	O
functions	O
of	O
the	O
primary	O
processor	O
(	O
the	O
CPU	B-General_Concept
)	O
.	O
</s>
<s>
Operations	O
performed	O
by	O
the	O
coprocessor	B-General_Concept
may	O
be	O
floating-point	B-Algorithm
arithmetic	I-Algorithm
,	O
graphics	O
,	O
signal	O
processing	O
,	O
string	B-Language
processing	I-Language
,	O
cryptography	B-General_Concept
or	O
I/O	O
interfacing	O
with	O
peripheral	O
devices	O
.	O
</s>
<s>
By	O
offloading	O
processor-intensive	O
tasks	O
from	O
the	O
main	O
processor	O
,	O
coprocessors	B-General_Concept
can	O
accelerate	O
system	O
performance	O
.	O
</s>
<s>
Coprocessors	B-General_Concept
allow	O
a	O
line	O
of	O
computers	O
to	O
be	O
customized	O
,	O
so	O
that	O
customers	O
who	O
do	O
not	O
need	O
the	O
extra	O
performance	O
do	O
not	O
need	O
to	O
pay	O
for	O
it	O
.	O
</s>
<s>
Coprocessors	B-General_Concept
vary	O
in	O
their	O
degree	O
of	O
autonomy	O
.	O
</s>
<s>
Some	O
(	O
such	O
as	O
FPUs	O
)	O
rely	O
on	O
direct	O
control	O
via	O
coprocessor	B-General_Concept
instructions	O
,	O
embedded	O
in	O
the	O
CPU	B-General_Concept
's	O
instruction	B-Operating_System
stream	I-Operating_System
.	O
</s>
<s>
Others	O
are	O
independent	O
processors	O
in	O
their	O
own	O
right	O
,	O
capable	O
of	O
working	O
asynchronously	O
;	O
they	O
are	O
still	O
not	O
optimized	O
for	O
general-purpose	B-Application
code	I-Application
,	O
or	O
they	O
are	O
incapable	O
of	O
it	O
due	O
to	O
a	O
limited	O
instruction	B-General_Concept
set	I-General_Concept
focused	O
on	O
accelerating	B-General_Concept
specific	I-General_Concept
tasks	I-General_Concept
.	O
</s>
<s>
It	O
is	O
common	O
for	O
these	O
to	O
be	O
driven	O
by	O
direct	B-General_Concept
memory	I-General_Concept
access	I-General_Concept
(	O
DMA	O
)	O
,	O
with	O
the	O
host	O
processor	O
(	O
a	O
CPU	B-General_Concept
)	O
building	O
a	O
command	O
list	O
.	O
</s>
<s>
The	O
PlayStation	B-Device
2	I-Device
's	O
Emotion	B-Architecture
Engine	I-Architecture
contained	O
an	O
unusual	O
DSP-like	O
SIMD	B-Device
vector	B-Operating_System
unit	I-Operating_System
capable	O
of	O
both	O
modes	O
of	O
operation	O
.	O
</s>
<s>
To	O
make	O
the	O
best	O
use	O
of	O
mainframe	B-Architecture
computer	I-Architecture
processor	O
time	O
,	O
input/output	O
tasks	O
were	O
delegated	O
to	O
separate	O
systems	O
called	O
Channel	B-Device
I/O	I-Device
.	O
</s>
<s>
The	O
mainframe	B-Architecture
would	O
not	O
require	O
any	O
I/O	O
processing	O
at	O
all	O
,	O
instead	O
would	O
just	O
set	O
parameters	O
for	O
an	O
input	O
or	O
output	O
operation	O
and	O
then	O
signal	O
the	O
channel	O
processor	O
to	O
carry	O
out	O
the	O
whole	O
of	O
the	O
operation	O
.	O
</s>
<s>
Coprocessors	B-General_Concept
for	O
floating-point	B-Algorithm
arithmetic	I-Algorithm
first	O
appeared	O
in	O
desktop	B-Device
computers	I-Device
in	O
the	O
1970s	O
and	O
became	O
common	O
throughout	O
the	O
1980s	O
and	O
into	O
the	O
early	O
1990s	O
.	O
</s>
<s>
Early	O
8-bit	O
and	O
16-bit	O
processors	O
used	O
software	O
to	O
carry	O
out	O
floating-point	B-Algorithm
arithmetic	I-Algorithm
operations	O
.	O
</s>
<s>
Where	O
a	O
coprocessor	B-General_Concept
was	O
supported	O
,	O
floating-point	B-Algorithm
calculations	O
could	O
be	O
carried	O
out	O
many	O
times	O
faster	O
.	O
</s>
<s>
Math	B-General_Concept
coprocessors	I-General_Concept
were	O
popular	O
purchases	O
for	O
users	O
of	O
computer-aided	B-Application
design	I-Application
(	O
CAD	B-Application
)	O
software	O
and	O
scientific	O
and	O
engineering	O
calculations	O
.	O
</s>
<s>
Some	O
floating-point	B-General_Concept
units	I-General_Concept
,	O
such	O
as	O
the	O
AMD	O
9511	O
,	O
Intel	B-General_Concept
8231/8232	I-General_Concept
and	O
Weitek	O
FPUs	O
were	O
treated	O
as	O
peripheral	O
devices	O
,	O
while	O
others	O
such	O
as	O
the	O
Intel	B-Device
8087	I-Device
,	O
Motorola	B-General_Concept
68881	I-General_Concept
and	O
National	O
32081	O
were	O
more	O
closely	O
integrated	O
with	O
the	O
CPU	B-General_Concept
.	O
</s>
<s>
Another	O
form	O
of	O
coprocessor	B-General_Concept
was	O
a	O
video	O
display	O
coprocessor	B-General_Concept
,	O
as	O
used	O
in	O
the	O
Atari	B-Device
8-bit	I-Device
family	I-Device
,	O
TI-99/4A	B-Device
,	O
and	O
MSX	B-Operating_System
home	O
computers	O
,	O
which	O
were	O
called	O
"	O
Video	B-General_Concept
Display	I-General_Concept
Controllers	I-General_Concept
"	O
.	O
</s>
<s>
The	O
Amiga	B-Device
custom	B-Device
chipset	I-Device
includes	O
such	O
a	O
unit	O
known	O
as	O
the	O
Copper	O
,	O
as	O
well	O
as	O
a	O
blitter	B-General_Concept
for	O
accelerating	O
bitmap	O
manipulation	O
in	O
memory	O
.	O
</s>
<s>
As	O
microprocessors	B-Architecture
developed	O
,	O
the	O
cost	O
of	O
integrating	O
the	O
floating	B-Algorithm
point	I-Algorithm
arithmetic	I-Algorithm
functions	O
into	O
the	O
processor	O
declined	O
.	O
</s>
<s>
High	O
processor	O
speeds	O
also	O
made	O
a	O
closely	O
integrated	O
coprocessor	B-General_Concept
difficult	O
to	O
implement	O
.	O
</s>
<s>
Separately	O
packaged	O
mathematics	O
coprocessors	B-General_Concept
are	O
now	O
uncommon	O
in	O
desktop	B-Device
computers	I-Device
.	O
</s>
<s>
The	O
demand	O
for	O
a	O
dedicated	B-Architecture
graphics	I-Architecture
coprocessor	I-Architecture
has	O
grown	O
,	O
however	O
,	O
particularly	O
due	O
to	O
the	O
increasing	O
demand	O
for	O
realistic	O
3D	O
graphics	O
in	O
computer	O
games	O
.	O
</s>
<s>
The	O
original	O
IBM	B-Device
PC	I-Device
included	O
a	O
socket	O
for	O
the	O
Intel	B-Device
8087	I-Device
floating-point	B-Algorithm
coprocessor	B-General_Concept
(	O
aka	O
FPU	B-General_Concept
)	O
which	O
was	O
a	O
popular	O
option	O
for	O
people	O
using	O
the	O
PC	O
for	O
computer-aided	B-Application
design	I-Application
or	O
mathematics-intensive	O
calculations	O
.	O
</s>
<s>
In	O
that	O
architecture	O
,	O
the	O
coprocessor	B-General_Concept
speeds	O
up	O
floating-point	B-Algorithm
arithmetic	I-Algorithm
on	O
the	O
order	O
of	O
fiftyfold	O
.	O
</s>
<s>
Users	O
that	O
only	O
used	O
the	O
PC	O
for	O
word	O
processing	O
,	O
for	O
example	O
,	O
saved	O
the	O
high	O
cost	O
of	O
the	O
coprocessor	B-General_Concept
,	O
which	O
would	O
not	O
have	O
accelerated	O
performance	O
of	O
text	O
manipulation	O
operations	O
.	O
</s>
<s>
The	O
8087	B-Device
was	O
tightly	O
integrated	O
with	O
the	O
8086/8088	O
and	O
responded	O
to	O
floating-point	B-Algorithm
machine	B-Language
code	I-Language
operation	O
codes	O
inserted	O
in	O
the	O
8088	O
instruction	B-Operating_System
stream	I-Operating_System
.	O
</s>
<s>
An	O
8088	O
processor	O
without	O
an	O
8087	B-Device
could	O
not	O
interpret	O
these	O
instructions	O
,	O
requiring	O
separate	O
versions	O
of	O
programs	O
for	O
FPU	B-General_Concept
and	O
non-FPU	O
systems	O
,	O
or	O
at	O
least	O
a	O
test	O
at	O
run	O
time	O
to	O
detect	O
the	O
FPU	B-General_Concept
and	O
select	O
appropriate	O
mathematical	O
library	O
functions	O
.	O
</s>
<s>
Another	O
coprocessor	B-General_Concept
for	O
the	O
8086/8088	O
central	O
processor	O
was	O
the	O
8089	B-Device
input/output	O
coprocessor	B-General_Concept
.	O
</s>
<s>
It	O
used	O
the	O
same	O
programming	O
technique	O
as	O
8087	B-Device
for	O
input/output	O
operations	O
,	O
such	O
as	O
transfer	O
of	O
data	O
from	O
memory	O
to	O
a	O
peripheral	O
device	O
,	O
and	O
so	O
reducing	O
the	O
load	O
on	O
the	O
CPU	B-General_Concept
.	O
</s>
<s>
But	O
IBM	O
did	O
n't	O
use	O
it	O
in	O
IBM	B-Device
PC	I-Device
design	O
and	O
Intel	O
stopped	O
development	O
of	O
this	O
type	O
of	O
coprocessor	B-General_Concept
.	O
</s>
<s>
The	O
Intel	B-General_Concept
80386	I-General_Concept
microprocessor	B-Architecture
used	O
an	O
optional	O
"	O
math	O
"	O
coprocessor	B-General_Concept
(	O
the	O
80387	O
)	O
to	O
perform	O
floating	B-Algorithm
point	I-Algorithm
operations	O
directly	O
in	O
hardware	B-Architecture
.	O
</s>
<s>
The	O
Intel	O
80486DX	O
processor	O
included	O
floating-point	B-Algorithm
hardware	B-Architecture
on	O
the	O
chip	O
.	O
</s>
<s>
Intel	O
released	O
a	O
cost-reduced	O
processor	O
,	O
the	O
80486SX	O
,	O
that	O
had	O
no	O
floating	B-Algorithm
point	I-Algorithm
hardware	B-Architecture
,	O
and	O
also	O
sold	O
an	O
80487SX	O
coprocessor	B-General_Concept
that	O
essentially	O
disabled	O
the	O
main	O
processor	O
when	O
installed	O
,	O
since	O
the	O
80487SX	O
was	O
a	O
complete	O
80486DX	O
with	O
a	O
different	O
set	O
of	O
pin	O
connections	O
.	O
</s>
<s>
Intel	O
processors	O
later	O
than	O
the	O
80486	O
integrated	O
floating-point	B-Algorithm
hardware	B-Architecture
on	O
the	O
main	O
processor	O
chip	O
;	O
the	O
advances	O
in	O
integration	O
eliminated	O
the	O
cost	O
advantage	O
of	O
selling	O
the	O
floating	B-General_Concept
point	I-General_Concept
processor	I-General_Concept
as	O
an	O
optional	O
element	O
.	O
</s>
<s>
These	O
on-chip	O
floating	B-General_Concept
point	I-General_Concept
processors	I-General_Concept
are	O
still	O
referred	O
to	O
as	O
coprocessors	B-General_Concept
because	O
they	O
operate	O
in	O
parallel	O
with	O
the	O
main	O
CPU	B-General_Concept
.	O
</s>
<s>
During	O
the	O
era	O
of	O
8	O
-	O
and	O
16-bit	O
desktop	B-Device
computers	I-Device
another	O
common	O
source	O
of	O
floating-point	B-Algorithm
coprocessors	B-General_Concept
was	O
Weitek	O
.	O
</s>
<s>
These	O
coprocessors	B-General_Concept
had	O
a	O
different	O
instruction	B-General_Concept
set	I-General_Concept
from	O
the	O
Intel	O
coprocessors	B-General_Concept
,	O
and	O
used	O
a	O
different	O
socket	O
,	O
which	O
not	O
all	O
motherboards	O
supported	O
.	O
</s>
<s>
The	O
Motorola	B-Device
68000	I-Device
family	O
had	O
the	O
68881/68882	B-General_Concept
coprocessors	B-General_Concept
which	O
provided	O
similar	O
floating-point	B-Algorithm
speed	O
acceleration	O
as	O
for	O
the	O
Intel	O
processors	O
.	O
</s>
<s>
Computers	O
using	O
the	O
68000	B-Device
family	O
but	O
not	O
equipped	O
with	O
the	O
hardware	B-Architecture
floating	B-General_Concept
point	I-General_Concept
processor	I-General_Concept
could	O
trap	O
and	O
emulate	O
the	O
floating-point	B-Algorithm
instructions	O
in	O
software	O
,	O
which	O
,	O
although	O
slower	O
,	O
allowed	O
one	O
binary	O
version	O
of	O
the	O
program	O
to	O
be	O
distributed	O
for	O
both	O
cases	O
.	O
</s>
<s>
The	O
68451	O
memory-management	O
coprocessor	B-General_Concept
was	O
designed	O
to	O
work	O
with	O
the	O
68020	O
processor	O
.	O
</s>
<s>
,	O
dedicated	O
Graphics	B-Architecture
Processing	I-Architecture
Units	I-Architecture
(	O
GPUs	B-Architecture
)	O
in	O
the	O
form	O
of	O
graphics	B-Device
cards	I-Device
are	O
commonplace	O
.	O
</s>
<s>
Certain	O
models	O
of	O
sound	B-Device
cards	I-Device
have	O
been	O
fitted	O
with	O
dedicated	O
processors	O
providing	O
digital	O
multichannel	O
mixing	O
and	O
real-time	O
DSP	B-Architecture
effects	O
as	O
early	O
as	O
1990	O
to	O
1994	O
(	O
the	O
Gravis	B-Application
Ultrasound	I-Application
and	O
Sound	B-Device
Blaster	I-Device
AWE32	I-Device
being	O
typical	O
examples	O
)	O
,	O
while	O
the	O
Sound	B-Device
Blaster	I-Device
Audigy	I-Device
and	O
the	O
Sound	B-Device
Blaster	I-Device
X-Fi	I-Device
are	O
more	O
recent	O
examples	O
.	O
</s>
<s>
In	O
2006	O
,	O
AGEIA	O
announced	O
an	O
add-in	O
card	O
for	O
computers	O
that	O
it	O
called	O
the	O
PhysX	B-Operating_System
PPU	O
.	O
</s>
<s>
PhysX	B-Operating_System
was	O
designed	O
to	O
perform	O
complex	O
physics	O
computations	O
so	O
that	O
the	O
CPU	B-General_Concept
and	O
GPU	B-Architecture
do	O
not	O
have	O
to	O
perform	O
these	O
time-consuming	O
calculations	O
.	O
</s>
<s>
In	O
2008	O
,	O
Nvidia	O
purchased	O
the	O
company	O
and	O
phased	O
out	O
the	O
PhysX	B-Operating_System
card	O
line	O
;	O
the	O
functionality	O
was	O
added	O
through	O
software	O
allowing	O
their	O
GPUs	B-Architecture
to	O
render	O
PhysX	B-Operating_System
on	O
cores	O
normally	O
used	O
for	O
graphics	O
processing	O
,	O
using	O
their	O
Nvidia	B-Operating_System
PhysX	I-Operating_System
engine	O
software	O
.	O
</s>
<s>
In	O
2006	O
,	O
BigFoot	O
Systems	O
unveiled	O
a	O
PCI	O
add-in	O
card	O
they	O
christened	O
the	O
KillerNIC	O
which	O
ran	O
its	O
own	O
special	O
Linux	O
kernel	B-Operating_System
on	O
a	O
FreeScale	O
PowerQUICC	B-General_Concept
running	O
at	O
400MHz	O
,	O
calling	O
the	O
FreeScale	O
chip	O
a	O
Network	B-General_Concept
Processing	I-General_Concept
Unit	I-General_Concept
or	O
NPU	O
.	O
</s>
<s>
The	O
SpursEngine	B-General_Concept
is	O
a	O
media-oriented	O
add-in	O
card	O
with	O
a	O
coprocessor	B-General_Concept
based	O
on	O
the	O
Cell	B-General_Concept
microarchitecture	O
.	O
</s>
<s>
The	O
SPUs	O
are	O
themselves	O
vector	O
coprocessors	B-General_Concept
.	O
</s>
<s>
In	O
2008	O
,	O
Khronos	B-Library
Group	I-Library
released	O
the	O
OpenCL	B-Application
with	O
the	O
aim	O
to	O
support	O
general-purpose	O
CPUs	O
,	O
ATI/AMD	O
and	O
Nvidia	O
GPUs	B-Architecture
(	O
and	O
other	O
accelerators	O
)	O
with	O
a	O
single	O
common	O
language	O
for	O
compute	B-Operating_System
kernels	I-Operating_System
.	O
</s>
<s>
In	O
2010s	O
,	O
some	O
mobile	O
computation	O
devices	O
had	O
implemented	O
the	O
sensor	B-General_Concept
hub	I-General_Concept
as	O
a	O
coprocessor	B-General_Concept
.	O
</s>
<s>
Examples	O
of	O
coprocessors	B-General_Concept
used	O
for	O
handling	O
sensor	O
integration	O
in	O
mobile	O
devices	O
include	O
the	O
Apple	B-Device
M7	I-Device
and	O
M8	O
motion	B-Device
coprocessors	I-Device
,	O
the	O
Qualcomm	O
Snapdragon	O
Sensor	O
Core	O
and	O
Qualcomm	B-General_Concept
Hexagon	I-General_Concept
,	O
and	O
the	O
Holographic	O
Processing	O
Unit	O
for	O
the	O
Microsoft	O
HoloLens	O
.	O
</s>
<s>
In	O
2012	O
,	O
Intel	O
announced	O
the	O
Intel	B-General_Concept
Xeon	I-General_Concept
Phi	I-General_Concept
coprocessor	I-General_Concept
.	O
</s>
<s>
,	O
various	O
companies	O
are	O
developing	O
coprocessors	B-General_Concept
aimed	O
at	O
accelerating	O
artificial	B-Architecture
neural	I-Architecture
networks	I-Architecture
for	O
vision	O
and	O
other	O
cognitive	O
tasks	O
(	O
e.g.	O
</s>
<s>
vision	B-General_Concept
processing	I-General_Concept
units	I-General_Concept
,	O
TrueNorth	O
,	O
and	O
Zeroth	B-General_Concept
)	O
,	O
and	O
as	O
of	O
2018	O
,	O
such	O
AI	O
chips	O
are	O
in	O
smartphones	O
such	O
as	O
from	O
Apple	O
,	O
and	O
several	O
Android	O
phone	O
vendors	O
.	O
</s>
<s>
The	O
MIPS	B-Device
architecture	I-Device
supports	O
up	O
to	O
four	O
coprocessor	B-General_Concept
units	O
,	O
used	O
for	O
memory	O
management	O
,	O
floating-point	B-Algorithm
arithmetic	I-Algorithm
,	O
and	O
two	O
undefined	O
coprocessors	B-General_Concept
for	O
other	O
tasks	O
such	O
as	O
graphics	B-Architecture
accelerators	I-Architecture
.	O
</s>
<s>
Using	O
FPGA	B-Architecture
(	O
field-programmable	B-Architecture
gate	I-Architecture
arrays	I-Architecture
)	O
,	O
custom	O
coprocessors	B-General_Concept
can	O
be	O
created	O
for	O
acceleration	O
of	O
particular	O
processing	O
tasks	O
such	O
as	O
digital	O
signal	O
processing	O
(	O
e.g.	O
</s>
<s>
Zynq	O
,	O
combines	O
ARM	B-Architecture
cores	O
with	O
FPGA	B-Architecture
on	O
a	O
single	O
die	O
)	O
.	O
</s>
<s>
Some	O
multi-core	B-Architecture
chips	O
can	O
be	O
programmed	O
so	O
that	O
one	O
of	O
their	O
processors	O
is	O
the	O
primary	O
processor	O
,	O
and	O
the	O
other	O
processors	O
are	O
supporting	O
coprocessors	B-General_Concept
.	O
</s>
<s>
China	O
's	O
Matrix	O
2000	O
128	O
core	O
PCI-e	O
coprocessor	B-General_Concept
is	O
a	O
proprietary	O
accelerator	O
that	O
requires	O
a	O
CPU	B-General_Concept
to	O
run	O
it	O
,	O
and	O
has	O
been	O
employed	O
in	O
an	O
upgrade	O
of	O
the	O
17,792	O
node	O
Tianhe-2	B-Device
supercomputer	O
(	O
2	O
Intel	B-General_Concept
Knights	I-General_Concept
Bridge+	O
2	O
Matrix	O
2000	O
each	O
)	O
,	O
now	O
dubbed	O
2A	O
,	O
roughly	O
doubling	O
its	O
speed	O
at	O
95	O
petaflops	O
,	O
exceeding	O
the	O
world	B-Device
's	I-Device
fastest	I-Device
supercomputer	I-Device
.	O
</s>
<s>
A	O
range	O
of	O
coprocessors	B-General_Concept
were	O
available	O
for	O
Acorn	B-Device
BBC	I-Device
Micro	I-Device
computers	O
.	O
</s>
<s>
Rather	O
than	O
special-purpose	O
graphics	O
or	O
arithmetic	O
devices	O
,	O
these	O
were	O
general-purpose	O
CPUs	O
(	O
such	O
as	O
8086	B-General_Concept
,	O
Zilog	O
Z80	O
,	O
or	O
6502	O
)	O
to	O
which	O
particular	O
types	O
of	O
task	O
were	O
assigned	O
by	O
the	O
operating	O
system	O
,	O
off-loading	O
them	O
from	O
the	O
computer	O
's	O
main	O
CPU	B-General_Concept
and	O
resulting	O
in	O
acceleration	O
.	O
</s>
<s>
In	O
addition	O
,	O
a	O
BBC	B-Device
Micro	I-Device
fitted	O
with	O
a	O
coprocessor	B-General_Concept
was	O
able	O
to	O
run	O
machine	B-Language
code	I-Language
software	O
designed	O
for	O
other	O
systems	O
,	O
such	O
as	O
CP/M	O
and	O
DOS	O
which	O
are	O
written	O
for	O
8086	B-General_Concept
processors	O
.	O
</s>
<s>
Over	O
time	O
CPUs	O
have	O
tended	O
to	O
grow	O
to	O
absorb	O
the	O
functionality	O
of	O
the	O
most	O
popular	O
coprocessors	B-General_Concept
.	O
</s>
<s>
FPUs	O
are	O
now	O
considered	O
an	O
integral	O
part	O
of	O
a	O
processors	O
 '	O
main	O
pipeline	O
;	O
SIMD	B-Device
units	O
gave	O
multimedia	O
its	O
acceleration	O
,	O
taking	O
over	O
the	O
role	O
of	O
various	O
DSP	B-Architecture
accelerator	O
cards	O
;	O
and	O
even	O
GPUs	B-Architecture
have	O
become	O
integrated	O
on	O
CPU	B-General_Concept
dies	O
.	O
</s>
