<s>
A	O
control	B-General_Concept
store	I-General_Concept
is	O
the	O
part	O
of	O
a	O
CPU	B-General_Concept
's	I-General_Concept
control	B-General_Concept
unit	I-General_Concept
that	O
stores	O
the	O
CPU	B-General_Concept
's	I-General_Concept
microprogram	B-Device
.	I-Device
</s>
<s>
It	O
is	O
usually	O
accessed	O
by	O
a	O
microsequencer	B-General_Concept
.	O
</s>
<s>
A	O
control	B-General_Concept
store	I-General_Concept
implementation	O
whose	O
contents	O
are	O
unalterable	O
is	O
known	O
as	O
a	O
Read	B-Device
Only	I-Device
Memory	I-Device
(	O
ROM	B-Device
)	O
or	O
Read	O
Only	O
Storage	O
(	O
ROS	O
)	O
;	O
one	O
whose	O
contents	O
are	O
alterable	O
is	O
known	O
as	O
a	O
Writable	O
Control	B-General_Concept
Store	I-General_Concept
(	O
WCS	O
)	O
.	O
</s>
<s>
Early	O
control	B-General_Concept
stores	I-General_Concept
were	O
implemented	O
as	O
a	O
diode-array	O
accessed	O
via	O
address	O
decoders	O
,	O
a	O
form	O
of	O
read-only	B-Device
memory	I-Device
.	O
</s>
<s>
This	O
tradition	O
dates	O
back	O
to	O
the	O
program	O
timing	O
matrix	O
on	O
the	O
MIT	B-Device
Whirlwind	I-Device
,	O
first	O
described	O
in	O
1947	O
.	O
</s>
<s>
Modern	O
VLSI	O
processors	O
instead	O
use	O
matrices	O
of	O
field-effect	O
transistors	O
to	O
build	O
the	O
ROM	B-Device
and/or	O
PLA	O
structures	O
used	O
to	O
control	O
the	O
processor	O
as	O
well	O
as	O
its	O
internal	O
sequencer	O
in	O
a	O
microcoded	B-Device
implementation	O
.	O
</s>
<s>
IBM	B-Application
System/360	I-Application
used	O
a	O
variety	O
of	O
techniques	O
:	O
CCROS	O
(	O
Card	O
Capacitor	O
Read-Only	B-Device
Storage	I-Device
)	O
on	O
the	O
Model	B-Device
30	I-Device
,	O
TROS	O
(	O
Transformer	O
Read-Only	B-Device
Storage	I-Device
)	O
on	O
the	O
Model	B-Device
40	I-Device
,	O
and	O
BCROS	O
(	O
Balanced	O
Capacitor	O
Read-Only	B-Device
Storage	I-Device
)	O
on	O
Models	O
50	B-Device
,	O
65	B-Device
and	O
67	B-Device
.	O
</s>
<s>
Some	O
computers	O
were	O
built	O
using	O
"	O
writable	O
microcode	B-Device
"	O
—	O
rather	O
than	O
storing	O
the	O
microcode	B-Device
in	O
ROM	B-Device
or	O
hard-wired	O
logic	O
,	O
the	O
microcode	B-Device
was	O
stored	O
in	O
a	O
RAM	B-Architecture
called	O
a	O
writable	O
control	B-General_Concept
store	I-General_Concept
or	O
WCS	O
.	O
</s>
<s>
The	O
original	O
System/360	B-Application
models	O
had	O
read-only	O
control	B-General_Concept
store	I-General_Concept
,	O
but	O
later	O
System/360	B-Application
,	O
System/370	B-Device
and	O
successor	O
models	O
loaded	O
part	O
or	O
all	O
of	O
their	O
microprograms	B-Device
from	O
floppy	O
disks	O
or	O
other	O
DASD	B-Application
into	O
a	O
writable	O
control	B-General_Concept
store	I-General_Concept
consisting	O
of	O
ultra-high	O
speed	O
random-access	B-Architecture
read-write	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
The	O
System/370	B-Device
architecture	O
included	O
a	O
facility	O
called	O
Initial-Microprogram	O
Load	O
(	O
IML	O
or	O
IMPL	O
)	O
that	O
could	O
be	O
invoked	O
from	O
the	O
console	O
,	O
as	O
part	O
of	O
Power	O
On	O
Reset	O
(	O
POR	O
)	O
or	O
from	O
another	O
processor	O
in	O
a	O
tightly	B-Operating_System
coupled	I-Operating_System
multiprocessor	B-Operating_System
complex	O
.	O
</s>
<s>
This	O
permitted	O
IBM	O
to	O
easily	O
repair	O
microprogramming	B-Device
defects	O
in	O
the	O
field	O
.	O
</s>
<s>
Even	O
when	O
the	O
majority	O
of	O
the	O
control	B-General_Concept
store	I-General_Concept
is	O
stored	O
in	O
ROM	B-Device
,	O
computer	O
vendors	O
would	O
often	O
sell	O
writable	O
control	B-General_Concept
store	I-General_Concept
as	O
an	O
option	O
,	O
allowing	O
the	O
customers	O
to	O
customize	O
the	O
machine	O
's	O
microprogram	B-Device
.	I-Device
</s>
<s>
Other	O
vendors	O
,	O
e.g.	O
,	O
IBM	O
,	O
use	O
the	O
WCS	O
to	O
run	O
microcode	B-Device
for	O
emulator	O
features	O
and	O
hardware	O
diagnostics	O
.	O
</s>
<s>
Other	O
commercial	O
machines	O
that	O
used	O
writable	O
microcode	B-Device
include	O
the	O
Burroughs	B-Device
Small	I-Device
Systems	I-Device
(	O
1970s	O
and	O
1980s	O
)	O
,	O
the	O
Xerox	O
processors	O
in	O
their	O
Lisp	B-Operating_System
machines	I-Operating_System
and	O
Xerox	B-Operating_System
Star	I-Operating_System
workstations	O
,	O
the	O
DEC	B-Device
VAX	I-Device
8800	O
(	O
"	O
Nautilus	O
"	O
)	O
family	O
,	O
and	O
the	O
Symbolics	O
L	O
-	O
and	O
G-machines	O
(	O
1980s	O
)	O
.	O
</s>
<s>
Some	O
DEC	B-Device
PDP-10	I-Device
machines	O
stored	O
their	O
microcode	B-Device
in	O
SRAM	O
chips	O
(	O
about	O
80	O
bits	O
wide	O
x	O
2	O
Kwords	O
)	O
,	O
which	O
was	O
typically	O
loaded	O
on	O
power-on	O
through	O
some	O
other	O
front-end	O
CPU	O
.	O
</s>
<s>
Many	O
more	O
machines	O
offered	O
user-programmable	O
writable	O
control	B-General_Concept
stores	I-General_Concept
as	O
an	O
option	O
(	O
including	O
the	O
HP	B-Device
2100	I-Device
,	O
DEC	O
PDP-11/60	O
and	O
Varian	O
Data	O
Machines	O
V-70	O
series	O
minicomputers	B-Architecture
)	O
.	O
</s>
<s>
The	O
Mentec	O
M11	O
and	O
Mentec	O
M1	O
stored	O
its	O
microcode	B-Device
in	O
SRAM	O
chips	O
,	O
loaded	O
on	O
power-on	O
through	O
another	O
CPU	O
.	O
</s>
<s>
The	O
Data	B-Device
General	I-Device
Eclipse	I-Device
MV/8000	I-Device
(	O
"	O
Eagle	O
"	O
)	O
had	O
a	O
SRAM	O
writable	O
control	B-General_Concept
store	I-General_Concept
,	O
loaded	O
on	O
power-on	O
through	O
another	O
CPU	O
.	O
</s>
<s>
WCS	O
offered	O
several	O
advantages	O
including	O
the	O
ease	O
of	O
patching	O
the	O
microprogram	B-Device
and	O
,	O
for	O
certain	O
hardware	O
generations	O
,	O
faster	O
access	O
than	O
ROMs	O
could	O
provide	O
.	O
</s>
<s>
Some	O
CPU	O
designs	O
compile	O
the	O
instruction	O
set	O
to	O
a	O
writable	O
RAM	B-Architecture
or	O
FLASH	B-Device
inside	O
the	O
CPU	O
(	O
such	O
as	O
the	O
Rekursiv	B-General_Concept
processor	O
and	O
the	O
Imsys	O
Cjip	O
)	O
,	O
or	O
an	O
FPGA	O
(	O
reconfigurable	B-Architecture
computing	I-Architecture
)	O
.	O
</s>
<s>
Several	O
Intel	O
CPUs	O
in	O
the	O
x86	B-Operating_System
architecture	I-Operating_System
family	O
have	O
writable	O
microcode	B-Device
,	O
starting	O
with	O
the	O
Pentium	B-Device
Pro	I-Device
in	O
1995	O
.	O
</s>
<s>
This	O
has	O
allowed	O
bugs	O
in	O
the	O
Intel	B-Device
Core	I-Device
2	I-Device
microcode	B-Device
and	O
Intel	B-Device
Xeon	I-Device
microcode	B-Device
to	O
be	O
fixed	O
in	O
software	O
,	O
rather	O
than	O
requiring	O
the	O
entire	O
chip	O
to	O
be	O
replaced	O
.	O
</s>
<s>
Such	O
fixes	O
can	O
be	O
installed	O
by	O
Linux	O
,	O
FreeBSD	B-Operating_System
,	O
Microsoft	O
Windows	O
,	O
or	O
the	O
motherboard	O
BIOS	O
.	O
</s>
<s>
The	O
control	B-General_Concept
store	I-General_Concept
usually	O
has	O
a	O
register	O
on	O
its	O
outputs	O
.	O
</s>
<s>
The	O
outputs	O
that	O
go	O
back	O
into	O
the	O
sequencer	O
to	O
determine	O
the	O
next	O
address	O
have	O
to	O
go	O
through	O
some	O
sort	O
of	O
register	O
to	O
prevent	O
the	O
creation	O
of	O
a	O
race	B-Operating_System
condition	I-Operating_System
.	O
</s>
<s>
This	O
is	O
because	O
the	O
machine	O
will	O
work	O
faster	O
if	O
the	O
execution	O
of	O
the	O
next	O
microinstruction	B-Device
is	O
delayed	O
by	O
one	O
cycle	O
.	O
</s>
<s>
Very	O
often	O
the	O
execution	O
of	O
the	O
next	O
microinstruction	B-Device
is	O
dependent	O
on	O
the	O
result	O
of	O
the	O
current	O
microinstruction	B-Device
,	O
which	O
will	O
not	O
be	O
stable	O
until	O
the	O
end	O
of	O
the	O
current	O
microcycle	O
.	O
</s>
<s>
It	O
can	O
be	O
seen	O
that	O
either	O
way	O
,	O
all	O
of	O
the	O
outputs	O
of	O
the	O
control	B-General_Concept
store	I-General_Concept
go	O
into	O
one	O
big	O
register	O
.	O
</s>
