<s>
Computing	B-Application
with	I-Application
Memory	I-Application
refers	O
to	O
computing	O
platforms	O
where	O
function	O
response	O
is	O
stored	O
in	O
memory	O
array	O
,	O
either	O
one	O
or	O
two-dimensional	O
,	O
in	O
the	O
form	O
of	O
lookup	B-Data_Structure
tables	I-Data_Structure
(	O
LUTs	O
)	O
and	O
functions	O
are	O
evaluated	O
by	O
retrieving	O
the	O
values	O
from	O
the	O
LUTs	O
.	O
</s>
<s>
These	O
computing	O
platforms	O
can	O
follow	O
either	O
a	O
purely	O
spatial	O
computing	O
model	O
,	O
as	O
in	O
field-programmable	B-Architecture
gate	I-Architecture
array	I-Architecture
(	O
FPGA	B-Architecture
)	O
,	O
or	O
a	O
temporal	O
computing	O
model	O
,	O
where	O
a	O
function	O
is	O
evaluated	O
across	O
multiple	O
clock	O
cycles	O
.	O
</s>
<s>
The	O
latter	O
approach	O
aims	O
at	O
reducing	O
the	O
overhead	O
of	O
programmable	O
interconnect	O
in	O
FPGA	B-Architecture
by	O
folding	O
interconnect	O
resources	O
inside	O
a	O
computing	O
element	O
.	O
</s>
<s>
Computing	B-Application
with	I-Application
Memory	I-Application
differs	O
from	O
Computing	O
in	O
Memory	O
or	O
processor-in-memory	B-Architecture
(	O
PIM	O
)	O
concepts	O
,	O
widely	O
investigated	O
in	O
the	O
context	O
of	O
integrating	O
a	O
processor	O
and	O
memory	O
on	O
the	O
same	O
chip	O
to	O
reduce	O
memory	O
latency	O
and	O
increase	O
bandwidth	O
.	O
</s>
<s>
The	B-Architecture
Berkeley	I-Architecture
IRAM	I-Architecture
project	I-Architecture
is	O
one	O
notable	O
contribution	O
in	O
the	O
area	O
of	O
PIM	O
architectures	O
.	O
</s>
<s>
Computing	B-Application
with	I-Application
memory	I-Application
platforms	O
are	O
typically	O
used	O
to	O
provide	O
the	O
benefit	O
of	O
hardware	O
reconfigurability	O
.	O
</s>
<s>
Reconfigurable	B-Architecture
computing	I-Architecture
platforms	O
offer	O
advantages	O
in	O
terms	O
of	O
reduced	O
design	O
cost	O
,	O
early	O
time-to-market	O
,	O
rapid	O
prototyping	O
and	O
easily	O
customizable	O
hardware	O
systems	O
.	O
</s>
<s>
FPGAs	B-Architecture
present	O
a	O
popular	O
reconfigurable	B-Architecture
computing	I-Architecture
platform	O
for	O
implementing	O
digital	O
circuits	O
.	O
</s>
<s>
Since	O
their	O
inception	O
in	O
1985	O
,	O
the	O
basic	O
structure	O
of	O
the	O
FPGAs	B-Architecture
has	O
continued	O
to	O
consist	O
of	O
two-dimensional	O
array	O
of	O
Configurable	O
Logic	O
blocks	O
(	O
CLBs	O
)	O
and	O
a	O
programmable	O
interconnect	O
matrix	O
.	O
</s>
<s>
FPGA	B-Architecture
performance	O
and	O
power	O
dissipation	O
is	O
largely	O
dominated	O
by	O
the	O
elaborate	O
programmable	O
interconnect	O
(	O
PI	O
)	O
architecture	O
.	O
</s>
<s>
An	O
effective	O
way	O
of	O
reducing	O
the	O
impact	O
of	O
the	O
PI	O
architecture	O
in	O
FPGA	B-Architecture
is	O
to	O
place	O
small	O
LUTs	O
in	O
close	O
proximity	O
(	O
referred	O
as	O
clusters	O
)	O
and	O
to	O
allow	O
intra-cluster	O
communication	O
using	O
local	O
interconnects	O
.	O
</s>
<s>
Due	O
to	O
the	O
benefits	O
of	O
a	O
clustered	O
FPGA	B-Architecture
architecture	O
,	O
major	O
FPGA	B-Architecture
vendors	O
have	O
incorporated	O
it	O
in	O
their	O
commercial	O
products	O
.	O
</s>
<s>
Investigations	O
have	O
also	O
been	O
made	O
to	O
reduce	O
the	O
overhead	O
due	O
to	O
PI	O
in	O
fine-grained	O
FPGAs	B-Architecture
by	O
mapping	O
larger	O
multi-input	O
multi-output	O
LUTs	O
to	O
embedded	O
memory	O
blocks	O
.	O
</s>
<s>
Contrary	O
to	O
the	O
purely	O
spatial	O
computing	O
model	O
of	O
FPGA	B-Architecture
,	O
a	O
reconfigurable	B-Architecture
computing	I-Architecture
platform	O
that	O
employs	O
a	O
temporal	O
computing	O
model	O
(	O
or	O
a	O
combination	O
of	O
both	O
temporal	O
and	O
spatial	O
)	O
has	O
also	O
been	O
investigated	O
in	O
the	O
context	O
of	O
improving	O
performance	O
and	O
energy	O
over	O
conventional	O
FPGA	B-Architecture
.	O
</s>
<s>
Multiple	O
such	O
computing	O
elements	O
can	O
be	O
spatially	O
connected	O
using	O
FPGA-like	O
programmable	O
interconnect	O
architecture	O
to	O
enable	O
mapping	O
of	O
large	O
functions	O
.	O
</s>
<s>
The	O
memory	O
array	O
inside	O
each	O
computing	O
element	O
can	O
be	O
realized	O
by	O
content-addressable	B-Data_Structure
memory	I-Data_Structure
(	O
CAM	B-Data_Structure
)	O
to	O
drastically	O
reduce	O
the	O
memory	O
requirement	O
for	O
certain	O
applications	O
.	O
</s>
